Commit 9b2c2ff7a1c04e69842254dd4afe0f8ad4efa439

Authored by Saeed Bishara
Committed by David S. Miller
1 parent 08e554b17b

mv643xx_eth: use sw csum for big packets

Some controllers (KW, Dove) limits the TX IP/layer4 checksum offloading to a max size.

Signed-off-by: Saeed Bishara <saeed@marvell.com>
Acked-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

Showing 2 changed files with 12 additions and 2 deletions Side-by-side Diff

drivers/net/mv643xx_eth.c
... ... @@ -289,6 +289,7 @@
289 289 unsigned int t_clk;
290 290 int extended_rx_coal_limit;
291 291 int tx_bw_control;
  292 + int tx_csum_limit;
292 293 };
293 294  
294 295 #define TX_BW_CONTROL_ABSENT 0
295 296  
... ... @@ -776,13 +777,16 @@
776 777 l4i_chk = 0;
777 778  
778 779 if (skb->ip_summed == CHECKSUM_PARTIAL) {
  780 + int hdr_len;
779 781 int tag_bytes;
780 782  
781 783 BUG_ON(skb->protocol != htons(ETH_P_IP) &&
782 784 skb->protocol != htons(ETH_P_8021Q));
783 785  
784   - tag_bytes = (void *)ip_hdr(skb) - (void *)skb->data - ETH_HLEN;
785   - if (unlikely(tag_bytes & ~12)) {
  786 + hdr_len = (void *)ip_hdr(skb) - (void *)skb->data;
  787 + tag_bytes = hdr_len - ETH_HLEN;
  788 + if (skb->len - hdr_len > mp->shared->tx_csum_limit ||
  789 + unlikely(tag_bytes & ~12)) {
786 790 if (skb_checksum_help(skb) == 0)
787 791 goto no_csum;
788 792 kfree_skb(skb);
... ... @@ -2666,6 +2670,7 @@
2666 2670 * Detect hardware parameters.
2667 2671 */
2668 2672 msp->t_clk = (pd != NULL && pd->t_clk != 0) ? pd->t_clk : 133000000;
  2673 + msp->tx_csum_limit = pd->tx_csum_limit ? pd->tx_csum_limit : 9 * 1024;
2669 2674 infer_hw_params(msp);
2670 2675  
2671 2676 platform_set_drvdata(pdev, msp);
include/linux/mv643xx_eth.h
... ... @@ -19,6 +19,11 @@
19 19 struct mbus_dram_target_info *dram;
20 20 struct platform_device *shared_smi;
21 21 unsigned int t_clk;
  22 + /*
  23 + * Max packet size for Tx IP/Layer 4 checksum, when set to 0, default
  24 + * limit of 9KiB will be used.
  25 + */
  26 + int tx_csum_limit;
22 27 };
23 28  
24 29 #define MV643XX_ETH_PHY_ADDR_DEFAULT 0