Commit ada091729e8737edc3d455681fda9f745cfd2b63
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f507442962
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Blackfin: add EVT_OVERRIDE/IPRIO core MMR helpers
These were partially defined, so fill out the def/cdef pieces properly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Showing 2 changed files with 5 additions and 4 deletions Side-by-side Diff
arch/blackfin/include/asm/cdef_LPBlackfin.h
| ... | ... | @@ -216,12 +216,16 @@ |
| 216 | 216 | #define bfin_write_EVT14(val) bfin_write32(EVT14,val) |
| 217 | 217 | #define bfin_read_EVT15() bfin_read32(EVT15) |
| 218 | 218 | #define bfin_write_EVT15(val) bfin_write32(EVT15,val) |
| 219 | +#define bfin_read_EVT_OVERRIDE() bfin_read32(EVT_OVERRIDE) | |
| 220 | +#define bfin_write_EVT_OVERRIDE(val) bfin_write32(EVT_OVERRIDE,val) | |
| 219 | 221 | #define bfin_read_IMASK() bfin_read32(IMASK) |
| 220 | 222 | #define bfin_write_IMASK(val) bfin_write32(IMASK,val) |
| 221 | 223 | #define bfin_read_IPEND() bfin_read32(IPEND) |
| 222 | 224 | #define bfin_write_IPEND(val) bfin_write32(IPEND,val) |
| 223 | 225 | #define bfin_read_ILAT() bfin_read32(ILAT) |
| 224 | 226 | #define bfin_write_ILAT(val) bfin_write32(ILAT,val) |
| 227 | +#define bfin_read_IPRIO() bfin_read32(IPRIO) | |
| 228 | +#define bfin_write_IPRIO(val) bfin_write32(IPRIO,val) | |
| 225 | 229 | |
| 226 | 230 | /*Core Timer Registers*/ |
| 227 | 231 | #define bfin_read_TCNTL() bfin_read32(TCNTL) |
| ... | ... | @@ -298,10 +302,6 @@ |
| 298 | 302 | #define bfin_write_PFCNTR0(val) bfin_write32(PFCNTR0,val) |
| 299 | 303 | #define bfin_read_PFCNTR1() bfin_read32(PFCNTR1) |
| 300 | 304 | #define bfin_write_PFCNTR1(val) bfin_write32(PFCNTR1,val) |
| 301 | - | |
| 302 | -/* | |
| 303 | -#define IPRIO 0xFFE02110 | |
| 304 | -*/ | |
| 305 | 305 | |
| 306 | 306 | #endif /* _CDEF_LPBLACKFIN_H */ |
arch/blackfin/include/asm/def_LPBlackfin.h
| ... | ... | @@ -394,6 +394,7 @@ |
| 394 | 394 | #define EVT13 0xFFE02034 /* Event Vector 13 ESR Address */ |
| 395 | 395 | #define EVT14 0xFFE02038 /* Event Vector 14 ESR Address */ |
| 396 | 396 | #define EVT15 0xFFE0203C /* Event Vector 15 ESR Address */ |
| 397 | +#define EVT_OVERRIDE 0xFFE02100 /* Event Vector Override Register */ | |
| 397 | 398 | #define IMASK 0xFFE02104 /* Interrupt Mask Register */ |
| 398 | 399 | #define IPEND 0xFFE02108 /* Interrupt Pending Register */ |
| 399 | 400 | #define ILAT 0xFFE0210C /* Interrupt Latch Register */ |