Commit adb9fa13a403f0f6f4e0d57a0bfcfd1a91e0edea

Authored by Patil, Rachna
1 parent b9a063a165

MFD: ti_tscadc: context save for irq added in suspend/resume

The code did not have context save done on IRQ register bits
for the MFD device.
Also the control register bits after resume were loaded to the
default value. Now changes have been made to save both IRQ and control
register bits in MFD core.
In ADC client the mode in which ADC is operating has to store,
hence modify the step_config function to pass the current mode.

Signed-off-by: Patil, Rachna <rachna@ti.com>

Showing 3 changed files with 20 additions and 19 deletions Side-by-side Diff

drivers/mfd/ti_tscadc.c
... ... @@ -222,6 +222,8 @@
222 222 struct ti_tscadc_dev *tscadc_dev = platform_get_drvdata(pdev);
223 223  
224 224 tscadc_writel(tscadc_dev, TSCADC_REG_SE, 0x00);
  225 + tscadc_dev->irqstat = tscadc_readl(tscadc_dev, TSCADC_REG_IRQENABLE);
  226 + tscadc_dev->ctrl = tscadc_readl(tscadc_dev, TSCADC_REG_CTRL);
225 227 pm_runtime_put_sync(&pdev->dev);
226 228 return 0;
227 229 }
228 230  
229 231  
230 232  
... ... @@ -230,26 +232,15 @@
230 232 {
231 233 struct ti_tscadc_dev *tscadc_dev = platform_get_drvdata(pdev);
232 234 struct mfd_tscadc_board *pdata = pdev->dev.platform_data;
233   - unsigned int restore, ctrl;
234 235  
235 236 pm_runtime_get_sync(&pdev->dev);
236 237  
237 238 /* context restore */
238   - ctrl = TSCADC_CNTRLREG_STEPCONFIGWRT |
239   - TSCADC_CNTRLREG_STEPID;
240   -
  239 + tscadc_writel(tscadc_dev, TSCADC_REG_IRQENABLE, tscadc_dev->irqstat);
241 240 if (pdata->tsc_init)
242   - ctrl |= TSCADC_CNTRLREG_4WIRE |
243   - TSCADC_CNTRLREG_TSCENB;
244   - tscadc_writel(tscadc_dev, TSCADC_REG_CTRL, ctrl);
245   -
246   - if (pdata->tsc_init)
247 241 tscadc_idle_config(tscadc_dev);
248   - tscadc_writel(tscadc_dev, TSCADC_REG_SE, TSCADC_STPENB_STEPENB);
249   - restore = tscadc_readl(tscadc_dev, TSCADC_REG_CTRL);
250   - tscadc_writel(tscadc_dev, TSCADC_REG_CTRL,
251   - (restore | TSCADC_CNTRLREG_TSCSSENB));
252   -
  242 + tscadc_writel(tscadc_dev, TSCADC_REG_SE, TSCADC_STPENB_STEPENB_TC);
  243 + tscadc_writel(tscadc_dev, TSCADC_REG_CTRL, tscadc_dev->ctrl);
253 244 return 0;
254 245 }
255 246  
drivers/staging/iio/adc/ti_adc.c
... ... @@ -54,7 +54,7 @@
54 54 writel(val, adc->mfd_tscadc->tscadc_base + reg);
55 55 }
56 56  
57   -static void adc_step_config(struct adc_device *adc_dev)
  57 +static void adc_step_config(struct adc_device *adc_dev, bool mode)
58 58 {
59 59 unsigned int stepconfig;
60 60 int i, channels = 0, steps;
... ... @@ -72,7 +72,11 @@
72 72 steps = TOTAL_STEPS - adc_dev->channels;
73 73 channels = TOTAL_CHANNELS - adc_dev->channels;
74 74  
75   - stepconfig = TSCADC_STEPCONFIG_AVG_16 | TSCADC_STEPCONFIG_FIFO1;
  75 + if (mode == 0)
  76 + stepconfig = TSCADC_STEPCONFIG_AVG_16 | TSCADC_STEPCONFIG_FIFO1;
  77 + else
  78 + stepconfig = TSCADC_STEPCONFIG_AVG_16 | TSCADC_STEPCONFIG_FIFO1
  79 + | TSCADC_STEPCONFIG_MODE_SWCNT;
76 80  
77 81 for (i = (steps + 1); i <= TOTAL_STEPS; i++) {
78 82 adc_writel(adc_dev, TSCADC_REG_STEPCONFIG(i),
... ... @@ -425,7 +429,8 @@
425 429 idev->modes = INDIO_DIRECT_MODE;
426 430 idev->info = &tiadc_info;
427 431  
428   - adc_step_config(adc_dev);
  432 + /* by default driver comes up with oneshot mode */
  433 + adc_step_config(adc_dev, adc_dev->is_continuous_mode);
429 434  
430 435 /* program FIFO threshold to value minus 1 */
431 436 adc_writel(adc_dev, TSCADC_REG_FIFO1THR, FIFO1_THRESHOLD);
432 437  
... ... @@ -505,12 +510,13 @@
505 510 struct adc_device *adc_dev = tscadc_dev->adc;
506 511 unsigned int restore;
507 512  
  513 + adc_writel(adc_dev, TSCADC_REG_FIFO1THR, FIFO1_THRESHOLD);
  514 + adc_step_config(adc_dev, adc_dev->is_continuous_mode);
  515 +
508 516 /* Make sure ADC is powered up */
509 517 restore = adc_readl(adc_dev, TSCADC_REG_CTRL);
510 518 restore &= ~(TSCADC_CNTRLREG_POWERDOWN);
511 519 adc_writel(adc_dev, TSCADC_REG_CTRL, restore);
512   -
513   - adc_step_config(adc_dev);
514 520 return 0;
515 521 }
516 522  
include/linux/mfd/ti_tscadc.h
... ... @@ -159,5 +159,9 @@
159 159  
160 160 /* adc device */
161 161 struct adc_device *adc;
  162 +
  163 + /* Context save */
  164 + unsigned int irqstat;
  165 + unsigned int ctrl;
162 166 };