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Commit af0c25c4876305dfa1a25ac1cc92d3cddfa476a6

Authored by Américo Wang
Committed by Greg Kroah-Hartman
1 parent ceeb6fec70
Exists in master and in 4 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN, v3.2_SMARCT335xPSP_04.06.00.11

staging: remove obsoleted CS5535/CS5536 GPIO driver 

It is scheduled to be removed.

Acked-by: Andres Salomon <dilinger@queued.net>
Signed-off-by: WANG Cong <xiyou.wangcong@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

Showing 6 changed files with 0 additions and 294 deletions Side-by-side Diff

Documentation/feature-removal-schedule.txt
Diff comments   View file @ af0c25c
... ... @@ -193,20 +193,6 @@
193 193  
194 194 ---------------------------
195 195  
196   -What: CS5535/CS5536 obsolete GPIO driver
197   -When: June 2011
198   -Files: drivers/staging/cs5535_gpio/*
199   -Check: drivers/staging/cs5535_gpio/cs5535_gpio.c
200   -Why: A newer driver replaces this; it is drivers/gpio/cs5535-gpio.c, and
201   - integrates with the Linux GPIO subsystem. The old driver has been
202   - moved to staging, and will be removed altogether around 2.6.40.
203   - Please test the new driver, and ensure that the functionality you
204   - need and any bugfixes from the old driver are available in the new
205   - one.
206   -Who: Andres Salomon <dilinger@queued.net>
207   -
208   ---------------------------
209   -
210 196 What: remove EXPORT_SYMBOL(kernel_thread)
211 197 When: August 2006
212 198 Files: arch/*/kernel/*_ksyms.c
drivers/staging/Kconfig
Diff comments   View file @ af0c25c
... ... @@ -100,8 +100,6 @@
100 100  
101 101 source "drivers/staging/iio/Kconfig"
102 102  
103   -source "drivers/staging/cs5535_gpio/Kconfig"
104   -
105 103 source "drivers/staging/zram/Kconfig"
106 104  
107 105 source "drivers/staging/zcache/Kconfig"
drivers/staging/cs5535_gpio/Kconfig
View file @ af0c25c
1   -config CS5535_GPIO
2   - tristate "AMD CS5535/CS5536 GPIO (Geode Companion Device)"
3   - depends on X86_32
4   - help
5   - Note: this driver is DEPRECATED. Please use the cs5535-gpio module
6   - in the GPIO section instead (CONFIG_GPIO_CS5535).
7   -
8   - Give userspace access to the GPIO pins on the AMD CS5535 and
9   - CS5536 Geode companion devices.
10   -
11   - If compiled as a module, it will be called cs5535_gpio.
drivers/staging/cs5535_gpio/Makefile
View file @ af0c25c
1   -obj-$(CONFIG_CS5535_GPIO) += cs5535_gpio.o
drivers/staging/cs5535_gpio/TODO
View file @ af0c25c
1   -This is an obsolete driver for some the CS5535 and CS5536 southbridge GPIOs.
2   -It has been replaced by a driver that makes use of the Linux GPIO subsystem.
3   -Please switch to that driver, and let dilinger@queued.net know if there's
4   -anything missing from the new driver.
5   -
6   -This driver is scheduled for removal in 2.6.40.
drivers/staging/cs5535_gpio/cs5535_gpio.c
View file @ af0c25c
1   -/*
2   - * AMD CS5535/CS5536 GPIO driver.
3   - * Allows a user space process to play with the GPIO pins.
4   - *
5   - * Copyright (c) 2005 Ben Gardner <bgardner@wabtec.com>
6   - *
7   - * This program is free software; you can redistribute it and/or modify
8   - * it under the smems of the GNU General Public License as published by
9   - * the Free Software Foundation; version 2 of the License.
10   - */
11   -
12   -#include <linux/fs.h>
13   -#include <linux/module.h>
14   -#include <linux/errno.h>
15   -#include <linux/kernel.h>
16   -#include <linux/init.h>
17   -#include <linux/cdev.h>
18   -#include <linux/ioport.h>
19   -#include <linux/pci.h>
20   -
21   -#include <asm/uaccess.h>
22   -#include <asm/io.h>
23   -
24   -
25   -#define NAME "cs5535_gpio"
26   -
27   -MODULE_AUTHOR("Ben Gardner <bgardner@wabtec.com>");
28   -MODULE_DESCRIPTION("AMD CS5535/CS5536 GPIO Pin Driver");
29   -MODULE_LICENSE("GPL");
30   -
31   -static int major;
32   -module_param(major, int, 0);
33   -MODULE_PARM_DESC(major, "Major device number");
34   -
35   -static ulong mask;
36   -module_param(mask, ulong, 0);
37   -MODULE_PARM_DESC(mask, "GPIO channel mask");
38   -
39   -#define MSR_LBAR_GPIO 0x5140000C
40   -
41   -static u32 gpio_base;
42   -
43   -static struct pci_device_id divil_pci[] = {
44   - { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA) },
45   - { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) },
46   - { } /* NULL entry */
47   -};
48   -MODULE_DEVICE_TABLE(pci, divil_pci);
49   -
50   -static struct cdev cs5535_gpio_cdev;
51   -
52   -/* reserve 32 entries even though some aren't usable */
53   -#define CS5535_GPIO_COUNT 32
54   -
55   -/* IO block size */
56   -#define CS5535_GPIO_SIZE 256
57   -
58   -struct gpio_regmap {
59   - u32 rd_offset;
60   - u32 wr_offset;
61   - char on;
62   - char off;
63   -};
64   -static struct gpio_regmap rm[] =
65   -{
66   - { 0x30, 0x00, '1', '0' }, /* GPIOx_READ_BACK / GPIOx_OUT_VAL */
67   - { 0x20, 0x20, 'I', 'i' }, /* GPIOx_IN_EN */
68   - { 0x04, 0x04, 'O', 'o' }, /* GPIOx_OUT_EN */
69   - { 0x08, 0x08, 't', 'T' }, /* GPIOx_OUT_OD_EN */
70   - { 0x18, 0x18, 'P', 'p' }, /* GPIOx_OUT_PU_EN */
71   - { 0x1c, 0x1c, 'D', 'd' }, /* GPIOx_OUT_PD_EN */
72   -};
73   -
74   -
75   -/**
76   - * Gets the register offset for the GPIO bank.
77   - * Low (0-15) starts at 0x00, high (16-31) starts at 0x80
78   - */
79   -static inline u32 cs5535_lowhigh_base(int reg)
80   -{
81   - return (reg & 0x10) << 3;
82   -}
83   -
84   -static ssize_t cs5535_gpio_write(struct file *file, const char __user *data,
85   - size_t len, loff_t *ppos)
86   -{
87   - u32 m = iminor(file->f_path.dentry->d_inode);
88   - int i, j;
89   - u32 base = gpio_base + cs5535_lowhigh_base(m);
90   - u32 m0, m1;
91   - char c;
92   -
93   - /**
94   - * Creates the mask for atomic bit programming.
95   - * The high 16 bits and the low 16 bits are used to set the mask.
96   - * For example, GPIO 15 maps to 31,15: 0,1 => On; 1,0=> Off
97   - */
98   - m1 = 1 << (m & 0x0F);
99   - m0 = m1 << 16;
100   -
101   - for (i = 0; i < len; ++i) {
102   - if (get_user(c, data+i))
103   - return -EFAULT;
104   -
105   - for (j = 0; j < ARRAY_SIZE(rm); j++) {
106   - if (c == rm[j].on) {
107   - outl(m1, base + rm[j].wr_offset);
108   - /* If enabling output, turn off AUX 1 and AUX 2 */
109   - if (c == 'O') {
110   - outl(m0, base + 0x10);
111   - outl(m0, base + 0x14);
112   - }
113   - break;
114   - } else if (c == rm[j].off) {
115   - outl(m0, base + rm[j].wr_offset);
116   - break;
117   - }
118   - }
119   - }
120   - *ppos = 0;
121   - return len;
122   -}
123   -
124   -static ssize_t cs5535_gpio_read(struct file *file, char __user *buf,
125   - size_t len, loff_t *ppos)
126   -{
127   - u32 m = iminor(file->f_path.dentry->d_inode);
128   - u32 base = gpio_base + cs5535_lowhigh_base(m);
129   - int rd_bit = 1 << (m & 0x0f);
130   - int i;
131   - char ch;
132   - ssize_t count = 0;
133   -
134   - if (*ppos >= ARRAY_SIZE(rm))
135   - return 0;
136   -
137   - for (i = *ppos; (i < (*ppos + len)) && (i < ARRAY_SIZE(rm)); i++) {
138   - ch = (inl(base + rm[i].rd_offset) & rd_bit) ?
139   - rm[i].on : rm[i].off;
140   -
141   - if (put_user(ch, buf+count))
142   - return -EFAULT;
143   -
144   - count++;
145   - }
146   -
147   - /* add a line-feed if there is room */
148   - if ((i == ARRAY_SIZE(rm)) && (count < len)) {
149   - if (put_user('\n', buf + count))
150   - return -EFAULT;
151   - count++;
152   - }
153   -
154   - *ppos += count;
155   - return count;
156   -}
157   -
158   -static int cs5535_gpio_open(struct inode *inode, struct file *file)
159   -{
160   - u32 m = iminor(inode);
161   -
162   - /* the mask says which pins are usable by this driver */
163   - if ((mask & (1 << m)) == 0)
164   - return -EINVAL;
165   -
166   - return nonseekable_open(inode, file);
167   -}
168   -
169   -static const struct file_operations cs5535_gpio_fops = {
170   - .owner = THIS_MODULE,
171   - .write = cs5535_gpio_write,
172   - .read = cs5535_gpio_read,
173   - .open = cs5535_gpio_open,
174   - .llseek = no_llseek,
175   -};
176   -
177   -static int __init cs5535_gpio_init(void)
178   -{
179   - dev_t dev_id;
180   - u32 low, hi;
181   - int retval;
182   -
183   - if (pci_dev_present(divil_pci) == 0) {
184   - printk(KERN_WARNING NAME ": DIVIL not found\n");
185   - return -ENODEV;
186   - }
187   -
188   - /* Grab the GPIO I/O range */
189   - rdmsr(MSR_LBAR_GPIO, low, hi);
190   -
191   - /* Check the mask and whether GPIO is enabled (sanity check) */
192   - if (hi != 0x0000f001) {
193   - printk(KERN_WARNING NAME ": GPIO not enabled\n");
194   - return -ENODEV;
195   - }
196   -
197   - /* Mask off the IO base address */
198   - gpio_base = low & 0x0000ff00;
199   -
200   - /**
201   - * Some GPIO pins
202   - * 31-29,23 : reserved (always mask out)
203   - * 28 : Power Button
204   - * 26 : PME#
205   - * 22-16 : LPC
206   - * 14,15 : SMBus
207   - * 9,8 : UART1
208   - * 7 : PCI INTB
209   - * 3,4 : UART2/DDC
210   - * 2 : IDE_IRQ0
211   - * 0 : PCI INTA
212   - *
213   - * If a mask was not specified, be conservative and only allow:
214   - * 1,2,5,6,10-13,24,25,27
215   - */
216   - if (mask != 0)
217   - mask &= 0x1f7fffff;
218   - else
219   - mask = 0x0b003c66;
220   -
221   - if (!request_region(gpio_base, CS5535_GPIO_SIZE, NAME)) {
222   - printk(KERN_ERR NAME ": can't allocate I/O for GPIO\n");
223   - return -ENODEV;
224   - }
225   -
226   - if (major) {
227   - dev_id = MKDEV(major, 0);
228   - retval = register_chrdev_region(dev_id, CS5535_GPIO_COUNT,
229   - NAME);
230   - } else {
231   - retval = alloc_chrdev_region(&dev_id, 0, CS5535_GPIO_COUNT,
232   - NAME);
233   - major = MAJOR(dev_id);
234   - }
235   -
236   - if (retval) {
237   - release_region(gpio_base, CS5535_GPIO_SIZE);
238   - return -1;
239   - }
240   -
241   - printk(KERN_DEBUG NAME ": base=%#x mask=%#lx major=%d\n",
242   - gpio_base, mask, major);
243   -
244   - cdev_init(&cs5535_gpio_cdev, &cs5535_gpio_fops);
245   - cdev_add(&cs5535_gpio_cdev, dev_id, CS5535_GPIO_COUNT);
246   -
247   - return 0;
248   -}
249   -
250   -static void __exit cs5535_gpio_cleanup(void)
251   -{
252   - dev_t dev_id = MKDEV(major, 0);
253   -
254   - cdev_del(&cs5535_gpio_cdev);
255   - unregister_chrdev_region(dev_id, CS5535_GPIO_COUNT);
256   - release_region(gpio_base, CS5535_GPIO_SIZE);
257   -}
258   -
259   -module_init(cs5535_gpio_init);
260   -module_exit(cs5535_gpio_cleanup);