Commit b343ae51c116dffaef07a8596661774c12212b66

Authored by David S. Miller
1 parent b19f820039

sparc64: Support RAW perf events.

Encoding is "(encoding << 16) | pic_mask"

Signed-off-by: David S. Miller <davem@davemloft.net>

Showing 1 changed file with 11 additions and 3 deletions Side-by-side Diff

arch/sparc/kernel/perf_event.c
... ... @@ -1038,6 +1038,7 @@
1038 1038 if (atomic_read(&nmi_active) < 0)
1039 1039 return -ENODEV;
1040 1040  
  1041 + pmap = NULL;
1041 1042 if (attr->type == PERF_TYPE_HARDWARE) {
1042 1043 if (attr->config >= sparc_pmu->max_events)
1043 1044 return -EINVAL;
1044 1045  
... ... @@ -1046,9 +1047,18 @@
1046 1047 pmap = sparc_map_cache_event(attr->config);
1047 1048 if (IS_ERR(pmap))
1048 1049 return PTR_ERR(pmap);
1049   - } else
  1050 + } else if (attr->type != PERF_TYPE_RAW)
1050 1051 return -EOPNOTSUPP;
1051 1052  
  1053 + if (pmap) {
  1054 + hwc->event_base = perf_event_encode(pmap);
  1055 + } else {
  1056 + /* User gives us "(encoding << 16) | pic_mask" for
  1057 + * PERF_TYPE_RAW events.
  1058 + */
  1059 + hwc->event_base = attr->config;
  1060 + }
  1061 +
1052 1062 /* We save the enable bits in the config_base. */
1053 1063 hwc->config_base = sparc_pmu->irq_bit;
1054 1064 if (!attr->exclude_user)
... ... @@ -1057,8 +1067,6 @@
1057 1067 hwc->config_base |= PCR_STRACE;
1058 1068 if (!attr->exclude_hv)
1059 1069 hwc->config_base |= sparc_pmu->hv_bit;
1060   -
1061   - hwc->event_base = perf_event_encode(pmap);
1062 1070  
1063 1071 n = 0;
1064 1072 if (event->group_leader != event) {