Eric Lee / linux-smarc-t335x-v3.2

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Commit b4af3f7cf11e6b5904af08a652d4a2429af17c74

Authored by Magnus Damm
Committed by Andi Kleen
1 parent 9541493054
Exists in master and in 4 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN, v3.2_SMARCT335xPSP_04.06.00.11

[PATCH] i386: mark cpu init functions as __cpuinit, data as __cpuinitdata 

Mark i386-specific cpu init functions as __cpuinit. They are all
only called from arch/i386/common.c:identify_cpu() that already is marked as
__cpuinit. This patch also removes the empty function init_umc().

Signed-off-by: Magnus Damm <magnus@valinux.co.jp>
Signed-off-by: Andi Kleen <ak@suse.de>

Showing 8 changed files with 31 additions and 36 deletions Side-by-side Diff

arch/i386/kernel/cpu/amd.c
Diff comments   View file @ b4af3f7
... ... @@ -22,7 +22,7 @@
22 22 extern void vide(void);
23 23 __asm__(".align 4\nvide: ret");
24 24  
25   -static void __init init_amd(struct cpuinfo_x86 *c)
  25 +static void __cpuinit init_amd(struct cpuinfo_x86 *c)
26 26 {
27 27 u32 l, h;
28 28 int mbytes = num_physpages >> (20-PAGE_SHIFT);
arch/i386/kernel/cpu/centaur.c
Diff comments   View file @ b4af3f7
... ... @@ -9,7 +9,7 @@
9 9  
10 10 #ifdef CONFIG_X86_OOSTORE
11 11  
12   -static u32 __init power2(u32 x)
  12 +static u32 __cpuinit power2(u32 x)
13 13 {
14 14 u32 s=1;
15 15 while(s<=x)
... ... @@ -22,7 +22,7 @@
22 22 * Set up an actual MCR
23 23 */
24 24  
25   -static void __init centaur_mcr_insert(int reg, u32 base, u32 size, int key)
  25 +static void __cpuinit centaur_mcr_insert(int reg, u32 base, u32 size, int key)
26 26 {
27 27 u32 lo, hi;
28 28  
... ... @@ -40,7 +40,7 @@
40 40 * Shortcut: We know you can't put 4Gig of RAM on a winchip
41 41 */
42 42  
43   -static u32 __init ramtop(void) /* 16388 */
  43 +static u32 __cpuinit ramtop(void) /* 16388 */
44 44 {
45 45 int i;
46 46 u32 top = 0;
... ... @@ -91,7 +91,7 @@
91 91 * Compute a set of MCR's to give maximum coverage
92 92 */
93 93  
94   -static int __init centaur_mcr_compute(int nr, int key)
  94 +static int __cpuinit centaur_mcr_compute(int nr, int key)
95 95 {
96 96 u32 mem = ramtop();
97 97 u32 root = power2(mem);
... ... @@ -166,7 +166,7 @@
166 166 return ct;
167 167 }
168 168  
169   -static void __init centaur_create_optimal_mcr(void)
  169 +static void __cpuinit centaur_create_optimal_mcr(void)
170 170 {
171 171 int i;
172 172 /*
... ... @@ -189,7 +189,7 @@
189 189 wrmsr(MSR_IDT_MCR0+i, 0, 0);
190 190 }
191 191  
192   -static void __init winchip2_create_optimal_mcr(void)
  192 +static void __cpuinit winchip2_create_optimal_mcr(void)
193 193 {
194 194 u32 lo, hi;
195 195 int i;
... ... @@ -227,7 +227,7 @@
227 227 * Handle the MCR key on the Winchip 2.
228 228 */
229 229  
230   -static void __init winchip2_unprotect_mcr(void)
  230 +static void __cpuinit winchip2_unprotect_mcr(void)
231 231 {
232 232 u32 lo, hi;
233 233 u32 key;
... ... @@ -239,7 +239,7 @@
239 239 wrmsr(MSR_IDT_MCR_CTRL, lo, hi);
240 240 }
241 241  
242   -static void __init winchip2_protect_mcr(void)
  242 +static void __cpuinit winchip2_protect_mcr(void)
243 243 {
244 244 u32 lo, hi;
245 245  
... ... @@ -257,7 +257,7 @@
257 257 #define RNG_ENABLED (1 << 3)
258 258 #define RNG_ENABLE (1 << 6) /* MSR_VIA_RNG */
259 259  
260   -static void __init init_c3(struct cpuinfo_x86 *c)
  260 +static void __cpuinit init_c3(struct cpuinfo_x86 *c)
261 261 {
262 262 u32 lo, hi;
263 263  
... ... @@ -303,7 +303,7 @@
303 303 display_cacheinfo(c);
304 304 }
305 305  
306   -static void __init init_centaur(struct cpuinfo_x86 *c)
  306 +static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
307 307 {
308 308 enum {
309 309 ECX8=1<<1,
arch/i386/kernel/cpu/common.c
Diff comments   View file @ b4af3f7
... ... @@ -36,7 +36,7 @@
36 36  
37 37 extern int disable_pse;
38 38  
39   -static void default_init(struct cpuinfo_x86 * c)
  39 +static void __cpuinit default_init(struct cpuinfo_x86 * c)
40 40 {
41 41 /* Not much we can do here... */
42 42 /* Check if at least it has cpuid */
arch/i386/kernel/cpu/cyrix.c
Diff comments   View file @ b4af3f7
... ... @@ -52,25 +52,25 @@
52 52 * Actually since bugs.h doesn't even reference this perhaps someone should
53 53 * fix the documentation ???
54 54 */
55   -static unsigned char Cx86_dir0_msb __initdata = 0;
  55 +static unsigned char Cx86_dir0_msb __cpuinitdata = 0;
56 56  
57   -static char Cx86_model[][9] __initdata = {
  57 +static char Cx86_model[][9] __cpuinitdata = {
58 58 "Cx486", "Cx486", "5x86 ", "6x86", "MediaGX ", "6x86MX ",
59 59 "M II ", "Unknown"
60 60 };
61   -static char Cx486_name[][5] __initdata = {
  61 +static char Cx486_name[][5] __cpuinitdata = {
62 62 "SLC", "DLC", "SLC2", "DLC2", "SRx", "DRx",
63 63 "SRx2", "DRx2"
64 64 };
65   -static char Cx486S_name[][4] __initdata = {
  65 +static char Cx486S_name[][4] __cpuinitdata = {
66 66 "S", "S2", "Se", "S2e"
67 67 };
68   -static char Cx486D_name[][4] __initdata = {
  68 +static char Cx486D_name[][4] __cpuinitdata = {
69 69 "DX", "DX2", "?", "?", "?", "DX4"
70 70 };
71   -static char Cx86_cb[] __initdata = "?.5x Core/Bus Clock";
72   -static char cyrix_model_mult1[] __initdata = "12??43";
73   -static char cyrix_model_mult2[] __initdata = "12233445";
  71 +static char Cx86_cb[] __cpuinitdata = "?.5x Core/Bus Clock";
  72 +static char cyrix_model_mult1[] __cpuinitdata = "12??43";
  73 +static char cyrix_model_mult2[] __cpuinitdata = "12233445";
74 74  
75 75 /*
76 76 * Reset the slow-loop (SLOP) bit on the 686(L) which is set by some old
... ... @@ -82,7 +82,7 @@
82 82  
83 83 extern void calibrate_delay(void) __init;
84 84  
85   -static void __init check_cx686_slop(struct cpuinfo_x86 *c)
  85 +static void __cpuinit check_cx686_slop(struct cpuinfo_x86 *c)
86 86 {
87 87 unsigned long flags;
88 88  
... ... @@ -107,7 +107,7 @@
107 107 }
108 108  
109 109  
110   -static void __init set_cx86_reorder(void)
  110 +static void __cpuinit set_cx86_reorder(void)
111 111 {
112 112 u8 ccr3;
113 113  
... ... @@ -122,7 +122,7 @@
122 122 setCx86(CX86_CCR3, ccr3);
123 123 }
124 124  
125   -static void __init set_cx86_memwb(void)
  125 +static void __cpuinit set_cx86_memwb(void)
126 126 {
127 127 u32 cr0;
128 128  
... ... @@ -137,7 +137,7 @@
137 137 setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14 );
138 138 }
139 139  
140   -static void __init set_cx86_inc(void)
  140 +static void __cpuinit set_cx86_inc(void)
141 141 {
142 142 unsigned char ccr3;
143 143  
... ... @@ -158,7 +158,7 @@
158 158 * Configure later MediaGX and/or Geode processor.
159 159 */
160 160  
161   -static void __init geode_configure(void)
  161 +static void __cpuinit geode_configure(void)
162 162 {
163 163 unsigned long flags;
164 164 u8 ccr3, ccr4;
165 165  
... ... @@ -184,14 +184,14 @@
184 184  
185 185  
186 186 #ifdef CONFIG_PCI
187   -static struct pci_device_id __initdata cyrix_55x0[] = {
  187 +static struct pci_device_id __cpuinitdata cyrix_55x0[] = {
188 188 { PCI_DEVICE(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510) },
189 189 { PCI_DEVICE(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520) },
190 190 { },
191 191 };
192 192 #endif
193 193  
194   -static void __init init_cyrix(struct cpuinfo_x86 *c)
  194 +static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
195 195 {
196 196 unsigned char dir0, dir0_msn, dir0_lsn, dir1 = 0;
197 197 char *buf = c->x86_model_id;
... ... @@ -346,7 +346,7 @@
346 346 /*
347 347 * Handle National Semiconductor branded processors
348 348 */
349   -static void __init init_nsc(struct cpuinfo_x86 *c)
  349 +static void __cpuinit init_nsc(struct cpuinfo_x86 *c)
350 350 {
351 351 /* There may be GX1 processors in the wild that are branded
352 352 * NSC and not Cyrix.
arch/i386/kernel/cpu/nexgen.c
Diff comments   View file @ b4af3f7
... ... @@ -27,7 +27,7 @@
27 27 return ret;
28 28 }
29 29  
30   -static void __init init_nexgen(struct cpuinfo_x86 * c)
  30 +static void __cpuinit init_nexgen(struct cpuinfo_x86 * c)
31 31 {
32 32 c->x86_cache_size = 256; /* A few had 1 MB... */
33 33 }
arch/i386/kernel/cpu/rise.c
Diff comments   View file @ b4af3f7
... ... @@ -5,7 +5,7 @@
5 5  
6 6 #include "cpu.h"
7 7  
8   -static void __init init_rise(struct cpuinfo_x86 *c)
  8 +static void __cpuinit init_rise(struct cpuinfo_x86 *c)
9 9 {
10 10 printk("CPU: Rise iDragon");
11 11 if (c->x86_model > 2)
arch/i386/kernel/cpu/transmeta.c
Diff comments   View file @ b4af3f7
... ... @@ -5,7 +5,7 @@
5 5 #include <asm/msr.h>
6 6 #include "cpu.h"
7 7  
8   -static void __init init_transmeta(struct cpuinfo_x86 *c)
  8 +static void __cpuinit init_transmeta(struct cpuinfo_x86 *c)
9 9 {
10 10 unsigned int cap_mask, uk, max, dummy;
11 11 unsigned int cms_rev1, cms_rev2;
arch/i386/kernel/cpu/umc.c
Diff comments   View file @ b4af3f7
... ... @@ -5,11 +5,7 @@
5 5  
6 6 /* UMC chips appear to be only either 386 or 486, so no special init takes place.
7 7 */
8   -static void __init init_umc(struct cpuinfo_x86 * c)
9   -{
10 8  
11   -}
12   -
13 9 static struct cpu_dev umc_cpu_dev __cpuinitdata = {
14 10 .c_vendor = "UMC",
15 11 .c_ident = { "UMC UMC UMC" },
... ... @@ -21,7 +17,6 @@
21 17 }
22 18 },
23 19 },
24   - .c_init = init_umc,
25 20 };
26 21  
27 22 int __init umc_init_cpu(void)