Commit c40fae9525e6c29c87a4f4361ff0a8d67a36e448
Committed by
Russell King
1 parent
f4e4c324a5
Exists in
master
and in
4 other branches
ARM: OMAP: Sync core code with linux-omap
This patch syncs omap specific core code with linux-omap. Most of the changes are needed to fix bitrot caused by driver updates in linux-omap tree. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Showing 14 changed files with 470 additions and 135 deletions Side-by-side Diff
- arch/arm/mach-omap1/Kconfig
- arch/arm/mach-omap1/devices.c
- arch/arm/mach-omap2/Kconfig
- arch/arm/mach-omap2/devices.c
- arch/arm/mach-omap2/gpmc.c
- arch/arm/mach-omap2/io.c
- arch/arm/plat-omap/Kconfig
- arch/arm/plat-omap/Makefile
- arch/arm/plat-omap/common.c
- arch/arm/plat-omap/devices.c
- arch/arm/plat-omap/dmtimer.c
- arch/arm/plat-omap/fb.c
- arch/arm/plat-omap/sram.c
- arch/arm/plat-omap/usb.c
arch/arm/mach-omap1/Kconfig
... | ... | @@ -22,6 +22,7 @@ |
22 | 22 | config MACH_OMAP_INNOVATOR |
23 | 23 | bool "TI Innovator" |
24 | 24 | depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX) |
25 | + select OMAP_MCBSP | |
25 | 26 | help |
26 | 27 | TI OMAP 1510 or 1610 Innovator board support. Say Y here if you |
27 | 28 | have such a board. |
... | ... | @@ -29,6 +30,7 @@ |
29 | 30 | config MACH_OMAP_H2 |
30 | 31 | bool "TI H2 Support" |
31 | 32 | depends on ARCH_OMAP1 && ARCH_OMAP16XX |
33 | + select OMAP_MCBSP | |
32 | 34 | help |
33 | 35 | TI OMAP 1610/1611B H2 board support. Say Y here if you have such |
34 | 36 | a board. |
... | ... | @@ -36,6 +38,7 @@ |
36 | 38 | config MACH_OMAP_H3 |
37 | 39 | bool "TI H3 Support" |
38 | 40 | depends on ARCH_OMAP1 && ARCH_OMAP16XX |
41 | + select GPIOEXPANDER_OMAP | |
39 | 42 | help |
40 | 43 | TI OMAP 1710 H3 board support. Say Y here if you have such |
41 | 44 | a board. |
arch/arm/mach-omap1/devices.c
... | ... | @@ -24,35 +24,6 @@ |
24 | 24 | #include <asm/arch/mux.h> |
25 | 25 | #include <asm/arch/gpio.h> |
26 | 26 | |
27 | -#if defined(CONFIG_OMAP1610_IR) || defined(CONFIG_OMAP161O_IR_MODULE) | |
28 | - | |
29 | -static u64 irda_dmamask = 0xffffffff; | |
30 | - | |
31 | -static struct platform_device omap1610ir_device = { | |
32 | - .name = "omap1610-ir", | |
33 | - .id = -1, | |
34 | - .dev = { | |
35 | - .dma_mask = &irda_dmamask, | |
36 | - }, | |
37 | -}; | |
38 | - | |
39 | -static void omap_init_irda(void) | |
40 | -{ | |
41 | - /* FIXME define and use a boot tag, members something like: | |
42 | - * u8 uart; // uart1, or uart3 | |
43 | - * ... but driver only handles uart3 for now | |
44 | - * s16 fir_sel; // gpio for SIR vs FIR | |
45 | - * ... may prefer a callback for SIR/MIR/FIR mode select; | |
46 | - * while h2 uses a GPIO, H3 uses a gpio expander | |
47 | - */ | |
48 | - if (machine_is_omap_h2() | |
49 | - || machine_is_omap_h3()) | |
50 | - (void) platform_device_register(&omap1610ir_device); | |
51 | -} | |
52 | -#else | |
53 | -static inline void omap_init_irda(void) {} | |
54 | -#endif | |
55 | - | |
56 | 27 | /*-------------------------------------------------------------------------*/ |
57 | 28 | |
58 | 29 | #if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE) |
... | ... | @@ -90,6 +61,45 @@ |
90 | 61 | static inline void omap_init_rtc(void) {} |
91 | 62 | #endif |
92 | 63 | |
64 | +#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) | |
65 | + | |
66 | +#if defined(CONFIG_ARCH_OMAP15XX) | |
67 | +# define OMAP1_MBOX_SIZE 0x23 | |
68 | +# define INT_DSP_MAILBOX1 INT_1510_DSP_MAILBOX1 | |
69 | +#elif defined(CONFIG_ARCH_OMAP16XX) | |
70 | +# define OMAP1_MBOX_SIZE 0x2f | |
71 | +# define INT_DSP_MAILBOX1 INT_1610_DSP_MAILBOX1 | |
72 | +#endif | |
73 | + | |
74 | +#define OMAP1_MBOX_BASE IO_ADDRESS(OMAP16XX_MAILBOX_BASE) | |
75 | + | |
76 | +static struct resource mbox_resources[] = { | |
77 | + { | |
78 | + .start = OMAP1_MBOX_BASE, | |
79 | + .end = OMAP1_MBOX_BASE + OMAP1_MBOX_SIZE, | |
80 | + .flags = IORESOURCE_MEM, | |
81 | + }, | |
82 | + { | |
83 | + .start = INT_DSP_MAILBOX1, | |
84 | + .flags = IORESOURCE_IRQ, | |
85 | + }, | |
86 | +}; | |
87 | + | |
88 | +static struct platform_device mbox_device = { | |
89 | + .name = "mailbox", | |
90 | + .id = -1, | |
91 | + .num_resources = ARRAY_SIZE(mbox_resources), | |
92 | + .resource = mbox_resources, | |
93 | +}; | |
94 | + | |
95 | +static inline void omap_init_mbox(void) | |
96 | +{ | |
97 | + platform_device_register(&mbox_device); | |
98 | +} | |
99 | +#else | |
100 | +static inline void omap_init_mbox(void) { } | |
101 | +#endif | |
102 | + | |
93 | 103 | #if defined(CONFIG_OMAP_STI) |
94 | 104 | |
95 | 105 | #define OMAP1_STI_BASE IO_ADDRESS(0xfffea000) |
... | ... | @@ -154,7 +164,8 @@ |
154 | 164 | /* please keep these calls, and their implementations above, |
155 | 165 | * in alphabetical order so they're easier to sort through. |
156 | 166 | */ |
157 | - omap_init_irda(); | |
167 | + | |
168 | + omap_init_mbox(); | |
158 | 169 | omap_init_rtc(); |
159 | 170 | omap_init_sti(); |
160 | 171 |
arch/arm/mach-omap2/Kconfig
arch/arm/mach-omap2/devices.c
... | ... | @@ -66,6 +66,40 @@ |
66 | 66 | |
67 | 67 | #endif |
68 | 68 | |
69 | +#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) | |
70 | +#define OMAP2_MBOX_BASE IO_ADDRESS(OMAP24XX_MAILBOX_BASE) | |
71 | + | |
72 | +static struct resource mbox_resources[] = { | |
73 | + { | |
74 | + .start = OMAP2_MBOX_BASE, | |
75 | + .end = OMAP2_MBOX_BASE + 0x11f, | |
76 | + .flags = IORESOURCE_MEM, | |
77 | + }, | |
78 | + { | |
79 | + .start = INT_24XX_MAIL_U0_MPU, | |
80 | + .flags = IORESOURCE_IRQ, | |
81 | + }, | |
82 | + { | |
83 | + .start = INT_24XX_MAIL_U3_MPU, | |
84 | + .flags = IORESOURCE_IRQ, | |
85 | + }, | |
86 | +}; | |
87 | + | |
88 | +static struct platform_device mbox_device = { | |
89 | + .name = "mailbox", | |
90 | + .id = -1, | |
91 | + .num_resources = ARRAY_SIZE(mbox_resources), | |
92 | + .resource = mbox_resources, | |
93 | +}; | |
94 | + | |
95 | +static inline void omap_init_mbox(void) | |
96 | +{ | |
97 | + platform_device_register(&mbox_device); | |
98 | +} | |
99 | +#else | |
100 | +static inline void omap_init_mbox(void) { } | |
101 | +#endif | |
102 | + | |
69 | 103 | #if defined(CONFIG_OMAP_STI) |
70 | 104 | |
71 | 105 | #define OMAP2_STI_BASE IO_ADDRESS(0x48068000) |
72 | 106 | |
73 | 107 | |
74 | 108 | |
75 | 109 | |
76 | 110 | |
77 | 111 | |
... | ... | @@ -111,29 +145,45 @@ |
111 | 145 | #define OMAP2_MCSPI1_BASE 0x48098000 |
112 | 146 | #define OMAP2_MCSPI2_BASE 0x4809a000 |
113 | 147 | |
114 | -/* FIXME: use resources instead */ | |
115 | - | |
116 | 148 | static struct omap2_mcspi_platform_config omap2_mcspi1_config = { |
117 | - .base = io_p2v(OMAP2_MCSPI1_BASE), | |
118 | 149 | .num_cs = 4, |
119 | 150 | }; |
120 | 151 | |
152 | +static struct resource omap2_mcspi1_resources[] = { | |
153 | + { | |
154 | + .start = OMAP2_MCSPI1_BASE, | |
155 | + .end = OMAP2_MCSPI1_BASE + 0xff, | |
156 | + .flags = IORESOURCE_MEM, | |
157 | + }, | |
158 | +}; | |
159 | + | |
121 | 160 | struct platform_device omap2_mcspi1 = { |
122 | 161 | .name = "omap2_mcspi", |
123 | 162 | .id = 1, |
163 | + .num_resources = ARRAY_SIZE(omap2_mcspi1_resources), | |
164 | + .resource = omap2_mcspi1_resources, | |
124 | 165 | .dev = { |
125 | 166 | .platform_data = &omap2_mcspi1_config, |
126 | 167 | }, |
127 | 168 | }; |
128 | 169 | |
129 | 170 | static struct omap2_mcspi_platform_config omap2_mcspi2_config = { |
130 | - .base = io_p2v(OMAP2_MCSPI2_BASE), | |
131 | 171 | .num_cs = 2, |
132 | 172 | }; |
133 | 173 | |
174 | +static struct resource omap2_mcspi2_resources[] = { | |
175 | + { | |
176 | + .start = OMAP2_MCSPI2_BASE, | |
177 | + .end = OMAP2_MCSPI2_BASE + 0xff, | |
178 | + .flags = IORESOURCE_MEM, | |
179 | + }, | |
180 | +}; | |
181 | + | |
134 | 182 | struct platform_device omap2_mcspi2 = { |
135 | 183 | .name = "omap2_mcspi", |
136 | 184 | .id = 2, |
185 | + .num_resources = ARRAY_SIZE(omap2_mcspi2_resources), | |
186 | + .resource = omap2_mcspi2_resources, | |
137 | 187 | .dev = { |
138 | 188 | .platform_data = &omap2_mcspi2_config, |
139 | 189 | }, |
... | ... | @@ -157,6 +207,7 @@ |
157 | 207 | * in alphabetical order so they're easier to sort through. |
158 | 208 | */ |
159 | 209 | omap_init_i2c(); |
210 | + omap_init_mbox(); | |
160 | 211 | omap_init_mcspi(); |
161 | 212 | omap_init_sti(); |
162 | 213 |
arch/arm/mach-omap2/gpmc.c
... | ... | @@ -246,14 +246,22 @@ |
246 | 246 | return l & (1 << 6); |
247 | 247 | } |
248 | 248 | |
249 | -static void gpmc_cs_set_reserved(int cs, int reserved) | |
249 | +int gpmc_cs_set_reserved(int cs, int reserved) | |
250 | 250 | { |
251 | + if (cs > GPMC_CS_NUM) | |
252 | + return -ENODEV; | |
253 | + | |
251 | 254 | gpmc_cs_map &= ~(1 << cs); |
252 | 255 | gpmc_cs_map |= (reserved ? 1 : 0) << cs; |
256 | + | |
257 | + return 0; | |
253 | 258 | } |
254 | 259 | |
255 | -static int gpmc_cs_reserved(int cs) | |
260 | +int gpmc_cs_reserved(int cs) | |
256 | 261 | { |
262 | + if (cs > GPMC_CS_NUM) | |
263 | + return -ENODEV; | |
264 | + | |
257 | 265 | return gpmc_cs_map & (1 << cs); |
258 | 266 | } |
259 | 267 |
arch/arm/mach-omap2/io.c
... | ... | @@ -40,9 +40,21 @@ |
40 | 40 | .type = MT_DEVICE |
41 | 41 | }, |
42 | 42 | { |
43 | - .virtual = L4_24XX_VIRT, | |
44 | - .pfn = __phys_to_pfn(L4_24XX_PHYS), | |
45 | - .length = L4_24XX_SIZE, | |
43 | + .virtual = DSP_MEM_24XX_VIRT, | |
44 | + .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), | |
45 | + .length = DSP_MEM_24XX_SIZE, | |
46 | + .type = MT_DEVICE | |
47 | + }, | |
48 | + { | |
49 | + .virtual = DSP_IPI_24XX_VIRT, | |
50 | + .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS), | |
51 | + .length = DSP_IPI_24XX_SIZE, | |
52 | + .type = MT_DEVICE | |
53 | + }, | |
54 | + { | |
55 | + .virtual = DSP_MMU_24XX_VIRT, | |
56 | + .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS), | |
57 | + .length = DSP_MMU_24XX_SIZE, | |
46 | 58 | .type = MT_DEVICE |
47 | 59 | } |
48 | 60 | }; |
arch/arm/plat-omap/Kconfig
... | ... | @@ -62,6 +62,14 @@ |
62 | 62 | to change the pin multiplexing setup. When there are no warnings |
63 | 63 | printed, it's safe to deselect OMAP_MUX for your product. |
64 | 64 | |
65 | +config OMAP_MCBSP | |
66 | + bool "McBSP support" | |
67 | + depends on ARCH_OMAP | |
68 | + default y | |
69 | + help | |
70 | + Say Y here if you want support for the OMAP Multichannel | |
71 | + Buffered Serial Port. | |
72 | + | |
65 | 73 | choice |
66 | 74 | prompt "System timer" |
67 | 75 | default OMAP_MPU_TIMER |
arch/arm/plat-omap/Makefile
arch/arm/plat-omap/common.c
... | ... | @@ -93,8 +93,12 @@ |
93 | 93 | * in the kernel. */ |
94 | 94 | for (i = 0; i < omap_board_config_size; i++) { |
95 | 95 | if (omap_board_config[i].tag == tag) { |
96 | - kinfo = &omap_board_config[i]; | |
97 | - break; | |
96 | + if (skip == 0) { | |
97 | + kinfo = &omap_board_config[i]; | |
98 | + break; | |
99 | + } else { | |
100 | + skip--; | |
101 | + } | |
98 | 102 | } |
99 | 103 | } |
100 | 104 | if (kinfo == NULL) |
arch/arm/plat-omap/devices.c
... | ... | @@ -25,8 +25,72 @@ |
25 | 25 | #include <asm/arch/gpio.h> |
26 | 26 | #include <asm/arch/menelaus.h> |
27 | 27 | |
28 | -#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) | |
28 | +#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) | |
29 | 29 | |
30 | +#include "../plat-omap/dsp/dsp_common.h" | |
31 | + | |
32 | +static struct dsp_platform_data dsp_pdata = { | |
33 | + .kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list), | |
34 | +}; | |
35 | + | |
36 | +static struct resource omap_dsp_resources[] = { | |
37 | + { | |
38 | + .name = "dsp_mmu", | |
39 | + .start = -1, | |
40 | + .flags = IORESOURCE_IRQ, | |
41 | + }, | |
42 | +}; | |
43 | + | |
44 | +static struct platform_device omap_dsp_device = { | |
45 | + .name = "dsp", | |
46 | + .id = -1, | |
47 | + .num_resources = ARRAY_SIZE(omap_dsp_resources), | |
48 | + .resource = omap_dsp_resources, | |
49 | + .dev = { | |
50 | + .platform_data = &dsp_pdata, | |
51 | + }, | |
52 | +}; | |
53 | + | |
54 | +static inline void omap_init_dsp(void) | |
55 | +{ | |
56 | + struct resource *res; | |
57 | + int irq; | |
58 | + | |
59 | + if (cpu_is_omap15xx()) | |
60 | + irq = INT_1510_DSP_MMU; | |
61 | + else if (cpu_is_omap16xx()) | |
62 | + irq = INT_1610_DSP_MMU; | |
63 | + else if (cpu_is_omap24xx()) | |
64 | + irq = INT_24XX_DSP_MMU; | |
65 | + | |
66 | + res = platform_get_resource_byname(&omap_dsp_device, | |
67 | + IORESOURCE_IRQ, "dsp_mmu"); | |
68 | + res->start = irq; | |
69 | + | |
70 | + platform_device_register(&omap_dsp_device); | |
71 | +} | |
72 | + | |
73 | +int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev) | |
74 | +{ | |
75 | + static DEFINE_MUTEX(dsp_pdata_lock); | |
76 | + | |
77 | + mutex_init(&kdev->lock); | |
78 | + | |
79 | + mutex_lock(&dsp_pdata_lock); | |
80 | + list_add_tail(&kdev->entry, &dsp_pdata.kdev_list); | |
81 | + mutex_unlock(&dsp_pdata_lock); | |
82 | + | |
83 | + return 0; | |
84 | +} | |
85 | +EXPORT_SYMBOL(dsp_kfunc_device_register); | |
86 | + | |
87 | +#else | |
88 | +static inline void omap_init_dsp(void) { } | |
89 | +#endif /* CONFIG_OMAP_DSP */ | |
90 | + | |
91 | +/*-------------------------------------------------------------------------*/ | |
92 | +#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) | |
93 | + | |
30 | 94 | #define OMAP1_I2C_BASE 0xfffb3800 |
31 | 95 | #define OMAP2_I2C_BASE1 0x48070000 |
32 | 96 | #define OMAP_I2C_SIZE 0x3f |
... | ... | @@ -376,7 +440,7 @@ |
376 | 440 | |
377 | 441 | /*-------------------------------------------------------------------------*/ |
378 | 442 | |
379 | -#if defined(CONFIG_OMAP_RNG) || defined(CONFIG_OMAP_RNG_MODULE) | |
443 | +#if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE) | |
380 | 444 | |
381 | 445 | #ifdef CONFIG_ARCH_OMAP24XX |
382 | 446 | #define OMAP_RNG_BASE 0x480A0000 |
... | ... | @@ -436,6 +500,7 @@ |
436 | 500 | /* please keep these calls, and their implementations above, |
437 | 501 | * in alphabetical order so they're easier to sort through. |
438 | 502 | */ |
503 | + omap_init_dsp(); | |
439 | 504 | omap_init_i2c(); |
440 | 505 | omap_init_kp(); |
441 | 506 | omap_init_mmc(); |
arch/arm/plat-omap/dmtimer.c
arch/arm/plat-omap/fb.c
1 | +/* | |
2 | + * File: arch/arm/plat-omap/fb.c | |
3 | + * | |
4 | + * Framebuffer device registration for TI OMAP platforms | |
5 | + * | |
6 | + * Copyright (C) 2006 Nokia Corporation | |
7 | + * Author: Imre Deak <imre.deak@nokia.com> | |
8 | + * | |
9 | + * This program is free software; you can redistribute it and/or modify it | |
10 | + * under the terms of the GNU General Public License as published by the | |
11 | + * Free Software Foundation; either version 2 of the License, or (at your | |
12 | + * option) any later version. | |
13 | + * | |
14 | + * This program is distributed in the hope that it will be useful, but | |
15 | + * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | + * General Public License for more details. | |
18 | + * | |
19 | + * You should have received a copy of the GNU General Public License along | |
20 | + * with this program; if not, write to the Free Software Foundation, Inc., | |
21 | + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | + */ | |
23 | + | |
1 | 24 | #include <linux/module.h> |
2 | 25 | #include <linux/kernel.h> |
3 | 26 | #include <linux/init.h> |
4 | 27 | |
5 | 28 | |
6 | 29 | |
7 | 30 | |
8 | 31 | |
... | ... | @@ -34,25 +57,42 @@ |
34 | 57 | void omapfb_reserve_mem(void) |
35 | 58 | { |
36 | 59 | const struct omap_fbmem_config *fbmem_conf; |
60 | + unsigned long total_size; | |
61 | + int i; | |
37 | 62 | |
38 | - omapfb_config.fbmem.fb_sram_start = omap_fb_sram_start; | |
39 | - omapfb_config.fbmem.fb_sram_size = omap_fb_sram_size; | |
63 | + if (!omap_fb_sram_valid) { | |
64 | + /* FBMEM SRAM configuration was already found to be invalid. | |
65 | + * Ignore the whole configuration block. */ | |
66 | + omapfb_config.mem_desc.region_cnt = 0; | |
67 | + return; | |
68 | + } | |
40 | 69 | |
41 | - fbmem_conf = omap_get_config(OMAP_TAG_FBMEM, struct omap_fbmem_config); | |
70 | + i = 0; | |
71 | + total_size = 0; | |
72 | + while ((fbmem_conf = omap_get_nr_config(OMAP_TAG_FBMEM, | |
73 | + struct omap_fbmem_config, i)) != NULL) { | |
74 | + unsigned long start; | |
75 | + unsigned long size; | |
42 | 76 | |
43 | - if (fbmem_conf != NULL) { | |
44 | - /* indicate that the bootloader already initialized the | |
45 | - * fb device, so we'll skip that part in the fb driver | |
46 | - */ | |
47 | - omapfb_config.fbmem.fb_sdram_start = fbmem_conf->fb_sdram_start; | |
48 | - omapfb_config.fbmem.fb_sdram_size = fbmem_conf->fb_sdram_size; | |
49 | - if (fbmem_conf->fb_sdram_size) { | |
50 | - pr_info("Reserving %u bytes SDRAM for frame buffer\n", | |
51 | - fbmem_conf->fb_sdram_size); | |
52 | - reserve_bootmem(fbmem_conf->fb_sdram_start, | |
53 | - fbmem_conf->fb_sdram_size); | |
77 | + if (i == OMAPFB_PLANE_NUM) { | |
78 | + printk(KERN_ERR "ignoring extra plane info\n"); | |
79 | + break; | |
54 | 80 | } |
81 | + start = fbmem_conf->start; | |
82 | + size = fbmem_conf->size; | |
83 | + omapfb_config.mem_desc.region[i].paddr = start; | |
84 | + omapfb_config.mem_desc.region[i].size = size; | |
85 | + if (omap_fb_sram_plane != i && start) { | |
86 | + reserve_bootmem(start, size); | |
87 | + total_size += size; | |
88 | + } | |
89 | + i++; | |
55 | 90 | } |
91 | + omapfb_config.mem_desc.region_cnt = i; | |
92 | + if (total_size) | |
93 | + pr_info("Reserving %lu bytes SDRAM for frame buffer\n", | |
94 | + total_size); | |
95 | + | |
56 | 96 | } |
57 | 97 | |
58 | 98 | void omapfb_set_ctrl_platform_data(void *data) |
arch/arm/plat-omap/sram.c
... | ... | @@ -46,12 +46,13 @@ |
46 | 46 | |
47 | 47 | #define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) |
48 | 48 | |
49 | +static unsigned long omap_sram_start; | |
49 | 50 | static unsigned long omap_sram_base; |
50 | 51 | static unsigned long omap_sram_size; |
51 | 52 | static unsigned long omap_sram_ceil; |
52 | 53 | |
53 | -unsigned long omap_fb_sram_start; | |
54 | -unsigned long omap_fb_sram_size; | |
54 | +int omap_fb_sram_plane = -1; | |
55 | +int omap_fb_sram_valid; | |
55 | 56 | |
56 | 57 | /* Depending on the target RAMFS firewall setup, the public usable amount of |
57 | 58 | * SRAM varies. The default accessable size for all device types is 2k. A GP |
58 | 59 | |
59 | 60 | |
60 | 61 | |
61 | 62 | |
... | ... | @@ -77,30 +78,43 @@ |
77 | 78 | return 1; /* assume locked with no PPA or security driver */ |
78 | 79 | } |
79 | 80 | |
80 | -void get_fb_sram_conf(unsigned long start_avail, unsigned size_avail, | |
81 | - unsigned long *start, unsigned long *size) | |
81 | +static int get_fb_sram_conf(unsigned long start_avail, unsigned size_avail, | |
82 | + unsigned long *start, int *plane_idx) | |
82 | 83 | { |
83 | 84 | const struct omap_fbmem_config *fbmem_conf; |
85 | + unsigned long size = 0; | |
86 | + int i; | |
84 | 87 | |
85 | - fbmem_conf = omap_get_config(OMAP_TAG_FBMEM, struct omap_fbmem_config); | |
86 | - if (fbmem_conf != NULL) { | |
87 | - *start = fbmem_conf->fb_sram_start; | |
88 | - *size = fbmem_conf->fb_sram_size; | |
89 | - } else { | |
90 | - *size = 0; | |
91 | - *start = 0; | |
92 | - } | |
88 | + i = 0; | |
89 | + *start = 0; | |
90 | + *plane_idx = -1; | |
91 | + while ((fbmem_conf = omap_get_nr_config(OMAP_TAG_FBMEM, | |
92 | + struct omap_fbmem_config, i)) != NULL) { | |
93 | + u32 paddr, end; | |
93 | 94 | |
94 | - if (*size && ( | |
95 | - *start < start_avail || | |
96 | - *start + *size > start_avail + size_avail)) { | |
97 | - printk(KERN_ERR "invalid FB SRAM configuration\n"); | |
98 | - *start = start_avail; | |
99 | - *size = size_avail; | |
95 | + paddr = fbmem_conf->start; | |
96 | + end = fbmem_conf->start + fbmem_conf->size; | |
97 | + if (paddr > omap_sram_start && | |
98 | + paddr < omap_sram_start + omap_sram_size) { | |
99 | + if (*plane_idx != -1 || paddr < start_avail || | |
100 | + paddr == end || | |
101 | + end > start_avail + size_avail) { | |
102 | + printk(KERN_ERR "invalid FB SRAM configuration"); | |
103 | + *start = 0; | |
104 | + return -1; | |
105 | + } | |
106 | + *plane_idx = i; | |
107 | + *start = fbmem_conf->start; | |
108 | + size = fbmem_conf->size; | |
109 | + } | |
110 | + i++; | |
100 | 111 | } |
101 | 112 | |
102 | - if (*size) | |
103 | - pr_info("Reserving %lu bytes SRAM for frame buffer\n", *size); | |
113 | + if (*plane_idx >= 0) | |
114 | + pr_info("Reserving %lu bytes SRAM frame buffer " | |
115 | + "for plane %d\n", size, *plane_idx); | |
116 | + | |
117 | + return 0; | |
104 | 118 | } |
105 | 119 | |
106 | 120 | /* |
107 | 121 | |
108 | 122 | |
... | ... | @@ -111,16 +125,16 @@ |
111 | 125 | */ |
112 | 126 | void __init omap_detect_sram(void) |
113 | 127 | { |
114 | - unsigned long sram_start; | |
128 | + unsigned long fb_sram_start; | |
115 | 129 | |
116 | 130 | if (cpu_is_omap24xx()) { |
117 | 131 | if (is_sram_locked()) { |
118 | 132 | omap_sram_base = OMAP2_SRAM_PUB_VA; |
119 | - sram_start = OMAP2_SRAM_PUB_PA; | |
133 | + omap_sram_start = OMAP2_SRAM_PUB_PA; | |
120 | 134 | omap_sram_size = 0x800; /* 2K */ |
121 | 135 | } else { |
122 | 136 | omap_sram_base = OMAP2_SRAM_VA; |
123 | - sram_start = OMAP2_SRAM_PA; | |
137 | + omap_sram_start = OMAP2_SRAM_PA; | |
124 | 138 | if (cpu_is_omap242x()) |
125 | 139 | omap_sram_size = 0xa0000; /* 640K */ |
126 | 140 | else if (cpu_is_omap243x()) |
... | ... | @@ -128,7 +142,7 @@ |
128 | 142 | } |
129 | 143 | } else { |
130 | 144 | omap_sram_base = OMAP1_SRAM_VA; |
131 | - sram_start = OMAP1_SRAM_PA; | |
145 | + omap_sram_start = OMAP1_SRAM_PA; | |
132 | 146 | |
133 | 147 | if (cpu_is_omap730()) |
134 | 148 | omap_sram_size = 0x32000; /* 200K */ |
... | ... | @@ -144,12 +158,13 @@ |
144 | 158 | omap_sram_size = 0x4000; |
145 | 159 | } |
146 | 160 | } |
147 | - get_fb_sram_conf(sram_start + SRAM_BOOTLOADER_SZ, | |
148 | - omap_sram_size - SRAM_BOOTLOADER_SZ, | |
149 | - &omap_fb_sram_start, &omap_fb_sram_size); | |
150 | - if (omap_fb_sram_size) | |
151 | - omap_sram_size -= sram_start + omap_sram_size - | |
152 | - omap_fb_sram_start; | |
161 | + if (get_fb_sram_conf(omap_sram_start + SRAM_BOOTLOADER_SZ, | |
162 | + omap_sram_size - SRAM_BOOTLOADER_SZ, | |
163 | + &fb_sram_start, &omap_fb_sram_plane) == 0) | |
164 | + omap_fb_sram_valid = 1; | |
165 | + if (omap_fb_sram_valid && omap_fb_sram_plane >= 0) | |
166 | + omap_sram_size -= omap_sram_start + omap_sram_size - | |
167 | + fb_sram_start; | |
153 | 168 | omap_sram_ceil = omap_sram_base + omap_sram_size; |
154 | 169 | } |
155 | 170 |
arch/arm/plat-omap/usb.c
... | ... | @@ -37,9 +37,27 @@ |
37 | 37 | #include <asm/arch/usb.h> |
38 | 38 | #include <asm/arch/board.h> |
39 | 39 | |
40 | +#ifdef CONFIG_ARCH_OMAP1 | |
41 | + | |
42 | +#define INT_USB_IRQ_GEN IH2_BASE + 20 | |
43 | +#define INT_USB_IRQ_NISO IH2_BASE + 30 | |
44 | +#define INT_USB_IRQ_ISO IH2_BASE + 29 | |
45 | +#define INT_USB_IRQ_HGEN INT_USB_HHC_1 | |
46 | +#define INT_USB_IRQ_OTG IH2_BASE + 8 | |
47 | + | |
48 | +#else | |
49 | + | |
50 | +#define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN | |
51 | +#define INT_USB_IRQ_NISO INT_24XX_USB_IRQ_NISO | |
52 | +#define INT_USB_IRQ_ISO INT_24XX_USB_IRQ_ISO | |
53 | +#define INT_USB_IRQ_HGEN INT_24XX_USB_IRQ_HGEN | |
54 | +#define INT_USB_IRQ_OTG INT_24XX_USB_IRQ_OTG | |
55 | + | |
56 | +#endif | |
57 | + | |
58 | + | |
40 | 59 | /* These routines should handle the standard chip-specific modes |
41 | 60 | * for usb0/1/2 ports, covering basic mux and transceiver setup. |
42 | - * Call omap_usb_init() once, from INIT_MACHINE(). | |
43 | 61 | * |
44 | 62 | * Some board-*.c files will need to set up additional mux options, |
45 | 63 | * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup. |
46 | 64 | |
47 | 65 | |
48 | 66 | |
... | ... | @@ -96,19 +114,26 @@ |
96 | 114 | { |
97 | 115 | u32 syscon1 = 0; |
98 | 116 | |
117 | + if (cpu_is_omap24xx()) | |
118 | + CONTROL_DEVCONF_REG &= ~USBT0WRMODEI(USB_BIDIR_TLL); | |
119 | + | |
99 | 120 | if (nwires == 0) { |
100 | - if (!cpu_is_omap15xx()) { | |
121 | + if (cpu_class_is_omap1() && !cpu_is_omap15xx()) { | |
101 | 122 | /* pulldown D+/D- */ |
102 | 123 | USB_TRANSCEIVER_CTRL_REG &= ~(3 << 1); |
103 | 124 | } |
104 | 125 | return 0; |
105 | 126 | } |
106 | 127 | |
107 | - if (is_device) | |
108 | - omap_cfg_reg(W4_USB_PUEN); | |
128 | + if (is_device) { | |
129 | + if (cpu_is_omap24xx()) | |
130 | + omap_cfg_reg(J20_24XX_USB0_PUEN); | |
131 | + else | |
132 | + omap_cfg_reg(W4_USB_PUEN); | |
133 | + } | |
109 | 134 | |
110 | - /* internal transceiver */ | |
111 | - if (nwires == 2) { | |
135 | + /* internal transceiver (unavailable on 17xx, 24xx) */ | |
136 | + if (!cpu_class_is_omap2() && nwires == 2) { | |
112 | 137 | // omap_cfg_reg(P9_USB_DP); |
113 | 138 | // omap_cfg_reg(R8_USB_DM); |
114 | 139 | |
115 | 140 | |
116 | 141 | |
117 | 142 | |
118 | 143 | |
119 | 144 | |
... | ... | @@ -136,29 +161,50 @@ |
136 | 161 | return 0; |
137 | 162 | } |
138 | 163 | |
139 | - omap_cfg_reg(V6_USB0_TXD); | |
140 | - omap_cfg_reg(W9_USB0_TXEN); | |
141 | - omap_cfg_reg(W5_USB0_SE0); | |
164 | + if (cpu_is_omap24xx()) { | |
165 | + omap_cfg_reg(K18_24XX_USB0_DAT); | |
166 | + omap_cfg_reg(K19_24XX_USB0_TXEN); | |
167 | + omap_cfg_reg(J14_24XX_USB0_SE0); | |
168 | + if (nwires != 3) | |
169 | + omap_cfg_reg(J18_24XX_USB0_RCV); | |
170 | + } else { | |
171 | + omap_cfg_reg(V6_USB0_TXD); | |
172 | + omap_cfg_reg(W9_USB0_TXEN); | |
173 | + omap_cfg_reg(W5_USB0_SE0); | |
174 | + if (nwires != 3) | |
175 | + omap_cfg_reg(Y5_USB0_RCV); | |
176 | + } | |
142 | 177 | |
143 | - /* NOTE: SPEED and SUSP aren't configured here */ | |
178 | + /* NOTE: SPEED and SUSP aren't configured here. OTG hosts | |
179 | + * may be able to use I2C requests to set those bits along | |
180 | + * with VBUS switching and overcurrent detction. | |
181 | + */ | |
144 | 182 | |
145 | - if (nwires != 3) | |
146 | - omap_cfg_reg(Y5_USB0_RCV); | |
147 | - if (nwires != 6) | |
183 | + if (cpu_class_is_omap1() && nwires != 6) | |
148 | 184 | USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB2_UNI_R; |
149 | 185 | |
150 | 186 | switch (nwires) { |
151 | 187 | case 3: |
152 | 188 | syscon1 = 2; |
189 | + if (cpu_is_omap24xx()) | |
190 | + CONTROL_DEVCONF_REG |= USBT0WRMODEI(USB_BIDIR); | |
153 | 191 | break; |
154 | 192 | case 4: |
155 | 193 | syscon1 = 1; |
194 | + if (cpu_is_omap24xx()) | |
195 | + CONTROL_DEVCONF_REG |= USBT0WRMODEI(USB_BIDIR); | |
156 | 196 | break; |
157 | 197 | case 6: |
158 | 198 | syscon1 = 3; |
159 | - omap_cfg_reg(AA9_USB0_VP); | |
160 | - omap_cfg_reg(R9_USB0_VM); | |
161 | - USB_TRANSCEIVER_CTRL_REG |= CONF_USB2_UNI_R; | |
199 | + if (cpu_is_omap24xx()) { | |
200 | + omap_cfg_reg(J19_24XX_USB0_VP); | |
201 | + omap_cfg_reg(K20_24XX_USB0_VM); | |
202 | + CONTROL_DEVCONF_REG |= USBT0WRMODEI(USB_UNIDIR); | |
203 | + } else { | |
204 | + omap_cfg_reg(AA9_USB0_VP); | |
205 | + omap_cfg_reg(R9_USB0_VM); | |
206 | + USB_TRANSCEIVER_CTRL_REG |= CONF_USB2_UNI_R; | |
207 | + } | |
162 | 208 | break; |
163 | 209 | default: |
164 | 210 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", |
165 | 211 | |
166 | 212 | |
... | ... | @@ -171,14 +217,22 @@ |
171 | 217 | { |
172 | 218 | u32 syscon1 = 0; |
173 | 219 | |
174 | - if (nwires != 6 && !cpu_is_omap15xx()) | |
220 | + if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) | |
175 | 221 | USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB1_UNI_R; |
222 | + if (cpu_is_omap24xx()) | |
223 | + CONTROL_DEVCONF_REG &= ~USBT1WRMODEI(USB_BIDIR_TLL); | |
224 | + | |
176 | 225 | if (nwires == 0) |
177 | 226 | return 0; |
178 | 227 | |
179 | 228 | /* external transceiver */ |
180 | - omap_cfg_reg(USB1_TXD); | |
181 | - omap_cfg_reg(USB1_TXEN); | |
229 | + if (cpu_class_is_omap1()) { | |
230 | + omap_cfg_reg(USB1_TXD); | |
231 | + omap_cfg_reg(USB1_TXEN); | |
232 | + if (nwires != 3) | |
233 | + omap_cfg_reg(USB1_RCV); | |
234 | + } | |
235 | + | |
182 | 236 | if (cpu_is_omap15xx()) { |
183 | 237 | omap_cfg_reg(USB1_SEO); |
184 | 238 | omap_cfg_reg(USB1_SPEED); |
185 | 239 | |
186 | 240 | |
187 | 241 | |
188 | 242 | |
189 | 243 | |
190 | 244 | |
... | ... | @@ -190,20 +244,38 @@ |
190 | 244 | } else if (cpu_is_omap1710()) { |
191 | 245 | omap_cfg_reg(R13_1710_USB1_SE0); |
192 | 246 | // SUSP |
247 | + } else if (cpu_is_omap24xx()) { | |
248 | + /* NOTE: board-specific code must set up pin muxing for usb1, | |
249 | + * since each signal could come out on either of two balls. | |
250 | + */ | |
193 | 251 | } else { |
194 | - pr_debug("usb unrecognized\n"); | |
252 | + pr_debug("usb%d cpu unrecognized\n", 1); | |
253 | + return 0; | |
195 | 254 | } |
196 | - if (nwires != 3) | |
197 | - omap_cfg_reg(USB1_RCV); | |
198 | 255 | |
199 | 256 | switch (nwires) { |
257 | + case 2: | |
258 | + if (!cpu_is_omap24xx()) | |
259 | + goto bad; | |
260 | + /* NOTE: board-specific code must override this setting if | |
261 | + * this TLL link is not using DP/DM | |
262 | + */ | |
263 | + syscon1 = 1; | |
264 | + CONTROL_DEVCONF_REG |= USBT1WRMODEI(USB_BIDIR_TLL); | |
265 | + break; | |
200 | 266 | case 3: |
201 | 267 | syscon1 = 2; |
268 | + if (cpu_is_omap24xx()) | |
269 | + CONTROL_DEVCONF_REG |= USBT1WRMODEI(USB_BIDIR); | |
202 | 270 | break; |
203 | 271 | case 4: |
204 | 272 | syscon1 = 1; |
273 | + if (cpu_is_omap24xx()) | |
274 | + CONTROL_DEVCONF_REG |= USBT1WRMODEI(USB_BIDIR); | |
205 | 275 | break; |
206 | 276 | case 6: |
277 | + if (cpu_is_omap24xx()) | |
278 | + goto bad; | |
207 | 279 | syscon1 = 3; |
208 | 280 | omap_cfg_reg(USB1_VP); |
209 | 281 | omap_cfg_reg(USB1_VM); |
... | ... | @@ -211,6 +283,7 @@ |
211 | 283 | USB_TRANSCEIVER_CTRL_REG |= CONF_USB1_UNI_R; |
212 | 284 | break; |
213 | 285 | default: |
286 | +bad: | |
214 | 287 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", |
215 | 288 | 1, nwires); |
216 | 289 | } |
217 | 290 | |
... | ... | @@ -221,10 +294,17 @@ |
221 | 294 | { |
222 | 295 | u32 syscon1 = 0; |
223 | 296 | |
224 | - /* NOTE erratum: must leave USB2_UNI_R set if usb0 in use */ | |
297 | + if (cpu_is_omap24xx()) { | |
298 | + CONTROL_DEVCONF_REG &= ~(USBT2WRMODEI(USB_BIDIR_TLL) | |
299 | + | USBT2TLL5PI); | |
300 | + alt_pingroup = 0; | |
301 | + } | |
302 | + | |
303 | + /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */ | |
225 | 304 | if (alt_pingroup || nwires == 0) |
226 | 305 | return 0; |
227 | - if (nwires != 6 && !cpu_is_omap15xx()) | |
306 | + | |
307 | + if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) | |
228 | 308 | USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB2_UNI_R; |
229 | 309 | |
230 | 310 | /* external transceiver */ |
231 | 311 | |
232 | 312 | |
233 | 313 | |
234 | 314 | |
235 | 315 | |
236 | 316 | |
237 | 317 | |
... | ... | @@ -242,19 +322,54 @@ |
242 | 322 | if (nwires != 3) |
243 | 323 | omap_cfg_reg(Y5_USB2_RCV); |
244 | 324 | // FIXME omap_cfg_reg(USB2_SPEED); |
325 | + } else if (cpu_is_omap24xx()) { | |
326 | + omap_cfg_reg(Y11_24XX_USB2_DAT); | |
327 | + omap_cfg_reg(AA10_24XX_USB2_SE0); | |
328 | + if (nwires > 2) | |
329 | + omap_cfg_reg(AA12_24XX_USB2_TXEN); | |
330 | + if (nwires > 3) | |
331 | + omap_cfg_reg(AA6_24XX_USB2_RCV); | |
245 | 332 | } else { |
246 | - pr_debug("usb unrecognized\n"); | |
333 | + pr_debug("usb%d cpu unrecognized\n", 1); | |
334 | + return 0; | |
247 | 335 | } |
248 | - // omap_cfg_reg(USB2_SUSP); | |
336 | + // if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP); | |
249 | 337 | |
250 | 338 | switch (nwires) { |
339 | + case 2: | |
340 | + if (!cpu_is_omap24xx()) | |
341 | + goto bad; | |
342 | + /* NOTE: board-specific code must override this setting if | |
343 | + * this TLL link is not using DP/DM | |
344 | + */ | |
345 | + syscon1 = 1; | |
346 | + CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_BIDIR_TLL); | |
347 | + break; | |
251 | 348 | case 3: |
252 | 349 | syscon1 = 2; |
350 | + if (cpu_is_omap24xx()) | |
351 | + CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_BIDIR); | |
253 | 352 | break; |
254 | 353 | case 4: |
255 | 354 | syscon1 = 1; |
355 | + if (cpu_is_omap24xx()) | |
356 | + CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_BIDIR); | |
256 | 357 | break; |
358 | + case 5: | |
359 | + if (!cpu_is_omap24xx()) | |
360 | + goto bad; | |
361 | + omap_cfg_reg(AA4_24XX_USB2_TLLSE0); | |
362 | + /* NOTE: board-specific code must override this setting if | |
363 | + * this TLL link is not using DP/DM. Something must also | |
364 | + * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED} | |
365 | + */ | |
366 | + syscon1 = 3; | |
367 | + CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_UNIDIR_TLL) | |
368 | + | USBT2TLL5PI; | |
369 | + break; | |
257 | 370 | case 6: |
371 | + if (cpu_is_omap24xx()) | |
372 | + goto bad; | |
258 | 373 | syscon1 = 3; |
259 | 374 | if (cpu_is_omap15xx()) { |
260 | 375 | omap_cfg_reg(USB2_VP); |
... | ... | @@ -266,6 +381,7 @@ |
266 | 381 | } |
267 | 382 | break; |
268 | 383 | default: |
384 | +bad: | |
269 | 385 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", |
270 | 386 | 2, nwires); |
271 | 387 | } |
272 | 388 | |
273 | 389 | |
... | ... | @@ -294,13 +410,13 @@ |
294 | 410 | .end = UDC_BASE + 0xff, |
295 | 411 | .flags = IORESOURCE_MEM, |
296 | 412 | }, { /* general IRQ */ |
297 | - .start = IH2_BASE + 20, | |
413 | + .start = INT_USB_IRQ_GEN, | |
298 | 414 | .flags = IORESOURCE_IRQ, |
299 | 415 | }, { /* PIO IRQ */ |
300 | - .start = IH2_BASE + 30, | |
416 | + .start = INT_USB_IRQ_NISO, | |
301 | 417 | .flags = IORESOURCE_IRQ, |
302 | 418 | }, { /* SOF IRQ */ |
303 | - .start = IH2_BASE + 29, | |
419 | + .start = INT_USB_IRQ_ISO, | |
304 | 420 | .flags = IORESOURCE_IRQ, |
305 | 421 | }, |
306 | 422 | }; |
307 | 423 | |
... | ... | @@ -329,11 +445,11 @@ |
329 | 445 | static struct resource ohci_resources[] = { |
330 | 446 | { |
331 | 447 | .start = OMAP_OHCI_BASE, |
332 | - .end = OMAP_OHCI_BASE + 4096 - 1, | |
448 | + .end = OMAP_OHCI_BASE + 0xff, | |
333 | 449 | .flags = IORESOURCE_MEM, |
334 | 450 | }, |
335 | 451 | { |
336 | - .start = INT_USB_HHC_1, | |
452 | + .start = INT_USB_IRQ_HGEN, | |
337 | 453 | .flags = IORESOURCE_IRQ, |
338 | 454 | }, |
339 | 455 | }; |
... | ... | @@ -361,7 +477,7 @@ |
361 | 477 | .end = OTG_BASE + 0xff, |
362 | 478 | .flags = IORESOURCE_MEM, |
363 | 479 | }, { |
364 | - .start = IH2_BASE + 8, | |
480 | + .start = INT_USB_IRQ_OTG, | |
365 | 481 | .flags = IORESOURCE_IRQ, |
366 | 482 | }, |
367 | 483 | }; |
... | ... | @@ -385,7 +501,7 @@ |
385 | 501 | |
386 | 502 | |
387 | 503 | // FIXME correct answer depends on hmc_mode, |
388 | -// as does any nonzero value for config->otg port number | |
504 | +// as does (on omap1) any nonzero value for config->otg port number | |
389 | 505 | #ifdef CONFIG_USB_GADGET_OMAP |
390 | 506 | #define is_usb0_device(config) 1 |
391 | 507 | #else |
392 | 508 | |
... | ... | @@ -426,12 +542,13 @@ |
426 | 542 | if (config->otg) |
427 | 543 | syscon |= OTG_EN; |
428 | 544 | #endif |
429 | - pr_debug("USB_TRANSCEIVER_CTRL_REG = %03x\n", USB_TRANSCEIVER_CTRL_REG); | |
545 | + if (cpu_class_is_omap1()) | |
546 | + pr_debug("USB_TRANSCEIVER_CTRL_REG = %03x\n", USB_TRANSCEIVER_CTRL_REG); | |
430 | 547 | pr_debug("OTG_SYSCON_2_REG = %08x\n", syscon); |
431 | 548 | OTG_SYSCON_2_REG = syscon; |
432 | 549 | |
433 | 550 | printk("USB: hmc %d", config->hmc_mode); |
434 | - if (alt_pingroup) | |
551 | + if (!alt_pingroup) | |
435 | 552 | printk(", usb2 alt %d wires", config->pins[2]); |
436 | 553 | else if (config->pins[0]) |
437 | 554 | printk(", usb0 %d wires%s", config->pins[0], |
... | ... | @@ -444,10 +561,12 @@ |
444 | 561 | printk(", Mini-AB on usb%d", config->otg - 1); |
445 | 562 | printk("\n"); |
446 | 563 | |
447 | - /* leave USB clocks/controllers off until needed */ | |
448 | - ULPD_SOFT_REQ_REG &= ~SOFT_USB_CLK_REQ; | |
449 | - ULPD_CLOCK_CTRL_REG &= ~USB_MCLK_EN; | |
450 | - ULPD_CLOCK_CTRL_REG |= DIS_USB_PVCI_CLK; | |
564 | + if (cpu_class_is_omap1()) { | |
565 | + /* leave USB clocks/controllers off until needed */ | |
566 | + ULPD_SOFT_REQ_REG &= ~SOFT_USB_CLK_REQ; | |
567 | + ULPD_CLOCK_CTRL_REG &= ~USB_MCLK_EN; | |
568 | + ULPD_CLOCK_CTRL_REG |= DIS_USB_PVCI_CLK; | |
569 | + } | |
451 | 570 | syscon = OTG_SYSCON_1_REG; |
452 | 571 | syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN; |
453 | 572 | |
... | ... | @@ -585,7 +704,7 @@ |
585 | 704 | } |
586 | 705 | platform_data = *config; |
587 | 706 | |
588 | - if (cpu_is_omap730() || cpu_is_omap16xx()) | |
707 | + if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx()) | |
589 | 708 | omap_otg_init(&platform_data); |
590 | 709 | else if (cpu_is_omap15xx()) |
591 | 710 | omap_1510_usb_init(&platform_data); |