Add CPER PCIe error section structure and constants definition

On some machine, PCIe error is reported via APEI (ACPI Platform Error Interface). The error data is passed from firmware to Linux via CPER PCIe error section structure. This patch adds CPER PCIe error section structure and constants definition. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>

Add CPER PCIe error section structure and constants definition
On some machine, PCIe error is reported via APEI (ACPI Platform Error Interface). The error data is passed from firmware to Linux via CPER PCIe error section structure. This patch adds CPER PCIe error section structure and constants definition. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
Huang Ying · Len Brown
1 parent cf7d7e5a19
Showing 1 changed file with 82 additions and 4 deletions Side-by-side Diff
include/linux/cper.h
@@ -39,10 +39,12 @@
  * Severity difinition for error_severity in struct cper_record_header
  * and section_severity in struct cper_section_descriptor
  */
-#define CPER_SEV_RECOVERABLE			0x0
-#define CPER_SEV_FATAL				0x1
-#define CPER_SEV_CORRECTED			0x2
-#define CPER_SEV_INFORMATIONAL			0x3
+enum {
+	CPER_SEV_RECOVERABLE,
+	CPER_SEV_FATAL,
+	CPER_SEV_CORRECTED,
+	CPER_SEV_INFORMATIONAL,
+};
  
 /*
  * Validation bits difinition for validation_bits in struct
@@ -201,6 +203,47 @@
 	UUID_LE(0x036F84E1, 0x7F37, 0x428c, 0xA7, 0x9E, 0x57, 0x5F,	\
 		0xDF, 0xAA, 0x84, 0xEC)
  
+#define CPER_PROC_VALID_TYPE			0x0001
+#define CPER_PROC_VALID_ISA			0x0002
+#define CPER_PROC_VALID_ERROR_TYPE		0x0004
+#define CPER_PROC_VALID_OPERATION		0x0008
+#define CPER_PROC_VALID_FLAGS			0x0010
+#define CPER_PROC_VALID_LEVEL			0x0020
+#define CPER_PROC_VALID_VERSION			0x0040
+#define CPER_PROC_VALID_BRAND_INFO		0x0080
+#define CPER_PROC_VALID_ID			0x0100
+#define CPER_PROC_VALID_TARGET_ADDRESS		0x0200
+#define CPER_PROC_VALID_REQUESTOR_ID		0x0400
+#define CPER_PROC_VALID_RESPONDER_ID		0x0800
+#define CPER_PROC_VALID_IP			0x1000
+
+#define CPER_MEM_VALID_ERROR_STATUS		0x0001
+#define CPER_MEM_VALID_PHYSICAL_ADDRESS		0x0002
+#define CPER_MEM_VALID_PHYSICAL_ADDRESS_MASK	0x0004
+#define CPER_MEM_VALID_NODE			0x0008
+#define CPER_MEM_VALID_CARD			0x0010
+#define CPER_MEM_VALID_MODULE			0x0020
+#define CPER_MEM_VALID_BANK			0x0040
+#define CPER_MEM_VALID_DEVICE			0x0080
+#define CPER_MEM_VALID_ROW			0x0100
+#define CPER_MEM_VALID_COLUMN			0x0200
+#define CPER_MEM_VALID_BIT_POSITION		0x0400
+#define CPER_MEM_VALID_REQUESTOR_ID		0x0800
+#define CPER_MEM_VALID_RESPONDER_ID		0x1000
+#define CPER_MEM_VALID_TARGET_ID		0x2000
+#define CPER_MEM_VALID_ERROR_TYPE		0x4000
+
+#define CPER_PCIE_VALID_PORT_TYPE		0x0001
+#define CPER_PCIE_VALID_VERSION			0x0002
+#define CPER_PCIE_VALID_COMMAND_STATUS		0x0004
+#define CPER_PCIE_VALID_DEVICE_ID		0x0008
+#define CPER_PCIE_VALID_SERIAL_NUMBER		0x0010
+#define CPER_PCIE_VALID_BRIDGE_CONTROL_STATUS	0x0020
+#define CPER_PCIE_VALID_CAPABILITY		0x0040
+#define CPER_PCIE_VALID_AER_INFO		0x0080
+
+#define CPER_PCIE_SLOT_SHIFT			3
+
 /*
  * All tables and structs must be byte-packed to match CPER
  * specification, since the tables are provided by the system BIOS
@@ -304,6 +347,41 @@
 	__u64	responder_id;
 	__u64	target_id;
 	__u8	error_type;
+};
+
+struct cper_sec_pcie {
+	__u64		validation_bits;
+	__u32		port_type;
+	struct {
+		__u8	minor;
+		__u8	major;
+		__u8	reserved[2];
+	}		version;
+	__u16		command;
+	__u16		status;
+	__u32		reserved;
+	struct {
+		__u16	vendor_id;
+		__u16	device_id;
+		__u8	class_code[3];
+		__u8	function;
+		__u8	device;
+		__u16	segment;
+		__u8	bus;
+		__u8	secondary_bus;
+		__u16	slot;
+		__u8	reserved;
+	}		device_id;
+	struct {
+		__u32	lower;
+		__u32	upper;
+	}		serial_number;
+	struct {
+		__u16	secondary_status;
+		__u16	control;
+	}		bridge;
+	__u8	capability[60];
+	__u8	aer_info[96];
 };
  
 /* Reset to default packing */
...	...	@@ -39,10 +39,12 @@
39	39	* Severity difinition for error_severity in struct cper_record_header
40	40	* and section_severity in struct cper_section_descriptor
41	41	*/
42		-#define CPER_SEV_RECOVERABLE 0x0
43		-#define CPER_SEV_FATAL 0x1
44		-#define CPER_SEV_CORRECTED 0x2
45		-#define CPER_SEV_INFORMATIONAL 0x3
	42	+enum {
	43	+ CPER_SEV_RECOVERABLE,
	44	+ CPER_SEV_FATAL,
	45	+ CPER_SEV_CORRECTED,
	46	+ CPER_SEV_INFORMATIONAL,
	47	+};
46	48
47	49	/*
48	50	* Validation bits difinition for validation_bits in struct
...	...	@@ -201,6 +203,47 @@
201	203	UUID_LE(0x036F84E1, 0x7F37, 0x428c, 0xA7, 0x9E, 0x57, 0x5F, \
202	204	0xDF, 0xAA, 0x84, 0xEC)
203	205
	206	+#define CPER_PROC_VALID_TYPE 0x0001
	207	+#define CPER_PROC_VALID_ISA 0x0002
	208	+#define CPER_PROC_VALID_ERROR_TYPE 0x0004
	209	+#define CPER_PROC_VALID_OPERATION 0x0008
	210	+#define CPER_PROC_VALID_FLAGS 0x0010
	211	+#define CPER_PROC_VALID_LEVEL 0x0020
	212	+#define CPER_PROC_VALID_VERSION 0x0040
	213	+#define CPER_PROC_VALID_BRAND_INFO 0x0080
	214	+#define CPER_PROC_VALID_ID 0x0100
	215	+#define CPER_PROC_VALID_TARGET_ADDRESS 0x0200
	216	+#define CPER_PROC_VALID_REQUESTOR_ID 0x0400
	217	+#define CPER_PROC_VALID_RESPONDER_ID 0x0800
	218	+#define CPER_PROC_VALID_IP 0x1000
	219	+
	220	+#define CPER_MEM_VALID_ERROR_STATUS 0x0001
	221	+#define CPER_MEM_VALID_PHYSICAL_ADDRESS 0x0002
	222	+#define CPER_MEM_VALID_PHYSICAL_ADDRESS_MASK 0x0004
	223	+#define CPER_MEM_VALID_NODE 0x0008
	224	+#define CPER_MEM_VALID_CARD 0x0010
	225	+#define CPER_MEM_VALID_MODULE 0x0020
	226	+#define CPER_MEM_VALID_BANK 0x0040
	227	+#define CPER_MEM_VALID_DEVICE 0x0080
	228	+#define CPER_MEM_VALID_ROW 0x0100
	229	+#define CPER_MEM_VALID_COLUMN 0x0200
	230	+#define CPER_MEM_VALID_BIT_POSITION 0x0400
	231	+#define CPER_MEM_VALID_REQUESTOR_ID 0x0800
	232	+#define CPER_MEM_VALID_RESPONDER_ID 0x1000
	233	+#define CPER_MEM_VALID_TARGET_ID 0x2000
	234	+#define CPER_MEM_VALID_ERROR_TYPE 0x4000
	235	+
	236	+#define CPER_PCIE_VALID_PORT_TYPE 0x0001
	237	+#define CPER_PCIE_VALID_VERSION 0x0002
	238	+#define CPER_PCIE_VALID_COMMAND_STATUS 0x0004
	239	+#define CPER_PCIE_VALID_DEVICE_ID 0x0008
	240	+#define CPER_PCIE_VALID_SERIAL_NUMBER 0x0010
	241	+#define CPER_PCIE_VALID_BRIDGE_CONTROL_STATUS 0x0020
	242	+#define CPER_PCIE_VALID_CAPABILITY 0x0040
	243	+#define CPER_PCIE_VALID_AER_INFO 0x0080
	244	+
	245	+#define CPER_PCIE_SLOT_SHIFT 3
	246	+
204	247	/*
205	248	* All tables and structs must be byte-packed to match CPER
206	249	* specification, since the tables are provided by the system BIOS
...	...	@@ -304,6 +347,41 @@
304	347	__u64 responder_id;
305	348	__u64 target_id;
306	349	__u8 error_type;
	350	+};
	351	+
	352	+struct cper_sec_pcie {
	353	+ __u64 validation_bits;
	354	+ __u32 port_type;
	355	+ struct {
	356	+ __u8 minor;
	357	+ __u8 major;
	358	+ __u8 reserved[2];
	359	+ } version;
	360	+ __u16 command;
	361	+ __u16 status;
	362	+ __u32 reserved;
	363	+ struct {
	364	+ __u16 vendor_id;
	365	+ __u16 device_id;
	366	+ __u8 class_code[3];
	367	+ __u8 function;
	368	+ __u8 device;
	369	+ __u16 segment;
	370	+ __u8 bus;
	371	+ __u8 secondary_bus;
	372	+ __u16 slot;
	373	+ __u8 reserved;
	374	+ } device_id;
	375	+ struct {
	376	+ __u32 lower;
	377	+ __u32 upper;
	378	+ } serial_number;
	379	+ struct {
	380	+ __u16 secondary_status;
	381	+ __u16 control;
	382	+ } bridge;
	383	+ __u8 capability[60];
	384	+ __u8 aer_info[96];
307	385	};
308	386
309	387	/* Reset to default packing */