Eric Lee / linux-smarc-t335x-v3.2

Download as
Browse Code ยป

Commit d5dedd4507d307eb3f35f21b6e16f336fdc0d82a

Authored by Yinghai Lu
Committed by Ingo Molnar
1 parent fcef5911c7
Exists in master and in 4 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN, v3.2_SMARCT335xPSP_04.06.00.11

irq: change ->set_affinity() to return status 

according to Ingo, change set_affinity() in irq_chip should return int,
because that way we can handle failure cases in a much cleaner way, in
the genirq layer.

v2: fix two typos

[ Impact: extend API ]

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: linux-arch@vger.kernel.org
LKML-Reference: <49F654E9.4070809@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

Showing 23 changed files with 140 additions and 74 deletions Side-by-side Diff

arch/alpha/kernel/sys_dp264.c
Diff comments   View file @ d5dedd4
... ... @@ -176,22 +176,26 @@
176 176 }
177 177 }
178 178  
179   -static void
  179 +static int
180 180 dp264_set_affinity(unsigned int irq, const struct cpumask *affinity)
181 181 {
182 182 spin_lock(&dp264_irq_lock);
183 183 cpu_set_irq_affinity(irq, *affinity);
184 184 tsunami_update_irq_hw(cached_irq_mask);
185 185 spin_unlock(&dp264_irq_lock);
  186 +
  187 + return 0;
186 188 }
187 189  
188   -static void
  190 +static int
189 191 clipper_set_affinity(unsigned int irq, const struct cpumask *affinity)
190 192 {
191 193 spin_lock(&dp264_irq_lock);
192 194 cpu_set_irq_affinity(irq - 16, *affinity);
193 195 tsunami_update_irq_hw(cached_irq_mask);
194 196 spin_unlock(&dp264_irq_lock);
  197 +
  198 + return 0;
195 199 }
196 200  
197 201 static struct hw_interrupt_type dp264_irq_type = {
arch/alpha/kernel/sys_titan.c
Diff comments   View file @ d5dedd4
... ... @@ -157,13 +157,15 @@
157 157  
158 158 }
159 159  
160   -static void
  160 +static int
161 161 titan_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
162 162 {
163 163 spin_lock(&titan_irq_lock);
164 164 titan_cpu_set_irq_affinity(irq - 16, *affinity);
165 165 titan_update_irq_hw(titan_cached_irq_mask);
166 166 spin_unlock(&titan_irq_lock);
  167 +
  168 + return 0;
167 169 }
168 170  
169 171 static void
arch/arm/common/gic.c
Diff comments   View file @ d5dedd4
... ... @@ -109,7 +109,7 @@
109 109 }
110 110  
111 111 #ifdef CONFIG_SMP
112   -static void gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
  112 +static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
113 113 {
114 114 void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3);
115 115 unsigned int shift = (irq % 4) * 8;
... ... @@ -122,6 +122,8 @@
122 122 val |= 1 << (cpu + shift);
123 123 writel(val, reg);
124 124 spin_unlock(&irq_controller_lock);
  125 +
  126 + return 0;
125 127 }
126 128 #endif
127 129  
arch/cris/arch-v32/kernel/irq.c
Diff comments   View file @ d5dedd4
... ... @@ -325,12 +325,14 @@
325 325 {
326 326 }
327 327  
328   -void set_affinity_crisv32_irq(unsigned int irq, const struct cpumask *dest)
  328 +int set_affinity_crisv32_irq(unsigned int irq, const struct cpumask *dest)
329 329 {
330 330 unsigned long flags;
331 331 spin_lock_irqsave(&irq_lock, flags);
332 332 irq_allocations[irq - FIRST_IRQ].mask = *dest;
333 333 spin_unlock_irqrestore(&irq_lock, flags);
  334 +
  335 + return 0;
334 336 }
335 337  
336 338 static struct irq_chip crisv32_irq_type = {
arch/ia64/hp/sim/hpsim_irq.c
Diff comments   View file @ d5dedd4
... ... @@ -21,9 +21,10 @@
21 21 {
22 22 }
23 23  
24   -static void
  24 +static int
25 25 hpsim_set_affinity_noop(unsigned int a, const struct cpumask *b)
26 26 {
  27 + return 0;
27 28 }
28 29  
29 30 static struct hw_interrupt_type irq_type_hp_sim = {
arch/ia64/kernel/iosapic.c
Diff comments   View file @ d5dedd4
... ... @@ -329,7 +329,7 @@
329 329 }
330 330  
331 331  
332   -static void
  332 +static int
333 333 iosapic_set_affinity(unsigned int irq, const struct cpumask *mask)
334 334 {
335 335 #ifdef CONFIG_SMP
336 336  
337 337  
... ... @@ -343,15 +343,15 @@
343 343  
344 344 cpu = cpumask_first_and(cpu_online_mask, mask);
345 345 if (cpu >= nr_cpu_ids)
346   - return;
  346 + return -1;
347 347  
348 348 if (irq_prepare_move(irq, cpu))
349   - return;
  349 + return -1;
350 350  
351 351 dest = cpu_physical_id(cpu);
352 352  
353 353 if (!iosapic_intr_info[irq].count)
354   - return; /* not an IOSAPIC interrupt */
  354 + return -1; /* not an IOSAPIC interrupt */
355 355  
356 356 set_irq_affinity_info(irq, dest, redir);
357 357  
358 358  
... ... @@ -376,7 +376,9 @@
376 376 iosapic_write(iosapic, IOSAPIC_RTE_HIGH(rte_index), high32);
377 377 iosapic_write(iosapic, IOSAPIC_RTE_LOW(rte_index), low32);
378 378 }
  379 +
379 380 #endif
  381 + return 0;
380 382 }
381 383  
382 384 /*
arch/ia64/kernel/msi_ia64.c
Diff comments   View file @ d5dedd4
... ... @@ -12,7 +12,7 @@
12 12 static struct irq_chip ia64_msi_chip;
13 13  
14 14 #ifdef CONFIG_SMP
15   -static void ia64_set_msi_irq_affinity(unsigned int irq,
  15 +static int ia64_set_msi_irq_affinity(unsigned int irq,
16 16 const cpumask_t *cpu_mask)
17 17 {
18 18 struct msi_msg msg;
19 19  
... ... @@ -20,10 +20,10 @@
20 20 int cpu = first_cpu(*cpu_mask);
21 21  
22 22 if (!cpu_online(cpu))
23   - return;
  23 + return -1;
24 24  
25 25 if (irq_prepare_move(irq, cpu))
26   - return;
  26 + return -1;
27 27  
28 28 read_msi_msg(irq, &msg);
29 29  
... ... @@ -39,6 +39,8 @@
39 39  
40 40 write_msi_msg(irq, &msg);
41 41 cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu));
  42 +
  43 + return 0;
42 44 }
43 45 #endif /* CONFIG_SMP */
44 46  
45 47  
46 48  
... ... @@ -130,17 +132,17 @@
130 132  
131 133 #ifdef CONFIG_DMAR
132 134 #ifdef CONFIG_SMP
133   -static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
  135 +static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
134 136 {
135 137 struct irq_cfg *cfg = irq_cfg + irq;
136 138 struct msi_msg msg;
137 139 int cpu = cpumask_first(mask);
138 140  
139 141 if (!cpu_online(cpu))
140   - return;
  142 + return -1;
141 143  
142 144 if (irq_prepare_move(irq, cpu))
143   - return;
  145 + return -1;
144 146  
145 147 dmar_msi_read(irq, &msg);
146 148  
... ... @@ -151,6 +153,8 @@
151 153  
152 154 dmar_msi_write(irq, &msg);
153 155 cpumask_copy(irq_desc[irq].affinity, mask);
  156 +
  157 + return 0;
154 158 }
155 159 #endif /* CONFIG_SMP */
156 160  
arch/ia64/sn/kernel/irq.c
Diff comments   View file @ d5dedd4
... ... @@ -227,7 +227,7 @@
227 227 return new_irq_info;
228 228 }
229 229  
230   -static void sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask)
  230 +static int sn_set_affinity_irq(unsigned int irq, const struct cpumask *mask)
231 231 {
232 232 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
233 233 nasid_t nasid;
... ... @@ -239,6 +239,8 @@
239 239 list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
240 240 sn_irq_lh[irq], list)
241 241 (void)sn_retarget_vector(sn_irq_info, nasid, slice);
  242 +
  243 + return 0;
242 244 }
243 245  
244 246 #ifdef CONFIG_SMP
arch/ia64/sn/kernel/msi_sn.c
Diff comments   View file @ d5dedd4
... ... @@ -151,7 +151,7 @@
151 151 }
152 152  
153 153 #ifdef CONFIG_SMP
154   -static void sn_set_msi_irq_affinity(unsigned int irq,
  154 +static int sn_set_msi_irq_affinity(unsigned int irq,
155 155 const struct cpumask *cpu_mask)
156 156 {
157 157 struct msi_msg msg;
... ... @@ -168,7 +168,7 @@
168 168 cpu = cpumask_first(cpu_mask);
169 169 sn_irq_info = sn_msi_info[irq].sn_irq_info;
170 170 if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
171   - return;
  171 + return -1;
172 172  
173 173 /*
174 174 * Release XIO resources for the old MSI PCI address
... ... @@ -189,7 +189,7 @@
189 189 new_irq_info = sn_retarget_vector(sn_irq_info, nasid, slice);
190 190 sn_msi_info[irq].sn_irq_info = new_irq_info;
191 191 if (new_irq_info == NULL)
192   - return;
  192 + return -1;
193 193  
194 194 /*
195 195 * Map the xio address into bus space
... ... @@ -206,6 +206,8 @@
206 206  
207 207 write_msi_msg(irq, &msg);
208 208 cpumask_copy(irq_desc[irq].affinity, cpu_mask);
  209 +
  210 + return 0;
209 211 }
210 212 #endif /* CONFIG_SMP */
211 213  
arch/mips/cavium-octeon/octeon-irq.c
Diff comments   View file @ d5dedd4
... ... @@ -177,7 +177,7 @@
177 177 }
178 178  
179 179 #ifdef CONFIG_SMP
180   -static void octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask *dest)
  180 +static int octeon_irq_ciu0_set_affinity(unsigned int irq, const struct cpumask *dest)
181 181 {
182 182 int cpu;
183 183 int bit = irq - OCTEON_IRQ_WORKQ0; /* Bit 0-63 of EN0 */
... ... @@ -199,6 +199,8 @@
199 199 */
200 200 cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2));
201 201 write_unlock(&octeon_irq_ciu0_rwlock);
  202 +
  203 + return 0;
202 204 }
203 205 #endif
204 206  
... ... @@ -292,7 +294,7 @@
292 294 }
293 295  
294 296 #ifdef CONFIG_SMP
295   -static void octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask *dest)
  297 +static int octeon_irq_ciu1_set_affinity(unsigned int irq, const struct cpumask *dest)
296 298 {
297 299 int cpu;
298 300 int bit = irq - OCTEON_IRQ_WDOG0; /* Bit 0-63 of EN1 */
... ... @@ -315,6 +317,8 @@
315 317 */
316 318 cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1));
317 319 write_unlock(&octeon_irq_ciu1_rwlock);
  320 +
  321 + return 0;
318 322 }
319 323 #endif
320 324  
arch/mips/include/asm/irq.h
Diff comments   View file @ d5dedd4
... ... @@ -49,7 +49,7 @@
49 49 #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
50 50 #include <linux/cpumask.h>
51 51  
52   -extern void plat_set_irq_affinity(unsigned int irq,
  52 +extern int plat_set_irq_affinity(unsigned int irq,
53 53 const struct cpumask *affinity);
54 54 extern void smtc_forward_irq(unsigned int irq);
55 55  
arch/mips/kernel/irq-gic.c
Diff comments   View file @ d5dedd4
... ... @@ -155,7 +155,7 @@
155 155  
156 156 static DEFINE_SPINLOCK(gic_lock);
157 157  
158   -static void gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
  158 +static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
159 159 {
160 160 cpumask_t tmp = CPU_MASK_NONE;
161 161 unsigned long flags;
... ... @@ -166,7 +166,7 @@
166 166  
167 167 cpumask_and(&tmp, cpumask, cpu_online_mask);
168 168 if (cpus_empty(tmp))
169   - return;
  169 + return -1;
170 170  
171 171 /* Assumption : cpumask refers to a single CPU */
172 172 spin_lock_irqsave(&gic_lock, flags);
... ... @@ -190,6 +190,7 @@
190 190 cpumask_copy(irq_desc[irq].affinity, cpumask);
191 191 spin_unlock_irqrestore(&gic_lock, flags);
192 192  
  193 + return 0;
193 194 }
194 195 #endif
195 196  
arch/mips/mti-malta/malta-smtc.c
Diff comments   View file @ d5dedd4
... ... @@ -114,7 +114,7 @@
114 114 */
115 115  
116 116  
117   -void plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
  117 +int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
118 118 {
119 119 cpumask_t tmask;
120 120 int cpu = 0;
... ... @@ -156,6 +156,8 @@
156 156  
157 157 /* Do any generic SMTC IRQ affinity setup */
158 158 smtc_set_irq_affinity(irq, tmask);
  159 +
  160 + return 0;
159 161 }
160 162 #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
arch/mips/sibyte/bcm1480/irq.c
Diff comments   View file @ d5dedd4
... ... @@ -50,7 +50,7 @@
50 50 static void disable_bcm1480_irq(unsigned int irq);
51 51 static void ack_bcm1480_irq(unsigned int irq);
52 52 #ifdef CONFIG_SMP
53   -static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask);
  53 +static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask);
54 54 #endif
55 55  
56 56 #ifdef CONFIG_PCI
... ... @@ -109,7 +109,7 @@
109 109 }
110 110  
111 111 #ifdef CONFIG_SMP
112   -static void bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
  112 +static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask)
113 113 {
114 114 int i = 0, old_cpu, cpu, int_on, k;
115 115 u64 cur_ints;
... ... @@ -119,7 +119,7 @@
119 119  
120 120 if (cpumask_weight(mask) != 1) {
121 121 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq);
122   - return;
  122 + return -1;
123 123 }
124 124 i = cpumask_first(mask);
125 125  
... ... @@ -155,6 +155,8 @@
155 155 }
156 156 spin_unlock(&bcm1480_imr_lock);
157 157 spin_unlock_irqrestore(&desc->lock, flags);
  158 +
  159 + return 0;
158 160 }
159 161 #endif
160 162  
arch/mips/sibyte/sb1250/irq.c
Diff comments   View file @ d5dedd4
... ... @@ -50,7 +50,7 @@
50 50 static void disable_sb1250_irq(unsigned int irq);
51 51 static void ack_sb1250_irq(unsigned int irq);
52 52 #ifdef CONFIG_SMP
53   -static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask);
  53 +static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask);
54 54 #endif
55 55  
56 56 #ifdef CONFIG_SIBYTE_HAS_LDT
... ... @@ -103,7 +103,7 @@
103 103 }
104 104  
105 105 #ifdef CONFIG_SMP
106   -static void sb1250_set_affinity(unsigned int irq, const struct cpumask *mask)
  106 +static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask)
107 107 {
108 108 int i = 0, old_cpu, cpu, int_on;
109 109 u64 cur_ints;
... ... @@ -114,7 +114,7 @@
114 114  
115 115 if (cpumask_weight(mask) > 1) {
116 116 printk("attempted to set irq affinity for irq %d to multiple CPUs\n", irq);
117   - return;
  117 + return -1;
118 118 }
119 119  
120 120 /* Convert logical CPU to physical CPU */
... ... @@ -146,6 +146,8 @@
146 146 }
147 147 spin_unlock(&sb1250_imr_lock);
148 148 spin_unlock_irqrestore(&desc->lock, flags);
  149 +
  150 + return 0;
149 151 }
150 152 #endif
151 153  
arch/parisc/kernel/irq.c
Diff comments   View file @ d5dedd4
... ... @@ -130,15 +130,17 @@
130 130 return cpu_dest;
131 131 }
132 132  
133   -static void cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
  133 +static int cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
134 134 {
135 135 int cpu_dest;
136 136  
137 137 cpu_dest = cpu_check_affinity(irq, dest);
138 138 if (cpu_dest < 0)
139   - return;
  139 + return -1;
140 140  
141 141 cpumask_copy(&irq_desc[irq].affinity, dest);
  142 +
  143 + return 0;
142 144 }
143 145 #endif
144 146  
arch/powerpc/platforms/pseries/xics.c
Diff comments   View file @ d5dedd4
... ... @@ -333,7 +333,7 @@
333 333 lpar_xirr_info_set((0xff << 24) | irq);
334 334 }
335 335  
336   -static void xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
  336 +static int xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
337 337 {
338 338 unsigned int irq;
339 339 int status;
340 340  
... ... @@ -342,14 +342,14 @@
342 342  
343 343 irq = (unsigned int)irq_map[virq].hwirq;
344 344 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
345   - return;
  345 + return -1;
346 346  
347 347 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
348 348  
349 349 if (status) {
350 350 printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n",
351 351 __func__, irq, status);
352   - return;
  352 + return -1;
353 353 }
354 354  
355 355 /*
... ... @@ -363,7 +363,7 @@
363 363 printk(KERN_WARNING
364 364 "%s: No online cpus in the mask %s for irq %d\n",
365 365 __func__, cpulist, virq);
366   - return;
  366 + return -1;
367 367 }
368 368  
369 369 status = rtas_call(ibm_set_xive, 3, 1, NULL,
370 370  
... ... @@ -372,8 +372,10 @@
372 372 if (status) {
373 373 printk(KERN_ERR "%s: ibm,set-xive irq=%u returns %d\n",
374 374 __func__, irq, status);
375   - return;
  375 + return -1;
376 376 }
  377 +
  378 + return 0;
377 379 }
378 380  
379 381 static struct irq_chip xics_pic_direct = {
arch/powerpc/sysdev/mpic.c
Diff comments   View file @ d5dedd4
... ... @@ -807,7 +807,7 @@
807 807  
808 808 #endif /* CONFIG_SMP */
809 809  
810   -void mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
  810 +int mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
811 811 {
812 812 struct mpic *mpic = mpic_from_irq(irq);
813 813 unsigned int src = mpic_irq_to_hw(irq);
... ... @@ -824,6 +824,8 @@
824 824 mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION),
825 825 mpic_physmask(cpus_addr(tmp)[0]));
826 826 }
  827 +
  828 + return 0;
827 829 }
828 830  
829 831 static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type)
arch/sparc/kernel/irq_64.c
Diff comments   View file @ d5dedd4
... ... @@ -318,10 +318,12 @@
318 318 }
319 319 }
320 320  
321   -static void sun4u_set_affinity(unsigned int virt_irq,
  321 +static int sun4u_set_affinity(unsigned int virt_irq,
322 322 const struct cpumask *mask)
323 323 {
324 324 sun4u_irq_enable(virt_irq);
  325 +
  326 + return 0;
325 327 }
326 328  
327 329 /* Don't do anything. The desc->status check for IRQ_DISABLED in
... ... @@ -377,7 +379,7 @@
377 379 ino, err);
378 380 }
379 381  
380   -static void sun4v_set_affinity(unsigned int virt_irq,
  382 +static int sun4v_set_affinity(unsigned int virt_irq,
381 383 const struct cpumask *mask)
382 384 {
383 385 unsigned int ino = virt_irq_table[virt_irq].dev_ino;
... ... @@ -388,6 +390,8 @@
388 390 if (err != HV_EOK)
389 391 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
390 392 "err(%d)\n", ino, cpuid, err);
  393 +
  394 + return 0;
391 395 }
392 396  
393 397 static void sun4v_irq_disable(unsigned int virt_irq)
... ... @@ -445,7 +449,7 @@
445 449 dev_handle, dev_ino, err);
446 450 }
447 451  
448   -static void sun4v_virt_set_affinity(unsigned int virt_irq,
  452 +static int sun4v_virt_set_affinity(unsigned int virt_irq,
449 453 const struct cpumask *mask)
450 454 {
451 455 unsigned long cpuid, dev_handle, dev_ino;
... ... @@ -461,6 +465,8 @@
461 465 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
462 466 "err(%d)\n",
463 467 dev_handle, dev_ino, cpuid, err);
  468 +
  469 + return 0;
464 470 }
465 471  
466 472 static void sun4v_virq_disable(unsigned int virt_irq)
arch/x86/kernel/apic/io_apic.c
Diff comments   View file @ d5dedd4
... ... @@ -574,13 +574,14 @@
574 574 return apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain);
575 575 }
576 576  
577   -static void
  577 +static int
578 578 set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
579 579 {
580 580 struct irq_cfg *cfg;
581 581 unsigned long flags;
582 582 unsigned int dest;
583 583 unsigned int irq;
  584 + int ret = -1;
584 585  
585 586 irq = desc->irq;
586 587 cfg = desc->chip_data;
587 588  
588 589  
589 590  
... ... @@ -591,18 +592,21 @@
591 592 /* Only the high 8 bits are valid. */
592 593 dest = SET_APIC_LOGICAL_ID(dest);
593 594 __target_IO_APIC_irq(irq, dest, cfg);
  595 + ret = 0;
594 596 }
595 597 spin_unlock_irqrestore(&ioapic_lock, flags);
  598 +
  599 + return ret;
596 600 }
597 601  
598   -static void
  602 +static int
599 603 set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask)
600 604 {
601 605 struct irq_desc *desc;
602 606  
603 607 desc = irq_to_desc(irq);
604 608  
605   - set_ioapic_affinity_irq_desc(desc, mask);
  609 + return set_ioapic_affinity_irq_desc(desc, mask);
606 610 }
607 611 #endif /* CONFIG_SMP */
608 612  
609 613  
610 614  
611 615  
612 616  
... ... @@ -2348,24 +2352,25 @@
2348 2352 * Real vector that is used for interrupting cpu will be coming from
2349 2353 * the interrupt-remapping table entry.
2350 2354 */
2351   -static void
  2355 +static int
2352 2356 migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
2353 2357 {
2354 2358 struct irq_cfg *cfg;
2355 2359 struct irte irte;
2356 2360 unsigned int dest;
2357 2361 unsigned int irq;
  2362 + int ret = -1;
2358 2363  
2359 2364 if (!cpumask_intersects(mask, cpu_online_mask))
2360   - return;
  2365 + return ret;
2361 2366  
2362 2367 irq = desc->irq;
2363 2368 if (get_irte(irq, &irte))
2364   - return;
  2369 + return ret;
2365 2370  
2366 2371 cfg = desc->chip_data;
2367 2372 if (assign_irq_vector(irq, cfg, mask))
2368   - return;
  2373 + return ret;
2369 2374  
2370 2375 dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask);
2371 2376  
2372 2377  
2373 2378  
2374 2379  
2375 2380  
2376 2381  
2377 2382  
... ... @@ -2381,27 +2386,30 @@
2381 2386 send_cleanup_vector(cfg);
2382 2387  
2383 2388 cpumask_copy(desc->affinity, mask);
  2389 +
  2390 + return 0;
2384 2391 }
2385 2392  
2386 2393 /*
2387 2394 * Migrates the IRQ destination in the process context.
2388 2395 */
2389   -static void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc,
  2396 +static int set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc,
2390 2397 const struct cpumask *mask)
2391 2398 {
2392   - migrate_ioapic_irq_desc(desc, mask);
  2399 + return migrate_ioapic_irq_desc(desc, mask);
2393 2400 }
2394   -static void set_ir_ioapic_affinity_irq(unsigned int irq,
  2401 +static int set_ir_ioapic_affinity_irq(unsigned int irq,
2395 2402 const struct cpumask *mask)
2396 2403 {
2397 2404 struct irq_desc *desc = irq_to_desc(irq);
2398 2405  
2399   - set_ir_ioapic_affinity_irq_desc(desc, mask);
  2406 + return set_ir_ioapic_affinity_irq_desc(desc, mask);
2400 2407 }
2401 2408 #else
2402   -static inline void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc,
  2409 +static inline int set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc,
2403 2410 const struct cpumask *mask)
2404 2411 {
  2412 + return 0;
2405 2413 }
2406 2414 #endif
2407 2415  
... ... @@ -3318,7 +3326,7 @@
3318 3326 }
3319 3327  
3320 3328 #ifdef CONFIG_SMP
3321   -static void set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
  3329 +static int set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
3322 3330 {
3323 3331 struct irq_desc *desc = irq_to_desc(irq);
3324 3332 struct irq_cfg *cfg;
... ... @@ -3327,7 +3335,7 @@
3327 3335  
3328 3336 dest = set_desc_affinity(desc, mask);
3329 3337 if (dest == BAD_APICID)
3330   - return;
  3338 + return -1;
3331 3339  
3332 3340 cfg = desc->chip_data;
3333 3341  
3334 3342  
... ... @@ -3339,13 +3347,15 @@
3339 3347 msg.address_lo |= MSI_ADDR_DEST_ID(dest);
3340 3348  
3341 3349 write_msi_msg_desc(desc, &msg);
  3350 +
  3351 + return 0;
3342 3352 }
3343 3353 #ifdef CONFIG_INTR_REMAP
3344 3354 /*
3345 3355 * Migrate the MSI irq to another cpumask. This migration is
3346 3356 * done in the process context using interrupt-remapping hardware.
3347 3357 */
3348   -static void
  3358 +static int
3349 3359 ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask)
3350 3360 {
3351 3361 struct irq_desc *desc = irq_to_desc(irq);
3352 3362  
... ... @@ -3354,11 +3364,11 @@
3354 3364 struct irte irte;
3355 3365  
3356 3366 if (get_irte(irq, &irte))
3357   - return;
  3367 + return -1;
3358 3368  
3359 3369 dest = set_desc_affinity(desc, mask);
3360 3370 if (dest == BAD_APICID)
3361   - return;
  3371 + return -1;
3362 3372  
3363 3373 irte.vector = cfg->vector;
3364 3374 irte.dest_id = IRTE_DEST(dest);
... ... @@ -3375,6 +3385,8 @@
3375 3385 */
3376 3386 if (cfg->move_in_progress)
3377 3387 send_cleanup_vector(cfg);
  3388 +
  3389 + return 0;
3378 3390 }
3379 3391  
3380 3392 #endif
... ... @@ -3528,7 +3540,7 @@
3528 3540  
3529 3541 #if defined (CONFIG_DMAR) || defined (CONFIG_INTR_REMAP)
3530 3542 #ifdef CONFIG_SMP
3531   -static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
  3543 +static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
3532 3544 {
3533 3545 struct irq_desc *desc = irq_to_desc(irq);
3534 3546 struct irq_cfg *cfg;
... ... @@ -3537,7 +3549,7 @@
3537 3549  
3538 3550 dest = set_desc_affinity(desc, mask);
3539 3551 if (dest == BAD_APICID)
3540   - return;
  3552 + return -1;
3541 3553  
3542 3554 cfg = desc->chip_data;
3543 3555  
... ... @@ -3549,6 +3561,8 @@
3549 3561 msg.address_lo |= MSI_ADDR_DEST_ID(dest);
3550 3562  
3551 3563 dmar_msi_write(irq, &msg);
  3564 +
  3565 + return 0;
3552 3566 }
3553 3567  
3554 3568 #endif /* CONFIG_SMP */
... ... @@ -3582,7 +3596,7 @@
3582 3596 #ifdef CONFIG_HPET_TIMER
3583 3597  
3584 3598 #ifdef CONFIG_SMP
3585   -static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
  3599 +static int hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
3586 3600 {
3587 3601 struct irq_desc *desc = irq_to_desc(irq);
3588 3602 struct irq_cfg *cfg;
... ... @@ -3591,7 +3605,7 @@
3591 3605  
3592 3606 dest = set_desc_affinity(desc, mask);
3593 3607 if (dest == BAD_APICID)
3594   - return;
  3608 + return -1;
3595 3609  
3596 3610 cfg = desc->chip_data;
3597 3611  
... ... @@ -3603,6 +3617,8 @@
3603 3617 msg.address_lo |= MSI_ADDR_DEST_ID(dest);
3604 3618  
3605 3619 hpet_msi_write(irq, &msg);
  3620 +
  3621 + return 0;
3606 3622 }
3607 3623  
3608 3624 #endif /* CONFIG_SMP */
... ... @@ -3659,7 +3675,7 @@
3659 3675 write_ht_irq_msg(irq, &msg);
3660 3676 }
3661 3677  
3662   -static void set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask)
  3678 +static int set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask)
3663 3679 {
3664 3680 struct irq_desc *desc = irq_to_desc(irq);
3665 3681 struct irq_cfg *cfg;
3666 3682  
... ... @@ -3667,11 +3683,13 @@
3667 3683  
3668 3684 dest = set_desc_affinity(desc, mask);
3669 3685 if (dest == BAD_APICID)
3670   - return;
  3686 + return -1;
3671 3687  
3672 3688 cfg = desc->chip_data;
3673 3689  
3674 3690 target_ht_irq(irq, dest, cfg->vector);
  3691 +
  3692 + return 0;
3675 3693 }
3676 3694  
3677 3695 #endif
drivers/parisc/iosapic.c
Diff comments   View file @ d5dedd4
... ... @@ -702,7 +702,7 @@
702 702 }
703 703  
704 704 #ifdef CONFIG_SMP
705   -static void iosapic_set_affinity_irq(unsigned int irq,
  705 +static int iosapic_set_affinity_irq(unsigned int irq,
706 706 const struct cpumask *dest)
707 707 {
708 708 struct vector_info *vi = iosapic_get_vector(irq);
... ... @@ -712,7 +712,7 @@
712 712  
713 713 dest_cpu = cpu_check_affinity(irq, dest);
714 714 if (dest_cpu < 0)
715   - return;
  715 + return -1;
716 716  
717 717 cpumask_copy(irq_desc[irq].affinity, cpumask_of(dest_cpu));
718 718 vi->txn_addr = txn_affinity_addr(irq, dest_cpu);
... ... @@ -724,6 +724,8 @@
724 724 iosapic_set_irt_data(vi, &dummy_d0, &d1);
725 725 iosapic_wr_irt_entry(vi, d0, d1);
726 726 spin_unlock_irqrestore(&iosapic_lock, flags);
  727 +
  728 + return 0;
727 729 }
728 730 #endif
729 731  
drivers/xen/events.c
Diff comments   View file @ d5dedd4
... ... @@ -688,13 +688,13 @@
688 688 }
689 689  
690 690 /* Rebind an evtchn so that it gets delivered to a specific cpu */
691   -static void rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  691 +static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
692 692 {
693 693 struct evtchn_bind_vcpu bind_vcpu;
694 694 int evtchn = evtchn_from_irq(irq);
695 695  
696 696 if (!VALID_EVTCHN(evtchn))
697   - return;
  697 + return -1;
698 698  
699 699 /* Send future instances of this interrupt to other vcpu. */
700 700 bind_vcpu.port = evtchn;
701 701  
702 702  
... ... @@ -707,13 +707,15 @@
707 707 */
708 708 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
709 709 bind_evtchn_to_cpu(evtchn, tcpu);
  710 +
  711 + return 0;
710 712 }
711 713  
712   -
713   -static void set_affinity_irq(unsigned irq, const struct cpumask *dest)
  714 +static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
714 715 {
715 716 unsigned tcpu = cpumask_first(dest);
716   - rebind_irq_to_cpu(irq, tcpu);
  717 +
  718 + return rebind_irq_to_cpu(irq, tcpu);
717 719 }
718 720  
719 721 int resend_irq_on_evtchn(unsigned int irq)
... ... @@ -117,7 +117,7 @@
117 117 void (*eoi)(unsigned int irq);
118 118  
119 119 void (*end)(unsigned int irq);
120   - void (*set_affinity)(unsigned int irq,
  120 + int (*set_affinity)(unsigned int irq,
121 121 const struct cpumask *dest);
122 122 int (*retrigger)(unsigned int irq);
123 123 int (*set_type)(unsigned int irq, unsigned int flow_type);