CRIS: __do_strncpy_from_user: Don't read the byte beyond the nil

Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>

CRIS: __do_strncpy_from_user: Don't read the byte beyond the nil
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
Jesper Nilsson
1 parent 2dc1c40c6e
Showing 1 changed file with 3 additions and 4 deletions Side-by-side Diff
arch/cris/include/arch-v32/arch/uaccess.h
@@ -122,14 +122,14 @@
 	__asm__ __volatile__ (
 		"	move.d %3,%0\n"
 		"5:	move.b [%2+],$acr\n"
-		"1:	beq 2f\n"
+		"1:	beq 6f\n"
 		"	move.b $acr,[%1+]\n"
  
 		"	subq 1,%0\n"
 		"2:	bne 1b\n"
 		"	move.b [%2+],$acr\n"
  
-		"	sub.d %3,%0\n"
+		"6:	sub.d %3,%0\n"
 		"	neg.d %0,%0\n"
 		"3:\n"
 		"	.section .fixup,\"ax\"\n"
@@ -140,8 +140,7 @@
 		/* The address for a fault at the first move is trivial.
 		   The address for a fault at the second move is that of
 		   the preceding branch insn, since the move insn is in
-		   its delay-slot.  That address is also a branch
-		   target.  Just so you don't get confused...  */
+		   its delay-slot.  Just so you don't get confused...  */
 		"	.previous\n"
 		"	.section __ex_table,\"a\"\n"
 		"	.dword 5b,4b\n"
...	...	@@ -122,14 +122,14 @@
122	122	__asm__ __volatile__ (
123	123	" move.d %3,%0\n"
124	124	"5: move.b [%2+],$acr\n"
125		- "1: beq 2f\n"
	125	+ "1: beq 6f\n"
126	126	" move.b $acr,[%1+]\n"
127	127
128	128	" subq 1,%0\n"
129	129	"2: bne 1b\n"
130	130	" move.b [%2+],$acr\n"
131	131
132		- " sub.d %3,%0\n"
	132	+ "6: sub.d %3,%0\n"
133	133	" neg.d %0,%0\n"
134	134	"3:\n"
135	135	" .section .fixup,\"ax\"\n"
...	...	@@ -140,8 +140,7 @@
140	140	/* The address for a fault at the first move is trivial.
141	141	The address for a fault at the second move is that of
142	142	the preceding branch insn, since the move insn is in
143		- its delay-slot. That address is also a branch
144		- target. Just so you don't get confused... */
	143	+ its delay-slot. Just so you don't get confused... */
145	144	" .previous\n"
146	145	" .section __ex_table,\"a\"\n"
147	146	" .dword 5b,4b\n"