[PATCH] ppc64: Move oprofile_impl.h into include/asm-ppc64

Move oprofile_impl.h into include/asm-ppc64 in preparation for moving oprofile_model into cpu feature struct. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>

[PATCH] ppc64: Move oprofile_impl.h into include/asm-ppc64
Move oprofile_impl.h into include/asm-ppc64 in preparation for moving oprofile_model into cpu feature struct. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Anton Blanchard · Paul Mackerras
1 parent 1a410d8830
Showing 5 changed files with 114 additions and 116 deletions Side-by-side Diff
arch/ppc64/oprofile/common.c
arch/ppc64/oprofile/op_impl.h
arch/ppc64/oprofile/op_model_power4.c
arch/ppc64/oprofile/op_model_rs64.c
include/asm-ppc64/oprofile_impl.h
@@ -17,11 +17,8 @@
 #include <asm/system.h>
 #include <asm/pmc.h>
 #include <asm/cputable.h>
+#include <asm/oprofile_impl.h>
  
-#include "op_impl.h"
-
-extern struct op_ppc64_model op_model_rs64;
-extern struct op_ppc64_model op_model_power4;
 static struct op_ppc64_model *model;
  
 static struct op_counter_config ctr[OP_MAX_COUNTER];
-/*
- * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
- *
- * Based on alpha version.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#ifndef OP_IMPL_H
-#define OP_IMPL_H 1
-
-#define OP_MAX_COUNTER 8
-
-/* Per-counter configuration as set via oprofilefs.  */
-struct op_counter_config {
-	unsigned long valid;
-	unsigned long enabled;
-	unsigned long event;
-	unsigned long count;
-	unsigned long kernel;
-	/* We dont support per counter user/kernel selection */
-	unsigned long user;
-	unsigned long unit_mask;
-};
-
-/* System-wide configuration as set via oprofilefs.  */
-struct op_system_config {
-	unsigned long mmcr0;
-	unsigned long mmcr1;
-	unsigned long mmcra;
-	unsigned long enable_kernel;
-	unsigned long enable_user;
-	unsigned long backtrace_spinlocks;
-};
-
-/* Per-arch configuration */
-struct op_ppc64_model {
-	void (*reg_setup) (struct op_counter_config *,
-			   struct op_system_config *,
-			   int num_counters);
-	void (*cpu_setup) (void *);
-	void (*start) (struct op_counter_config *);
-	void (*stop) (void);
-	void (*handle_interrupt) (struct pt_regs *,
-				  struct op_counter_config *);
-	int num_counters;
-};
-
-static inline unsigned int ctr_read(unsigned int i)
-{
-	switch(i) {
-	case 0:
-		return mfspr(SPRN_PMC1);
-	case 1:
-		return mfspr(SPRN_PMC2);
-	case 2:
-		return mfspr(SPRN_PMC3);
-	case 3:
-		return mfspr(SPRN_PMC4);
-	case 4:
-		return mfspr(SPRN_PMC5);
-	case 5:
-		return mfspr(SPRN_PMC6);
-	case 6:
-		return mfspr(SPRN_PMC7);
-	case 7:
-		return mfspr(SPRN_PMC8);
-	default:
-		return 0;
-	}
-}
-
-static inline void ctr_write(unsigned int i, unsigned int val)
-{
-	switch(i) {
-	case 0:
-		mtspr(SPRN_PMC1, val);
-		break;
-	case 1:
-		mtspr(SPRN_PMC2, val);
-		break;
-	case 2:
-		mtspr(SPRN_PMC3, val);
-		break;
-	case 3:
-		mtspr(SPRN_PMC4, val);
-		break;
-	case 4:
-		mtspr(SPRN_PMC5, val);
-		break;
-	case 5:
-		mtspr(SPRN_PMC6, val);
-		break;
-	case 6:
-		mtspr(SPRN_PMC7, val);
-		break;
-	case 7:
-		mtspr(SPRN_PMC8, val);
-		break;
-	default:
-		break;
-	}
-}
-
-#endif
@@ -16,10 +16,9 @@
 #include <asm/cputable.h>
 #include <asm/systemcfg.h>
 #include <asm/rtas.h>
+#include <asm/oprofile_impl.h>
  
 #define dbg(args...)
-
-#include "op_impl.h"
  
 static unsigned long reset_value[OP_MAX_COUNTER];
  
@@ -14,10 +14,9 @@
 #include <asm/system.h>
 #include <asm/processor.h>
 #include <asm/cputable.h>
+#include <asm/oprofile_impl.h>
  
 #define dbg(args...)
-
-#include "op_impl.h"
  
 static void ctrl_write(unsigned int i, unsigned int val)
 {
+/*
+ * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
+ *
+ * Based on alpha version.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifndef OP_IMPL_H
+#define OP_IMPL_H 1
+
+#define OP_MAX_COUNTER 8
+
+/* Per-counter configuration as set via oprofilefs.  */
+struct op_counter_config {
+	unsigned long valid;
+	unsigned long enabled;
+	unsigned long event;
+	unsigned long count;
+	unsigned long kernel;
+	/* We dont support per counter user/kernel selection */
+	unsigned long user;
+	unsigned long unit_mask;
+};
+
+/* System-wide configuration as set via oprofilefs.  */
+struct op_system_config {
+	unsigned long mmcr0;
+	unsigned long mmcr1;
+	unsigned long mmcra;
+	unsigned long enable_kernel;
+	unsigned long enable_user;
+	unsigned long backtrace_spinlocks;
+};
+
+/* Per-arch configuration */
+struct op_ppc64_model {
+	void (*reg_setup) (struct op_counter_config *,
+			   struct op_system_config *,
+			   int num_counters);
+	void (*cpu_setup) (void *);
+	void (*start) (struct op_counter_config *);
+	void (*stop) (void);
+	void (*handle_interrupt) (struct pt_regs *,
+				  struct op_counter_config *);
+	int num_counters;
+};
+
+extern struct op_ppc64_model op_model_rs64;
+extern struct op_ppc64_model op_model_power4;
+
+static inline unsigned int ctr_read(unsigned int i)
+{
+	switch(i) {
+	case 0:
+		return mfspr(SPRN_PMC1);
+	case 1:
+		return mfspr(SPRN_PMC2);
+	case 2:
+		return mfspr(SPRN_PMC3);
+	case 3:
+		return mfspr(SPRN_PMC4);
+	case 4:
+		return mfspr(SPRN_PMC5);
+	case 5:
+		return mfspr(SPRN_PMC6);
+	case 6:
+		return mfspr(SPRN_PMC7);
+	case 7:
+		return mfspr(SPRN_PMC8);
+	default:
+		return 0;
+	}
+}
+
+static inline void ctr_write(unsigned int i, unsigned int val)
+{
+	switch(i) {
+	case 0:
+		mtspr(SPRN_PMC1, val);
+		break;
+	case 1:
+		mtspr(SPRN_PMC2, val);
+		break;
+	case 2:
+		mtspr(SPRN_PMC3, val);
+		break;
+	case 3:
+		mtspr(SPRN_PMC4, val);
+		break;
+	case 4:
+		mtspr(SPRN_PMC5, val);
+		break;
+	case 5:
+		mtspr(SPRN_PMC6, val);
+		break;
+	case 6:
+		mtspr(SPRN_PMC7, val);
+		break;
+	case 7:
+		mtspr(SPRN_PMC8, val);
+		break;
+	default:
+		break;
+	}
+}
+
+#endif
...	...	@@ -17,11 +17,8 @@
17	17	#include <asm/system.h>
18	18	#include <asm/pmc.h>
19	19	#include <asm/cputable.h>
	20	+#include <asm/oprofile_impl.h>
20	21
21		-#include "op_impl.h"
22		-
23		-extern struct op_ppc64_model op_model_rs64;
24		-extern struct op_ppc64_model op_model_power4;
25	22	static struct op_ppc64_model *model;
26	23
27	24	static struct op_counter_config ctr[OP_MAX_COUNTER];
1		-/*
2		- * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
3		- *
4		- * Based on alpha version.
5		- *
6		- * This program is free software; you can redistribute it and/or
7		- * modify it under the terms of the GNU General Public License
8		- * as published by the Free Software Foundation; either version
9		- * 2 of the License, or (at your option) any later version.
10		- */
11		-
12		-#ifndef OP_IMPL_H
13		-#define OP_IMPL_H 1
14		-
15		-#define OP_MAX_COUNTER 8
16		-
17		-/* Per-counter configuration as set via oprofilefs. */
18		-struct op_counter_config {
19		- unsigned long valid;
20		- unsigned long enabled;
21		- unsigned long event;
22		- unsigned long count;
23		- unsigned long kernel;
24		- /* We dont support per counter user/kernel selection */
25		- unsigned long user;
26		- unsigned long unit_mask;
27		-};
28		-
29		-/* System-wide configuration as set via oprofilefs. */
30		-struct op_system_config {
31		- unsigned long mmcr0;
32		- unsigned long mmcr1;
33		- unsigned long mmcra;
34		- unsigned long enable_kernel;
35		- unsigned long enable_user;
36		- unsigned long backtrace_spinlocks;
37		-};
38		-
39		-/* Per-arch configuration */
40		-struct op_ppc64_model {
41		- void (reg_setup) (struct op_counter_config ,
42		- struct op_system_config *,
43		- int num_counters);
44		- void (cpu_setup) (void );
45		- void (start) (struct op_counter_config );
46		- void (*stop) (void);
47		- void (handle_interrupt) (struct pt_regs ,
48		- struct op_counter_config *);
49		- int num_counters;
50		-};
51		-
52		-static inline unsigned int ctr_read(unsigned int i)
53		-{
54		- switch(i) {
55		- case 0:
56		- return mfspr(SPRN_PMC1);
57		- case 1:
58		- return mfspr(SPRN_PMC2);
59		- case 2:
60		- return mfspr(SPRN_PMC3);
61		- case 3:
62		- return mfspr(SPRN_PMC4);
63		- case 4:
64		- return mfspr(SPRN_PMC5);
65		- case 5:
66		- return mfspr(SPRN_PMC6);
67		- case 6:
68		- return mfspr(SPRN_PMC7);
69		- case 7:
70		- return mfspr(SPRN_PMC8);
71		- default:
72		- return 0;
73		- }
74		-}
75		-
76		-static inline void ctr_write(unsigned int i, unsigned int val)
77		-{
78		- switch(i) {
79		- case 0:
80		- mtspr(SPRN_PMC1, val);
81		- break;
82		- case 1:
83		- mtspr(SPRN_PMC2, val);
84		- break;
85		- case 2:
86		- mtspr(SPRN_PMC3, val);
87		- break;
88		- case 3:
89		- mtspr(SPRN_PMC4, val);
90		- break;
91		- case 4:
92		- mtspr(SPRN_PMC5, val);
93		- break;
94		- case 5:
95		- mtspr(SPRN_PMC6, val);
96		- break;
97		- case 6:
98		- mtspr(SPRN_PMC7, val);
99		- break;
100		- case 7:
101		- mtspr(SPRN_PMC8, val);
102		- break;
103		- default:
104		- break;
105		- }
106		-}
107		-
108		-#endif
...	...	@@ -16,10 +16,9 @@
16	16	#include <asm/cputable.h>
17	17	#include <asm/systemcfg.h>
18	18	#include <asm/rtas.h>
	19	+#include <asm/oprofile_impl.h>
19	20
20	21	#define dbg(args...)
21		-
22		-#include "op_impl.h"
23	22
24	23	static unsigned long reset_value[OP_MAX_COUNTER];
25	24
...	...	@@ -14,10 +14,9 @@
14	14	#include <asm/system.h>
15	15	#include <asm/processor.h>
16	16	#include <asm/cputable.h>
	17	+#include <asm/oprofile_impl.h>
17	18
18	19	#define dbg(args...)
19		-
20		-#include "op_impl.h"
21	20
22	21	static void ctrl_write(unsigned int i, unsigned int val)
23	22	{
	1	+/*
	2	+ * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
	3	+ *
	4	+ * Based on alpha version.
	5	+ *
	6	+ * This program is free software; you can redistribute it and/or
	7	+ * modify it under the terms of the GNU General Public License
	8	+ * as published by the Free Software Foundation; either version
	9	+ * 2 of the License, or (at your option) any later version.
	10	+ */
	11	+
	12	+#ifndef OP_IMPL_H
	13	+#define OP_IMPL_H 1
	14	+
	15	+#define OP_MAX_COUNTER 8
	16	+
	17	+/* Per-counter configuration as set via oprofilefs. */
	18	+struct op_counter_config {
	19	+ unsigned long valid;
	20	+ unsigned long enabled;
	21	+ unsigned long event;
	22	+ unsigned long count;
	23	+ unsigned long kernel;
	24	+ /* We dont support per counter user/kernel selection */
	25	+ unsigned long user;
	26	+ unsigned long unit_mask;
	27	+};
	28	+
	29	+/* System-wide configuration as set via oprofilefs. */
	30	+struct op_system_config {
	31	+ unsigned long mmcr0;
	32	+ unsigned long mmcr1;
	33	+ unsigned long mmcra;
	34	+ unsigned long enable_kernel;
	35	+ unsigned long enable_user;
	36	+ unsigned long backtrace_spinlocks;
	37	+};
	38	+
	39	+/* Per-arch configuration */
	40	+struct op_ppc64_model {
	41	+ void (reg_setup) (struct op_counter_config ,
	42	+ struct op_system_config *,
	43	+ int num_counters);
	44	+ void (cpu_setup) (void );
	45	+ void (start) (struct op_counter_config );
	46	+ void (*stop) (void);
	47	+ void (handle_interrupt) (struct pt_regs ,
	48	+ struct op_counter_config *);
	49	+ int num_counters;
	50	+};
	51	+
	52	+extern struct op_ppc64_model op_model_rs64;
	53	+extern struct op_ppc64_model op_model_power4;
	54	+
	55	+static inline unsigned int ctr_read(unsigned int i)
	56	+{
	57	+ switch(i) {
	58	+ case 0:
	59	+ return mfspr(SPRN_PMC1);
	60	+ case 1:
	61	+ return mfspr(SPRN_PMC2);
	62	+ case 2:
	63	+ return mfspr(SPRN_PMC3);
	64	+ case 3:
	65	+ return mfspr(SPRN_PMC4);
	66	+ case 4:
	67	+ return mfspr(SPRN_PMC5);
	68	+ case 5:
	69	+ return mfspr(SPRN_PMC6);
	70	+ case 6:
	71	+ return mfspr(SPRN_PMC7);
	72	+ case 7:
	73	+ return mfspr(SPRN_PMC8);
	74	+ default:
	75	+ return 0;
	76	+ }
	77	+}
	78	+
	79	+static inline void ctr_write(unsigned int i, unsigned int val)
	80	+{
	81	+ switch(i) {
	82	+ case 0:
	83	+ mtspr(SPRN_PMC1, val);
	84	+ break;
	85	+ case 1:
	86	+ mtspr(SPRN_PMC2, val);
	87	+ break;
	88	+ case 2:
	89	+ mtspr(SPRN_PMC3, val);
	90	+ break;
	91	+ case 3:
	92	+ mtspr(SPRN_PMC4, val);
	93	+ break;
	94	+ case 4:
	95	+ mtspr(SPRN_PMC5, val);
	96	+ break;
	97	+ case 5:
	98	+ mtspr(SPRN_PMC6, val);
	99	+ break;
	100	+ case 6:
	101	+ mtspr(SPRN_PMC7, val);
	102	+ break;
	103	+ case 7:
	104	+ mtspr(SPRN_PMC8, val);
	105	+ break;
	106	+ default:
	107	+ break;
	108	+ }
	109	+}
	110	+
	111	+#endif