Commit e5a2e7fdb53028ce187c0ce0ae0d45ca7546fd5e

Authored by Kyle McMartin
Committed by Kyle McMartin
1 parent 667baef53f

[PARISC] Match show_cache_info with reality

show_cache_info and struct pdc_cache_cf were out of sync with
published documentation. Fix the reporting of cache associativity
and update the pdc_cache_cf bitfields to match documentation.

Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>

Showing 2 changed files with 12 additions and 10 deletions Side-by-side Diff

arch/parisc/kernel/cache.c
... ... @@ -97,15 +97,17 @@
97 97 void
98 98 show_cache_info(struct seq_file *m)
99 99 {
  100 + char buf[32];
  101 +
100 102 seq_printf(m, "I-cache\t\t: %ld KB\n",
101 103 cache_info.ic_size/1024 );
102   - seq_printf(m, "D-cache\t\t: %ld KB (%s%s, %d-way associative)\n",
  104 + if (cache_info.dc_loop == 1)
  105 + snprintf(buf, 32, "%lu-way associative", cache_info.dc_loop);
  106 + seq_printf(m, "D-cache\t\t: %ld KB (%s%s, %s)\n",
103 107 cache_info.dc_size/1024,
104 108 (cache_info.dc_conf.cc_wt ? "WT":"WB"),
105 109 (cache_info.dc_conf.cc_sh ? ", shared I/D":""),
106   - (cache_info.dc_conf.cc_assoc)
107   - );
108   -
  110 + ((cache_info.dc_loop == 1) ? "direct mapped" : buf));
109 111 seq_printf(m, "ITLB entries\t: %ld\n" "DTLB entries\t: %ld%s\n",
110 112 cache_info.it_size,
111 113 cache_info.dt_size,
112 114  
... ... @@ -158,11 +160,11 @@
158 160 cache_info.dc_conf.cc_block,
159 161 cache_info.dc_conf.cc_line,
160 162 cache_info.dc_conf.cc_shift);
161   - printk(" wt %d sh %d cst %d assoc %d\n",
  163 + printk(" wt %d sh %d cst %d hv %d\n",
162 164 cache_info.dc_conf.cc_wt,
163 165 cache_info.dc_conf.cc_sh,
164 166 cache_info.dc_conf.cc_cst,
165   - cache_info.dc_conf.cc_assoc);
  167 + cache_info.dc_conf.cc_hv);
166 168  
167 169 printk("IC base 0x%lx stride 0x%lx count 0x%lx loop 0x%lx\n",
168 170 cache_info.ic_base,
169 171  
... ... @@ -176,11 +178,11 @@
176 178 cache_info.ic_conf.cc_block,
177 179 cache_info.ic_conf.cc_line,
178 180 cache_info.ic_conf.cc_shift);
179   - printk(" wt %d sh %d cst %d assoc %d\n",
  181 + printk(" wt %d sh %d cst %d hv %d\n",
180 182 cache_info.ic_conf.cc_wt,
181 183 cache_info.ic_conf.cc_sh,
182 184 cache_info.ic_conf.cc_cst,
183   - cache_info.ic_conf.cc_assoc);
  185 + cache_info.ic_conf.cc_hv);
184 186  
185 187 printk("D-TLB conf: sh %d page %d cst %d aid %d pad1 %d \n",
186 188 cache_info.dt_conf.tc_sh,
include/asm-parisc/pdc.h
... ... @@ -352,8 +352,8 @@
352 352 cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
353 353 cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
354 354 cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
355   - cc_pad1 : 5, /* reserved */
356   - cc_assoc: 8; /* associativity of I/D-cache */
  355 + cc_pad1 : 10, /* reserved */
  356 + cc_hv : 3; /* hversion dependent */
357 357 };
358 358  
359 359 struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */