Commit e5ff4440cf5206fbb99d9a354ed9024eb3da047d
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9942da0e4b
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gpio/omap: cleanup show revision, remove cpu_is checks, display only once
Remove cpu_is_* checks from gpio_show_revision() by passing in the revision address offset from platform data. SoCs with no revision register (15xx, 7xx, and all MPUIOs) use -1 (actually, USHRT_MAX) to signify no register. While here, all GPIO banks are assumed to be the same revision, so fix show_revision() to only show the revision for the first bank it finds. This removes duplicate GPIO revision prints during boot. Thanks to Charulatha V <charu@ti.com> for finding/fixing a few -1s that were missed in the original patch. Signed-off-by: Kevin Hilman <khilman@ti.com>
Showing 6 changed files with 15 additions and 8 deletions Side-by-side Diff
arch/arm/mach-omap1/gpio15xx.c
| ... | ... | @@ -35,6 +35,7 @@ |
| 35 | 35 | }; |
| 36 | 36 | |
| 37 | 37 | static struct omap_gpio_reg_offs omap15xx_mpuio_regs = { |
| 38 | + .revision = USHRT_MAX, | |
| 38 | 39 | .direction = OMAP_MPUIO_IO_CNTL, |
| 39 | 40 | .datain = OMAP_MPUIO_INPUT_LATCH, |
| 40 | 41 | .dataout = OMAP_MPUIO_OUTPUT, |
| ... | ... | @@ -75,6 +76,7 @@ |
| 75 | 76 | }; |
| 76 | 77 | |
| 77 | 78 | static struct omap_gpio_reg_offs omap15xx_gpio_regs = { |
| 79 | + .revision = USHRT_MAX, | |
| 78 | 80 | .direction = OMAP1510_GPIO_DIR_CONTROL, |
| 79 | 81 | .datain = OMAP1510_GPIO_DATA_INPUT, |
| 80 | 82 | .dataout = OMAP1510_GPIO_DATA_OUTPUT, |
arch/arm/mach-omap1/gpio16xx.c
| ... | ... | @@ -38,6 +38,7 @@ |
| 38 | 38 | }; |
| 39 | 39 | |
| 40 | 40 | static struct omap_gpio_reg_offs omap16xx_mpuio_regs = { |
| 41 | + .revision = USHRT_MAX, | |
| 41 | 42 | .direction = OMAP_MPUIO_IO_CNTL, |
| 42 | 43 | .datain = OMAP_MPUIO_INPUT_LATCH, |
| 43 | 44 | .dataout = OMAP_MPUIO_OUTPUT, |
| ... | ... | @@ -78,6 +79,7 @@ |
| 78 | 79 | }; |
| 79 | 80 | |
| 80 | 81 | static struct omap_gpio_reg_offs omap16xx_gpio_regs = { |
| 82 | + .revision = OMAP1610_GPIO_REVISION, | |
| 81 | 83 | .direction = OMAP1610_GPIO_DIRECTION, |
| 82 | 84 | .set_dataout = OMAP1610_GPIO_SET_DATAOUT, |
| 83 | 85 | .clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT, |
arch/arm/mach-omap1/gpio7xx.c
| ... | ... | @@ -40,6 +40,7 @@ |
| 40 | 40 | }; |
| 41 | 41 | |
| 42 | 42 | static struct omap_gpio_reg_offs omap7xx_mpuio_regs = { |
| 43 | + .revision = USHRT_MAX, | |
| 43 | 44 | .direction = OMAP_MPUIO_IO_CNTL / 2, |
| 44 | 45 | .datain = OMAP_MPUIO_INPUT_LATCH / 2, |
| 45 | 46 | .dataout = OMAP_MPUIO_OUTPUT / 2, |
| ... | ... | @@ -80,6 +81,7 @@ |
| 80 | 81 | }; |
| 81 | 82 | |
| 82 | 83 | static struct omap_gpio_reg_offs omap7xx_gpio_regs = { |
| 84 | + .revision = USHRT_MAX, | |
| 83 | 85 | .direction = OMAP7XX_GPIO_DIR_CONTROL, |
| 84 | 86 | .datain = OMAP7XX_GPIO_DATA_INPUT, |
| 85 | 87 | .dataout = OMAP7XX_GPIO_DATA_OUTPUT, |
arch/arm/mach-omap2/gpio.c
| ... | ... | @@ -71,6 +71,7 @@ |
| 71 | 71 | case 0: |
| 72 | 72 | case 1: |
| 73 | 73 | pdata->bank_type = METHOD_GPIO_24XX; |
| 74 | + pdata->regs->revision = OMAP24XX_GPIO_REVISION; | |
| 74 | 75 | pdata->regs->direction = OMAP24XX_GPIO_OE; |
| 75 | 76 | pdata->regs->datain = OMAP24XX_GPIO_DATAIN; |
| 76 | 77 | pdata->regs->dataout = OMAP24XX_GPIO_DATAOUT; |
| ... | ... | @@ -86,6 +87,7 @@ |
| 86 | 87 | break; |
| 87 | 88 | case 2: |
| 88 | 89 | pdata->bank_type = METHOD_GPIO_44XX; |
| 90 | + pdata->regs->revision = OMAP4_GPIO_REVISION; | |
| 89 | 91 | pdata->regs->direction = OMAP4_GPIO_OE; |
| 90 | 92 | pdata->regs->datain = OMAP4_GPIO_DATAIN; |
| 91 | 93 | pdata->regs->dataout = OMAP4_GPIO_DATAOUT; |
arch/arm/plat-omap/include/plat/gpio.h
drivers/gpio/gpio-omap.c
| ... | ... | @@ -984,19 +984,17 @@ |
| 984 | 984 | |
| 985 | 985 | static void __init omap_gpio_show_rev(struct gpio_bank *bank) |
| 986 | 986 | { |
| 987 | + static bool called; | |
| 987 | 988 | u32 rev; |
| 988 | 989 | |
| 989 | - if (cpu_is_omap16xx() && !(bank->method != METHOD_MPUIO)) | |
| 990 | - rev = __raw_readw(bank->base + OMAP1610_GPIO_REVISION); | |
| 991 | - else if (cpu_is_omap24xx() || cpu_is_omap34xx()) | |
| 992 | - rev = __raw_readl(bank->base + OMAP24XX_GPIO_REVISION); | |
| 993 | - else if (cpu_is_omap44xx()) | |
| 994 | - rev = __raw_readl(bank->base + OMAP4_GPIO_REVISION); | |
| 995 | - else | |
| 990 | + if (called || bank->regs->revision == USHRT_MAX) | |
| 996 | 991 | return; |
| 997 | 992 | |
| 998 | - printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n", | |
| 993 | + rev = __raw_readw(bank->base + bank->regs->revision); | |
| 994 | + pr_info("OMAP GPIO hardware version %d.%d\n", | |
| 999 | 995 | (rev >> 4) & 0x0f, rev & 0x0f); |
| 996 | + | |
| 997 | + called = true; | |
| 1000 | 998 | } |
| 1001 | 999 | |
| 1002 | 1000 | /* This lock class tells lockdep that GPIO irqs are in a different |