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Commit eaeefba154a19aeab9037b1d29478e5303a992fe

Authored by Marcin Kościelnicki
Committed by Ben Skeggs
1 parent e60a9df3a8
Exists in master and in 4 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN, v3.2_SMARCT335xPSP_04.06.00.11

drm/nv50: Add NVA3 support in ctxprog/ctxvals generator. 

Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

Showing 1 changed file with 12 additions and 1 deletions Side-by-side Diff

drivers/gpu/drm/nouveau/nv50_grctx.c
Diff comments   View file @ eaeefba
... ... @@ -177,6 +177,7 @@
177 177 case 0x96:
178 178 case 0x98:
179 179 case 0xa0:
  180 + case 0xa3:
180 181 case 0xa5:
181 182 case 0xa8:
182 183 case 0xaa:
... ... @@ -364,6 +365,7 @@
364 365 case 0xac:
365 366 gr_def(ctx, 0x401c00, 0x042500df);
366 367 break;
  368 + case 0xa3:
367 369 case 0xa5:
368 370 case 0xa8:
369 371 gr_def(ctx, 0x401c00, 0x142500df);
... ... @@ -418,6 +420,7 @@
418 420 break;
419 421 case 0x84:
420 422 case 0xa0:
  423 + case 0xa3:
421 424 case 0xa5:
422 425 case 0xa8:
423 426 case 0xaa:
... ... @@ -792,6 +795,7 @@
792 795 case 0xa5:
793 796 gr_def(ctx, offset + 0x1c, 0x310c0000);
794 797 break;
  798 + case 0xa3:
795 799 case 0xa8:
796 800 case 0xaa:
797 801 case 0xac:
... ... @@ -859,6 +863,8 @@
859 863 else
860 864 gr_def(ctx, offset + 0x8, 0x05010202);
861 865 gr_def(ctx, offset + 0xc, 0x00030201);
  866 + if (dev_priv->chipset == 0xa3)
  867 + cp_ctx(ctx, base + 0x36c, 1);
862 868  
863 869 cp_ctx(ctx, base + 0x400, 2);
864 870 gr_def(ctx, base + 0x404, 0x00000040);
... ... @@ -1159,7 +1165,9 @@
1159 1165 nv50_graph_construct_gene_unk8(ctx);
1160 1166 if (dev_priv->chipset == 0xa0)
1161 1167 xf_emit(ctx, 0x189, 0);
1162   - else if (dev_priv->chipset < 0xa8)
  1168 + else if (dev_priv->chipset == 0xa3)
  1169 + xf_emit(ctx, 0xd5, 0);
  1170 + else if (dev_priv->chipset == 0xa5)
1163 1171 xf_emit(ctx, 0x99, 0);
1164 1172 else if (dev_priv->chipset == 0xaa)
1165 1173 xf_emit(ctx, 0x65, 0);
... ... @@ -1197,6 +1205,8 @@
1197 1205 ctx->ctxvals_pos = offset + 4;
1198 1206 if (dev_priv->chipset == 0xa0)
1199 1207 xf_emit(ctx, 0xa80, 0);
  1208 + else if (dev_priv->chipset == 0xa3)
  1209 + xf_emit(ctx, 0xa7c, 0);
1200 1210 else
1201 1211 xf_emit(ctx, 0xa7a, 0);
1202 1212 xf_emit(ctx, 1, 0x3fffff);
... ... @@ -1341,6 +1351,7 @@
1341 1351 xf_emit(ctx, 0x942, 0);
1342 1352 break;
1343 1353 case 0xa0:
  1354 + case 0xa3:
1344 1355 xf_emit(ctx, 0x2042, 0);
1345 1356 break;
1346 1357 case 0xa5: