Eric Lee / linux-smarc-t335x-v3.2

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Commit f040d33253b2daf6f305fc35fca2399047ced028

Authored by Sukumar Ghorai
Committed by Tony Lindgren
1 parent f3d73f362d
Exists in master and in 4 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN, v3.2_SMARCT335xPSP_04.06.00.11

omap3: nand: making ecc layout as compatible with romcode ecc 

This patch overrides nand ecc layout and bad block descriptor (for 8-bit
device) to support hw ecc in romcode layout. So as to have in sync with ecc
layout throughout; i.e. x-loader, u-boot and kernel.

This enables to flash x-loader, u-boot, kernel, FS images from kernel itself
and compatiable with other tools.

This patch does not enables this feature by default and need to pass from
board file to enable for any board.

Signed-off-by: Vimal Singh <vimalsingh@ti.com>
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Showing 2 changed files with 38 additions and 1 deletions Side-by-side Diff

arch/arm/plat-omap/include/plat/gpmc.h
Diff comments   View file @ f040d33
... ... @@ -90,6 +90,8 @@
90 90 /* 1-bit ecc: stored at end of spare area */
91 91 OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
92 92 OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
  93 + /* 1-bit ecc: stored at begining of spare area as romcode */
  94 + OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
93 95 };
94 96  
95 97 /*
drivers/mtd/nand/omap2.c
Diff comments   View file @ f040d33
... ... @@ -98,6 +98,20 @@
98 98 static const char *part_probes[] = { "cmdlinepart", NULL };
99 99 #endif
100 100  
  101 +/* oob info generated runtime depending on ecc algorithm and layout selected */
  102 +static struct nand_ecclayout omap_oobinfo;
  103 +/* Define some generic bad / good block scan pattern which are used
  104 + * while scanning a device for factory marked good / bad blocks
  105 + */
  106 +static uint8_t scan_ff_pattern[] = { 0xff };
  107 +static struct nand_bbt_descr bb_descrip_flashbased = {
  108 + .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
  109 + .offs = 0,
  110 + .len = 1,
  111 + .pattern = scan_ff_pattern,
  112 +};
  113 +
  114 +
101 115 struct omap_nand_info {
102 116 struct nand_hw_control controller;
103 117 struct omap_nand_platform_data *pdata;
... ... @@ -914,6 +928,7 @@
914 928 struct omap_nand_info *info;
915 929 struct omap_nand_platform_data *pdata;
916 930 int err;
  931 + int i, offset;
917 932  
918 933 pdata = pdev->dev.platform_data;
919 934 if (pdata == NULL) {
... ... @@ -1037,7 +1052,8 @@
1037 1052 /* selsect the ecc type */
1038 1053 if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_DEFAULT)
1039 1054 info->nand.ecc.mode = NAND_ECC_SOFT;
1040   - else if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW) {
  1055 + else if ((pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW) ||
  1056 + (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW_ROMCODE)) {
1041 1057 info->nand.ecc.bytes = 3;
1042 1058 info->nand.ecc.size = 512;
1043 1059 info->nand.ecc.calculate = omap_calculate_ecc;
... ... @@ -1057,6 +1073,25 @@
1057 1073 }
1058 1074 }
1059 1075  
  1076 + /* rom code layout */
  1077 + if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW_ROMCODE) {
  1078 +
  1079 + if (info->nand.options & NAND_BUSWIDTH_16)
  1080 + offset = 2;
  1081 + else {
  1082 + offset = 1;
  1083 + info->nand.badblock_pattern = &bb_descrip_flashbased;
  1084 + }
  1085 + omap_oobinfo.eccbytes = 3 * (info->mtd.oobsize/16);
  1086 + for (i = 0; i < omap_oobinfo.eccbytes; i++)
  1087 + omap_oobinfo.eccpos[i] = i+offset;
  1088 +
  1089 + omap_oobinfo.oobfree->offset = offset + omap_oobinfo.eccbytes;
  1090 + omap_oobinfo.oobfree->length = info->mtd.oobsize -
  1091 + (offset + omap_oobinfo.eccbytes);
  1092 +
  1093 + info->nand.ecc.layout = &omap_oobinfo;
  1094 + }
1060 1095  
1061 1096 #ifdef CONFIG_MTD_PARTITIONS
1062 1097 err = parse_mtd_partitions(&info->mtd, part_probes, &info->parts, 0);