Commit f2c2cca3acef8b253a36381d9b469ad4fb08563a

Authored by Andi Kleen
Committed by Andi Kleen
1 parent 5e6b0bfe5b

[PATCH] Remove APIC version/cpu capability mpparse checking/printing

ACPI went to great trouble to get the APIC version and CPU capabilities
of different CPUs before passing them to the mpparser. But all
that data was used was to print it out.  Actually it even faked some data
based on the boot cpu, not on the actual CPU being booted.

Remove all this code because it's not needed.

Cc: len.brown@intel.com

Signed-off-by: Andi Kleen <ak@suse.de>

Showing 2 changed files with 17 additions and 48 deletions Side-by-side Diff

arch/x86_64/kernel/io_apic.c
... ... @@ -1748,19 +1748,6 @@
1748 1748  
1749 1749 #define IO_APIC_MAX_ID 0xFE
1750 1750  
1751   -int __init io_apic_get_version (int ioapic)
1752   -{
1753   - union IO_APIC_reg_01 reg_01;
1754   - unsigned long flags;
1755   -
1756   - spin_lock_irqsave(&ioapic_lock, flags);
1757   - reg_01.raw = io_apic_read(ioapic, 1);
1758   - spin_unlock_irqrestore(&ioapic_lock, flags);
1759   -
1760   - return reg_01.bits.version;
1761   -}
1762   -
1763   -
1764 1751 int __init io_apic_get_redir_entries (int ioapic)
1765 1752 {
1766 1753 union IO_APIC_reg_01 reg_01;
arch/x86_64/kernel/mpparse.c
... ... @@ -41,7 +41,6 @@
41 41 * Various Linux-internal data structures created from the
42 42 * MP-table.
43 43 */
44   -unsigned char apic_version [MAX_APICS];
45 44 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
46 45 int mp_bus_id_to_pci_bus [MAX_MP_BUSSES] = { [0 ... MAX_MP_BUSSES-1] = -1 };
47 46  
48 47  
49 48  
50 49  
51 50  
... ... @@ -94,24 +93,21 @@
94 93 static void __cpuinit MP_processor_info (struct mpc_config_processor *m)
95 94 {
96 95 int cpu;
97   - unsigned char ver;
98 96 cpumask_t tmp_map;
  97 + char *bootup_cpu = "";
99 98  
100 99 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
101 100 disabled_cpus++;
102 101 return;
103 102 }
104 103  
105   - printk(KERN_INFO "Processor #%d %d:%d APIC version %d\n",
106   - m->mpc_apicid,
107   - (m->mpc_cpufeature & CPU_FAMILY_MASK)>>8,
108   - (m->mpc_cpufeature & CPU_MODEL_MASK)>>4,
109   - m->mpc_apicver);
110   -
111 104 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
112   - Dprintk(" Bootup CPU\n");
  105 + bootup_cpu = " (Bootup-CPU)";
113 106 boot_cpu_id = m->mpc_apicid;
114 107 }
  108 +
  109 + printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
  110 +
115 111 if (num_processors >= NR_CPUS) {
116 112 printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached."
117 113 " Processor ignored.\n", NR_CPUS);
118 114  
... ... @@ -129,17 +125,7 @@
129 125 return;
130 126 }
131 127 #endif
132   - ver = m->mpc_apicver;
133   -
134 128 physid_set(m->mpc_apicid, phys_cpu_present_map);
135   - /*
136   - * Validate version
137   - */
138   - if (ver == 0x0) {
139   - printk(KERN_ERR "BIOS bug, APIC version is 0 for CPU#%d! fixing up to 0x10. (tell your hw vendor)\n", m->mpc_apicid);
140   - ver = 0x10;
141   - }
142   - apic_version[m->mpc_apicid] = ver;
143 129 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
144 130 /*
145 131 * bios_cpu_apicid is required to have processors listed
... ... @@ -179,8 +165,8 @@
179 165 if (!(m->mpc_flags & MPC_APIC_USABLE))
180 166 return;
181 167  
182   - printk("I/O APIC #%d Version %d at 0x%X.\n",
183   - m->mpc_apicid, m->mpc_apicver, m->mpc_apicaddr);
  168 + printk("I/O APIC #%d at 0x%X.\n",
  169 + m->mpc_apicid, m->mpc_apicaddr);
184 170 if (nr_ioapics >= MAX_IO_APICS) {
185 171 printk(KERN_ERR "Max # of I/O APICs (%d) exceeded (found %d).\n",
186 172 MAX_IO_APICS, nr_ioapics);
187 173  
... ... @@ -413,13 +399,10 @@
413 399 * 2 CPUs, numbered 0 & 1.
414 400 */
415 401 processor.mpc_type = MP_PROCESSOR;
416   - /* Either an integrated APIC or a discrete 82489DX. */
417   - processor.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  402 + processor.mpc_apicver = 0;
418 403 processor.mpc_cpuflag = CPU_ENABLED;
419   - processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) |
420   - (boot_cpu_data.x86_model << 4) |
421   - boot_cpu_data.x86_mask;
422   - processor.mpc_featureflag = boot_cpu_data.x86_capability[0];
  404 + processor.mpc_cpufeature = 0;
  405 + processor.mpc_featureflag = 0;
423 406 processor.mpc_reserved[0] = 0;
424 407 processor.mpc_reserved[1] = 0;
425 408 for (i = 0; i < 2; i++) {
... ... @@ -448,7 +431,7 @@
448 431  
449 432 ioapic.mpc_type = MP_IOAPIC;
450 433 ioapic.mpc_apicid = 2;
451   - ioapic.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  434 + ioapic.mpc_apicver = 0;
452 435 ioapic.mpc_flags = MPC_APIC_USABLE;
453 436 ioapic.mpc_apicaddr = 0xFEC00000;
454 437 MP_ioapic_info(&ioapic);
455 438  
... ... @@ -640,12 +623,11 @@
640 623  
641 624 processor.mpc_type = MP_PROCESSOR;
642 625 processor.mpc_apicid = id;
643   - processor.mpc_apicver = GET_APIC_VERSION(apic_read(APIC_LVR));
  626 + processor.mpc_apicver = 0;
644 627 processor.mpc_cpuflag = (enabled ? CPU_ENABLED : 0);
645 628 processor.mpc_cpuflag |= (boot_cpu ? CPU_BOOTPROCESSOR : 0);
646   - processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) |
647   - (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
648   - processor.mpc_featureflag = boot_cpu_data.x86_capability[0];
  629 + processor.mpc_cpufeature = 0;
  630 + processor.mpc_featureflag = 0;
649 631 processor.mpc_reserved[0] = 0;
650 632 processor.mpc_reserved[1] = 0;
651 633  
... ... @@ -700,7 +682,7 @@
700 682  
701 683 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
702 684 mp_ioapics[idx].mpc_apicid = id;
703   - mp_ioapics[idx].mpc_apicver = io_apic_get_version(idx);
  685 + mp_ioapics[idx].mpc_apicver = 0;
704 686  
705 687 /*
706 688 * Build basic IRQ lookup table to facilitate gsi->io_apic lookups
707 689  
... ... @@ -711,9 +693,9 @@
711 693 mp_ioapic_routing[idx].gsi_end = gsi_base +
712 694 io_apic_get_redir_entries(idx);
713 695  
714   - printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, "
  696 + printk(KERN_INFO "IOAPIC[%d]: apic_id %d, address 0x%x, "
715 697 "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
716   - mp_ioapics[idx].mpc_apicver, mp_ioapics[idx].mpc_apicaddr,
  698 + mp_ioapics[idx].mpc_apicaddr,
717 699 mp_ioapic_routing[idx].gsi_start,
718 700 mp_ioapic_routing[idx].gsi_end);
719 701 }