Commit f57d98ae6979f7bcbf758023b4716f485385f903

Authored by Joerg Roedel
1 parent c1858976f5

AMD IOMMU: add stats counter for single iommu domain tlb flushes

Impact: see number of single iommu domain tlb flushes in debugfs

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>

Showing 1 changed file with 4 additions and 0 deletions Side-by-side Diff

arch/x86/kernel/amd_iommu.c
... ... @@ -72,6 +72,7 @@
72 72 DECLARE_STATS_COUNTER(cnt_alloc_coherent);
73 73 DECLARE_STATS_COUNTER(cnt_free_coherent);
74 74 DECLARE_STATS_COUNTER(cross_page);
  75 +DECLARE_STATS_COUNTER(domain_flush_single);
75 76  
76 77 static struct dentry *stats_dir;
77 78 static struct dentry *de_isolate;
... ... @@ -106,6 +107,7 @@
106 107 amd_iommu_stats_add(&cnt_alloc_coherent);
107 108 amd_iommu_stats_add(&cnt_free_coherent);
108 109 amd_iommu_stats_add(&cross_page);
  110 + amd_iommu_stats_add(&domain_flush_single);
109 111 }
110 112  
111 113 #endif
... ... @@ -412,6 +414,8 @@
412 414 static void iommu_flush_tlb(struct amd_iommu *iommu, u16 domid)
413 415 {
414 416 u64 address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS;
  417 +
  418 + INC_STATS_COUNTER(domain_flush_single);
415 419  
416 420 iommu_queue_inv_iommu_pages(iommu, address, domid, 0, 1);
417 421 }