06 Sep, 2005

2 commits


05 Sep, 2005

4 commits

  • We need to indicate to the hypervisor that it needs to save our VMX
    registers when switching partitions on a shared-processor system, just as
    it needs to for FP and PMC registers.

    This could be made to be on-demand when VMX is used, but we don't do that
    for FP nor PMC right now either so let's not overcomplicate things.

    Signed-off-by: Olof Johansson
    Acked-by: Paul Mackerras
    Cc: Anton Blanchard
    Cc:
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Olof Johansson
     
  • This is used only in slab.c and each architecture gets to define whcih
    underlying type is to be used.

    Seems a bit silly - move it to slab.c and use the same type for all
    architectures: unsigned int.

    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Kyle Moffett
     
  • Someone mentioned that almost all the architectures used basically the same
    implementation of get_order. This patch consolidates them into
    asm-generic/page.h and includes that in the appropriate places. The
    exceptions are ia64 and ppc which have their own (presumably optimised)
    versions.

    Signed-off-by: Stephen Rothwell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Stephen Rothwell
     
  • A new option for SPARSEMEM is ARCH_SPARSEMEM_EXTREME. Architecture
    platforms with a very sparse physical address space would likely want to
    select this option. For those architecture platforms that don't select the
    option, the code generated is equivalent to SPARSEMEM currently in -mm.
    I'll be posting a patch on ia64 ml which uses this new SPARSEMEM feature.

    ARCH_SPARSEMEM_EXTREME makes mem_section a one dimensional array of
    pointers to mem_sections. This two level layout scheme is able to achieve
    smaller memory requirements for SPARSEMEM with the tradeoff of an
    additional shift and load when fetching the memory section. The current
    SPARSEMEM -mm implementation is a one dimensional array of mem_sections
    which is the default SPARSEMEM configuration. The patch attempts isolates
    the implementation details of the physical layout of the sparsemem section
    array.

    ARCH_SPARSEMEM_EXTREME depends on 64BIT and is by default boolean false.

    I've boot tested under aim load ia64 configured for ARCH_SPARSEMEM_EXTREME.
    I've also boot tested a 4 way Opteron machine with !ARCH_SPARSEMEM_EXTREME
    and tested with aim.

    Signed-off-by: Andy Whitcroft
    Signed-off-by: Bob Picco
    Signed-off-by: Dave Hansen
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Bob Picco
     

30 Aug, 2005

12 commits


29 Aug, 2005

22 commits

  • Paulus, I think this is now a reasonable candidate for the post-2.6.13
    queue.

    Relax address restrictions for hugepages on ppc64

    Presently, 64-bit applications on ppc64 may only use hugepages in the
    address region from 1-1.5T. Furthermore, if hugepages are enabled in
    the kernel config, they may only use hugepages and never normal pages
    in this area. This patch relaxes this restriction, allowing any
    address to be used with hugepages, but with a 1TB granularity. That
    is if you map a hugepage anywhere in the region 1TB-2TB, that entire
    area will be reserved exclusively for hugepages for the remainder of
    the process's lifetime. This works analagously to hugepages in 32-bit
    applications, where hugepages can be mapped anywhere, but with 256MB
    (mmu segment) granularity.

    This patch applies on top of the four level pagetable patch
    (http://patchwork.ozlabs.org/linuxppc64/patch?id=1936).

    Signed-off-by: David Gibson
    Signed-off-by: Paul Mackerras

    David Gibson
     
  • This patch moves power4_enable_pmcs() to arch/ppc64/kernel/pmc.c.

    I've tested it on P5 LPAR and P4. It does what it used to.

    Signed-off-by: Michael Ellerman
    Signed-off-by: Paul Mackerras

    Michael Ellerman
     
  • If both CONFIG_XMON and CONFIG_XMON_DEFAULT is enabled in the .config,
    there is no way to disable xmon again. setup_system calls first xmon_init,
    later parse_early_param. So a new 'xmon=off' cmdline option will do the right
    thing.

    Signed-off-by: Olaf Hering
    Signed-off-by: Paul Mackerras

    Olaf Hering
     
  • We can now remove CONFIG_MSCHUNKS as it doesn't do anything interesting
    anymore.

    The only macro in abs_addr.h which is called by non-iSeries code is
    phys_to_abs(), so remove the other dummy implementations, and we add a
    firmware feature check to phys_to_abs().

    Signed-off-by: Michael Ellerman
    Signed-off-by: Paul Mackerras

    Michael Ellerman
     
  • We no longer need the lmb code to know about abs and phys addresses, so
    remove the physbase variable from the lmb_property struct.

    Signed-off-by: Michael Ellerman
    Signed-off-by: Paul Mackerras

    Michael Ellerman
     
  • abs_to_phys() is a macro that turns out to do nothing, and also has the
    unfortunate property that it's not the inverse of phys_to_abs() on iSeries.

    The following is for my benefit as much as everyone else.

    With CONFIG_MSCHUNKS enabled, the lmb code is changed such that it keeps
    a physbase variable for each lmb region. This is used to take the possibly
    discontiguous lmb regions and present them as a contiguous address space
    beginning from zero.

    In this context each lmb region's base address is its "absolute" base
    address, and its physbase is it's "physical" address (from Linux's point of
    view). The abs_to_phys() macro does the mapping from "absolute" to "physical".

    Note: This is not related to the iSeries mapping of physical to absolute
    (ie. Hypervisor) addresses which is maintained with the msChunks structure.
    And the msChunks structure is not controlled via CONFIG_MSCHUNKS.

    Once upon a time you could compile for non-iSeries with CONFIG_MSCHUNKS
    enabled. But these days CONFIG_MSCHUNKS depends on CONFIG_PPC_ISERIES, so
    for non-iSeries code abs_to_phys() is a no-op.

    On iSeries we always have one lmb region which spans from 0 to
    systemcfg->physicalMemorySize (arch/ppc64/kernel/iSeries_setup.c line 383).
    This region has a base (ie. absolute) address of 0, and a physbase address
    of 0 (as calculated in lmb_analyze() (arch/ppc64/kernel/lmb.c line 144)).

    On iSeries, abs_to_phys(aa) is defined as lmb_abs_to_phys(aa), which finds
    the lmb region containing aa (and there's only one, ie. 0), and then does:

    return lmb.memory.region[0].physbase + (aa - lmb.memory.region[0].base)

    physbase == base == 0, so you're left with "return aa".

    So remove abs_to_phys(), and lmb_abs_to_phys() which is the implementation
    of abs_to_phys() for iSeries.

    Signed-off-by: Michael Ellerman
    Signed-off-by: Paul Mackerras

    Michael Ellerman
     
  • physRpn_to_absRpn is a no-op on non-iSeries platforms, remove the two
    redundant calls.

    There's only one caller on iSeries so fold the logic in there so we can get
    rid of it completely.

    Signed-off-by: Michael Ellerman
    Signed-off-by: Paul Mackerras

    Michael Ellerman
     
  • The only caller of chunk_offset() and abs_chunk() is phys_to_abs(), so
    fold the former two into the latter.

    Signed-off-by: Michael Ellerman
    Signed-off-by: Paul Mackerras

    Michael Ellerman
     
  • Rename the msChunks struct to get rid of the StUdlY caps and make it a bit
    clearer what it's for.

    Signed-off-by: Michael Ellerman
    Signed-off-by: Paul Mackerras

    Michael Ellerman
     
  • Chunks are 256KB, so use constants for the size/shift/mask, rather than
    getting them from the msChunks struct. The iSeries debugger (??) might still
    need access to the values in the msChunks struct, so we keep them around
    for now, but set them from the constant values.

    Replace msChunks_entry typedef with regular u32.

    Simplify msChunks_alloc() to manipulate klimit directly, rather than via
    a parameter.

    Move msChunks_alloc() and msChunks into iSeries_setup.c, as that's where
    they're used.

    Signed-off-by: Michael Ellerman
    Signed-off-by: Paul Mackerras

    Michael Ellerman
     
  • The msChunks code was written to work on pSeries, but now it's only used on
    iSeries. This means there's no need to do PTRRELOC anymore, so remove it all.

    A few places were getting "extern reloc_offset()" from abs_addr.h, move it
    into system.h instead.

    Signed-off-by: Michael Ellerman
    Signed-off-by: Paul Mackerras

    Michael Ellerman
     
  • Signed-off-by: Stephen Rothwell
    Signed-off-by: Paul Mackerras

    Stephen Rothwell
     
  • Make firmware_has_feature() evaluate at compile time for the non pSeries
    case and tidy up code where possible.

    Signed-off-by: Stephen Rothwell
    Signed-off-by: Paul Mackerras

    Stephen Rothwell
     
  • Create the firmware_has_feature() inline and move the firmware feature
    stuff into its own header file.

    Signed-off-by: Stephen Rothwell
    Signed-off-by: Paul Mackerras

    Stephen Rothwell
     
  • The firmware_features field of struct cpu_spec should really be a separate
    variable as the firmware features do not depend on the chip and the
    bitmask is constructed independently. By removing it, we save 112 bytes
    from the cpu_specs array and we access the bitmask directly instead of via
    the cur_cpu_spec pointer.

    Signed-off-by: Stephen Rothwell
    Signed-off-by: Paul Mackerras

    Stephen Rothwell
     
  • On ppc64 machines with segment tables, CPU0's segment table is at a
    fixed address, currently 0x9000. This patch moves it to the free
    space at 0x6000, just below the fwnmi data area. This saves 8k of
    space in vmlinux and the runtime kernel image.

    Signed-off-by: David Gibson
    Signed-off-by: Paul Mackerras

    David Gibson
     
  • Comments in head.S suggest that the iSeries naca has a fixed address,
    because tools expect to find it there. The only tool which appears to
    access the naca is addRamDisk, but both the in-kernel version and the
    version used in RHEL and SuSE in fact locate the NACA the same way as
    the hypervisor does, by following the pointer in the hvReleaseData
    structure.

    Since the requirement for a fixed address seems to be obsolete, this
    patch removes the naca from head.S and replaces it with a normal C
    initializer.

    For good measure, it removes an old version of addRamDisk.c which was
    sitting, unused, in the ppc32 tree.

    Signed-off-by: David Gibson
    Signed-off-by: Paul Mackerras

    David Gibson
     
  • This patch just splits out the pSeries specific parts of vio.c.

    Signed-off-by: Stephen Rothwell
    Signed-off-by: Paul Mackerras

    Stephen Rothwell
     
  • This patch allows us to have a different bus if matching function for
    each platform.

    Signed-off-by: Stephen Rothwell
    Signed-off-by: Paul Mackerras

    Stephen Rothwell
     
  • Since the iSeries vio iommu tables cannot be used until after the vio bus has
    been initialised, move the initialisation of the tables to there.

    Signed-off-by: Stephen Rothwell
    Signed-off-by: Paul Mackerras

    Stephen Rothwell
     
  • This patch splits the iSeries specific parts out of vio.c.

    Signed-off-by: Stephen Rothwell
    Signed-off-by: Paul Mackerras

    Stephen Rothwell
     
  • This patch updates the format of the flattened device-tree passed
    between the boot trampoline and the kernel to support a more compact
    representation, for use by embedded systems mostly.

    Signed-off-by: Benjamin Herrenschmidt
    Signed-off-by: Paul Mackerras

    Benjamin Herrenschmidt