24 Feb, 2011
1 commit
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x86_of_pci_init() does two things:
- it provides a generic irq enable and disable function. enable queries
the device tree for the interrupt information, calls ->xlate on the
irq host and updates the pci->irq information for the device.- it walks through PCI bus(es) in the device tree and adds its children
(device) nodes to appropriate pci_dev nodes in kernel. So the dtb
node information is available at probe time of the PCI device.Adding a PCI bus based on the information in the device tree is
currently not supported. Right now direct access via ioports is used.Signed-off-by: Sebastian Andrzej Siewior
Tested-by: Dirk Brandewie
Acked-by: Grant Likely
Cc: sodaville@linutronix.de
Cc: devicetree-discuss@lists.ozlabs.org
LKML-Reference:
Signed-off-by: Thomas Gleixner
05 Feb, 2011
1 commit
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There is a tiny difference between PPC32 and PPC64. Microblaze uses the
PPC32 variant.Signed-off-by: Sebastian Andrzej Siewior
[grant.likely@secretlab.ca: Added comment to #endif, moved documentation
block to function implementation, fixed for non ppc and microblaze
compiles]
Signed-off-by: Grant Likely