11 Oct, 2010

1 commit

  • Now that we've got a generic perf-events based oprofile backend we might
    as well make use of it seeing as SH doesn't do anything special with its
    oprofile backend. Also introduce a new CONFIG_HW_PERF_EVENTS symbol so
    that we can fallback to using the timer interrupt for oprofile if the
    CPU doesn't support perf events.

    Also, to avoid a section mismatch warning we need to annotate
    oprofile_arch_exit() with an __exit marker.

    Signed-off-by: Matt Fleming
    Acked-by: Paul Mundt
    Signed-off-by: Robert Richter

    Matt Fleming
     

27 Jul, 2010

1 commit

  • Now that all arches have been converted over to use generic time via
    clocksources or arch_gettimeoffset(), we can remove the GENERIC_TIME
    config option and simplify the generic code.

    Signed-off-by: John Stultz
    LKML-Reference:
    Signed-off-by: Thomas Gleixner

    John Stultz
     

14 Jul, 2010

1 commit

  • via following scripts

    FILES=$(find * -type f | grep -vE 'oprofile|[^K]config')

    sed -i \
    -e 's/lmb/memblock/g' \
    -e 's/LMB/MEMBLOCK/g' \
    $FILES

    for N in $(find . -name lmb.[ch]); do
    M=$(echo $N | sed 's/lmb/memblock/g')
    mv $N $M
    done

    and remove some wrong change like lmbench and dlmb etc.

    also move memblock.c from lib/ to mm/

    Suggested-by: Ingo Molnar
    Acked-by: "H. Peter Anvin"
    Acked-by: Benjamin Herrenschmidt
    Acked-by: Linus Torvalds
    Signed-off-by: Yinghai Lu
    Signed-off-by: Benjamin Herrenschmidt

    Yinghai Lu
     

02 Jun, 2010

2 commits

  • Paul Mundt
     
  • This extends some of the existing special casing for HAS_IOPORT
    platforms and gets it to the point where platforms can begin to
    conditionally select it.

    The major changes here are that the PIO routines themselves go away
    completely, including all of the machvec port mapping wrappers. With this
    in place it's possible for any non-machvec abusing platform to disable
    PIO completely. At present this is left as an opt-in until the abusers
    are the odd ones out instead of the majority.

    Signed-off-by: Paul Mundt

    Paul Mundt
     

31 May, 2010

1 commit

  • This patch is V2 of the MMCIF romImage boot support
    for sh7724 and the Ecovec board. With this patch
    applied and CONFIG_ROMIMAGE_MMCIF selected the
    romImage kernel image can be written to a MMC card
    and booted directly by the sh7724 cpu.

    Signed-off-by: Magnus Damm
    Signed-off-by: Paul Mundt

    Magnus Damm
     

28 May, 2010

1 commit

  • There are only two ways to define sg_dma_len(); use sg->dma_length or
    sg->length. This patch introduces NEED_SG_DMA_LENGTH that enables
    architectures to choose sg->dma_length or sg->length.

    Signed-off-by: FUJITA Tomonori
    Cc: Arnd Bergmann
    Cc: Richard Henderson
    Cc: Ivan Kokshaysky
    Cc: Matt Turner
    Cc: Russell King
    Cc: Benjamin Herrenschmidt
    Cc: Paul Mackerras
    Cc: Ingo Molnar
    Cc: Thomas Gleixner
    Cc: "H. Peter Anvin"
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    FUJITA Tomonori
     

20 May, 2010

1 commit

  • * git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (127 commits)
    sh: update defconfigs.
    sh: Fix up the NUMA build for recent LMB changes.
    sh64: provide a stub per_cpu_trap_init() definition.
    sh: fix up CONFIG_KEXEC=n build.
    sh: fixup the docbook paths for clock framework shuffling.
    driver core: Early dev_name() depends on slab_is_available().
    sh: simplify WARN usage in SH clock driver
    sh: Check return value of clk_get on ms7724
    sh: Check return value of clk_get on ecovec24
    sh: move sh clock-cpg.c contents to drivers/sh/clk-cpg.c
    sh: move sh clock.c contents to drivers/sh/clk.
    sh: move sh asm/clock.h contents to linux/sh_clk.h V2
    sh: remove unused clock lookup
    sh: switch boards to clkdev
    sh: switch sh4-202 to clkdev
    sh: switch shx3 to clkdev
    sh: switch sh7757 to clkdev
    sh: switch sh7763 to clkdev
    sh: switch sh7780 to clkdev
    sh: switch sh7786 to clkdev
    ...

    Linus Torvalds
     

13 May, 2010

1 commit


11 May, 2010

1 commit


07 May, 2010

1 commit


01 May, 2010

1 commit

  • There are two outstanding fashions for archs to implement hardware
    breakpoints.

    The first is to separate breakpoint address pattern definition
    space between data and instruction breakpoints. We then have
    typically distinct instruction address breakpoint registers
    and data address breakpoint registers, delivered with
    separate control registers for data and instruction breakpoints
    as well. This is the case of PowerPc and ARM for example.

    The second consists in having merged breakpoint address space
    definition between data and instruction breakpoint. Address
    registers can host either instruction or data address and
    the access mode for the breakpoint is defined in a control
    register. This is the case of x86 and Super H.

    This patch adds a new CONFIG_HAVE_MIXED_BREAKPOINTS_REGS config
    that archs can select if they belong to the second case. Those
    will have their slot allocation merged for instructions and
    data breakpoints.

    The others will have a separate slot tracking between data and
    instruction breakpoints.

    Signed-off-by: Frederic Weisbecker
    Acked-by: Paul Mundt
    Cc: Will Deacon
    Cc: Mahesh Salgaonkar
    Cc: K. Prasad
    Cc: Benjamin Herrenschmidt
    Cc: Paul Mackerras
    Cc: Ingo Molnar

    Frederic Weisbecker
     

29 Apr, 2010

1 commit


27 Apr, 2010

1 commit

  • The UP dependency was inherited from ARM, which seems to have run in to
    it due to the stacktrace code not being available for SMP in certain
    cases, as we don't have this particular limitation there is no specific
    need to block on the SMP dependency.

    Signed-off-by: Paul Mundt

    Paul Mundt
     

26 Apr, 2010

1 commit


13 Apr, 2010

1 commit

  • This adds support for hardware-assisted userspace irq masking for
    special priority levels. Due to the SR.IMASK interactivity, only some
    platforms implement this in hardware (including but not limited to
    SH-4A interrupt controllers, and ARM-based SH-Mobile CPUs). Each CPU
    needs to wire this up on its own, for now only SH7786 is wired up as an
    example.

    Signed-off-by: Paul Mundt

    Paul Mundt
     

13 Mar, 2010

1 commit


02 Feb, 2010

5 commits


29 Jan, 2010

1 commit

  • Newer SH parts are now commonly shipping with multiple controllers, so
    we wire up PCI domain support to deal with them. Shamelessly cloned from
    the MIPS implementation.

    Signed-off-by: Paul Mundt

    Paul Mundt
     

19 Jan, 2010

2 commits

  • This rewrites the SH7786 clock framework support completely. It's
    reworked to provide all of the DIV4 and MSTP function clocks. This brings
    it in line with the current clock framework code and lets us drop SH7786
    from the list of CPUs that require legacy CPG handling.

    Signed-off-by: Paul Mundt

    Paul Mundt
     
  • Presently ioremap_prot() uses an unsigned long to pass the pgprot value
    around. This results in the upper half of the pgprot being chomped when
    using 64-bit pgprots on a 32-bit ABI (X2TLB and SH-5).

    As the only users of ioremap_prot() are presently legacy parts, this
    doesn't cause too much of an issue. In the future when the interface is
    converted to use pgprot_t directly this can be re-enabled for the other
    parts, too.

    Signed-off-by: Paul Mundt

    Paul Mundt
     

13 Jan, 2010

2 commits


12 Jan, 2010

1 commit

  • As SH has a very sparse IRQ map by default, all new CPUs and boards
    benefit from using sparseirq by default. Despite this, there are still a
    few stragglers (mostly due to using a fixed IRQ range for their FPGA
    IRQ mappings), and these still need to be converted over one by one. As
    these are now in the minority, and we do not want to encourage this sort
    of brain-damage in newer board ports, we force sparseirq on.

    Signed-off-by: Paul Mundt

    Paul Mundt
     

06 Jan, 2010

2 commits


29 Dec, 2009

1 commit

  • As CPUs are migrated over to more fully-featured clock frameworks of
    their own and off of the legacy CPG code, they no longer have any real
    need for defining the PCLK value. The PCLK define in itself is already
    fairly misleading, as many boards get their input clocks from different
    sources, making this value fairly arbitrary anyways.

    Outside of the legacy CPG clock framework, the only place where this
    value is used is for deriving CLOCK_TICK_RATE, which we set back to the
    legacy PIT value that it was before the PCLK definitions were added in
    the first place.

    Signed-off-by: Paul Mundt

    Paul Mundt
     

21 Dec, 2009

1 commit


08 Dec, 2009

2 commits

  • Conflict between FPU thread flag migration and debug
    thread flag addition.

    Conflicts:
    arch/sh/include/asm/thread_info.h
    arch/sh/include/asm/ubc.h
    arch/sh/kernel/process_32.c

    Paul Mundt
     
  • This adds preliminary support for the SH-4A UBC to the hw-breakpoints API.
    Presently only a single channel is implemented, and the ptrace interface
    still needs to be converted. This is the first step to cleaning up the
    long-standing UBC mess, making the UBC more generally accessible, and
    finally making it SMP safe.

    An additional abstraction will be layered on top of this as with the perf
    events code to permit the various CPU families to wire up support for
    their own specific UBCs, as many variations exist.

    Signed-off-by: Paul Mundt

    Paul Mundt
     

27 Oct, 2009

5 commits


20 Oct, 2009

1 commit