From 57feabef01e603380f67fac8b5ba8b8b9771d76f Mon Sep 17 00:00:00 2001
From: "Tom.zheng" <haidong.zheng@nxp.com>
Date: Wed, 25 Apr 2018 13:50:11 +0800
Subject: [PATCH] Add NOC tuning SMC case, lower cpu vpu memory access priority for this case

diff --git a/plat/freescale/common/include/fsl_sip.h b/plat/freescale/common/include/fsl_sip.h
index 24b8eb3..56aa91d 100644
--- a/plat/freescale/common/include/fsl_sip.h
+++ b/plat/freescale/common/include/fsl_sip.h
@@ -47,5 +47,6 @@
 
 #define FSL_SIP_NOC			0xc2000008
 #define FSL_SIP_NOC_LCDIF		0x0
+#define FSL_SIP_NOC_TUNE		0x1
 
 #endif
diff --git a/plat/freescale/imx8mq/src.c b/plat/freescale/imx8mq/src.c
index 11e30ee..90d2d16 100644
--- a/plat/freescale/imx8mq/src.c
+++ b/plat/freescale/imx8mq/src.c
@@ -82,6 +82,13 @@ int imx_noc_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2,
 		mmio_write_32(IMX_NOC_BASE + 0x18c, 0x1);
 		mmio_write_32(IMX_NOC_BASE + 0x190, 0x500);
 		mmio_write_32(IMX_NOC_BASE + 0x194, 0x30);
+                break;
+
+	case FSL_SIP_NOC_TUNE:
+		/* config NOC for VPU */
+		mmio_write_32(IMX_NOC_BASE + 0x108, 0x80000300);
+		/* config NOC for CPU */
+		mmio_write_32(IMX_NOC_BASE + 0x188, 0x80000300);
 		break;
 	default:
 		return SMC_UNK;