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drivers/ssb/pci.c
36.8 KB
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/* * Sonics Silicon Backplane PCI-Hostbus related functions. * |
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* Copyright (C) 2005-2006 Michael Buesch <m@bues.ch> |
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* Copyright (C) 2005 Martin Langer <martin-langer@gmx.de> * Copyright (C) 2005 Stefano Brivio <st3@riseup.net> * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org> * Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch> * * Derived from the Broadcom 4400 device driver. * Copyright (C) 2002 David S. Miller (davem@redhat.com) * Fixed by Pekka Pietikainen (pp@ee.oulu.fi) * Copyright (C) 2006 Broadcom Corporation. * * Licensed under the GNU/GPL. See COPYING for details. */ |
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#include "ssb_private.h" |
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#include <linux/ssb/ssb.h> #include <linux/ssb/ssb_regs.h> |
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#include <linux/slab.h> |
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#include <linux/pci.h> #include <linux/delay.h> |
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/* Define the following to 1 to enable a printk on each coreswitch. */ #define SSB_VERBOSE_PCICORESWITCH_DEBUG 0 /* Lowlevel coreswitching */ int ssb_pci_switch_coreidx(struct ssb_bus *bus, u8 coreidx) { int err; int attempts = 0; u32 cur_core; while (1) { err = pci_write_config_dword(bus->host_pci, SSB_BAR0_WIN, (coreidx * SSB_CORE_SIZE) + SSB_ENUM_BASE); if (err) goto error; err = pci_read_config_dword(bus->host_pci, SSB_BAR0_WIN, &cur_core); if (err) goto error; cur_core = (cur_core - SSB_ENUM_BASE) / SSB_CORE_SIZE; if (cur_core == coreidx) break; if (attempts++ > SSB_BAR0_MAX_RETRIES) goto error; udelay(10); } return 0; error: |
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pr_err("Failed to switch to core %u ", coreidx); |
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return -ENODEV; } int ssb_pci_switch_core(struct ssb_bus *bus, struct ssb_device *dev) { int err; unsigned long flags; #if SSB_VERBOSE_PCICORESWITCH_DEBUG |
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pr_info("Switching to %s core, index %d ", ssb_core_name(dev->id.coreid), dev->core_index); |
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#endif spin_lock_irqsave(&bus->bar_lock, flags); err = ssb_pci_switch_coreidx(bus, dev->core_index); if (!err) bus->mapped_device = dev; spin_unlock_irqrestore(&bus->bar_lock, flags); return err; } /* Enable/disable the on board crystal oscillator and/or PLL. */ int ssb_pci_xtal(struct ssb_bus *bus, u32 what, int turn_on) { int err; u32 in, out, outenable; u16 pci_status; if (bus->bustype != SSB_BUSTYPE_PCI) return 0; err = pci_read_config_dword(bus->host_pci, SSB_GPIO_IN, &in); if (err) goto err_pci; err = pci_read_config_dword(bus->host_pci, SSB_GPIO_OUT, &out); if (err) goto err_pci; err = pci_read_config_dword(bus->host_pci, SSB_GPIO_OUT_ENABLE, &outenable); if (err) goto err_pci; outenable |= what; if (turn_on) { /* Avoid glitching the clock if GPRS is already using it. * We can't actually read the state of the PLLPD so we infer it * by the value of XTAL_PU which *is* readable via gpioin. */ if (!(in & SSB_GPIO_XTAL)) { if (what & SSB_GPIO_XTAL) { /* Turn the crystal on */ out |= SSB_GPIO_XTAL; if (what & SSB_GPIO_PLL) out |= SSB_GPIO_PLL; err = pci_write_config_dword(bus->host_pci, SSB_GPIO_OUT, out); if (err) goto err_pci; err = pci_write_config_dword(bus->host_pci, SSB_GPIO_OUT_ENABLE, outenable); if (err) goto err_pci; msleep(1); } if (what & SSB_GPIO_PLL) { /* Turn the PLL on */ out &= ~SSB_GPIO_PLL; err = pci_write_config_dword(bus->host_pci, SSB_GPIO_OUT, out); if (err) goto err_pci; msleep(5); } } err = pci_read_config_word(bus->host_pci, PCI_STATUS, &pci_status); if (err) goto err_pci; pci_status &= ~PCI_STATUS_SIG_TARGET_ABORT; err = pci_write_config_word(bus->host_pci, PCI_STATUS, pci_status); if (err) goto err_pci; } else { if (what & SSB_GPIO_XTAL) { /* Turn the crystal off */ out &= ~SSB_GPIO_XTAL; } if (what & SSB_GPIO_PLL) { /* Turn the PLL off */ out |= SSB_GPIO_PLL; } err = pci_write_config_dword(bus->host_pci, SSB_GPIO_OUT, out); if (err) goto err_pci; err = pci_write_config_dword(bus->host_pci, SSB_GPIO_OUT_ENABLE, outenable); if (err) goto err_pci; } out: return err; err_pci: |
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pr_err("Error: ssb_pci_xtal() could not access PCI config space! "); |
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err = -EBUSY; goto out; } /* Get the word-offset for a SSB_SPROM_XXX define. */ |
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#define SPOFF(offset) ((offset) / sizeof(u16)) |
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/* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */ |
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#define SPEX16(_outvar, _offset, _mask, _shift) \ |
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out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift)) |
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#define SPEX32(_outvar, _offset, _mask, _shift) \ out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \ in[SPOFF(_offset)]) & (_mask)) >> (_shift)) #define SPEX(_outvar, _offset, _mask, _shift) \ SPEX16(_outvar, _offset, _mask, _shift) |
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#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ do { \ SPEX(_field[0], _offset + 0, _mask, _shift); \ SPEX(_field[1], _offset + 2, _mask, _shift); \ SPEX(_field[2], _offset + 4, _mask, _shift); \ SPEX(_field[3], _offset + 6, _mask, _shift); \ SPEX(_field[4], _offset + 8, _mask, _shift); \ SPEX(_field[5], _offset + 10, _mask, _shift); \ SPEX(_field[6], _offset + 12, _mask, _shift); \ SPEX(_field[7], _offset + 14, _mask, _shift); \ } while (0) |
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static inline u8 ssb_crc8(u8 crc, u8 data) { /* Polynomial: x^8 + x^7 + x^6 + x^4 + x^2 + 1 */ static const u8 t[] = { 0x00, 0xF7, 0xB9, 0x4E, 0x25, 0xD2, 0x9C, 0x6B, 0x4A, 0xBD, 0xF3, 0x04, 0x6F, 0x98, 0xD6, 0x21, 0x94, 0x63, 0x2D, 0xDA, 0xB1, 0x46, 0x08, 0xFF, 0xDE, 0x29, 0x67, 0x90, 0xFB, 0x0C, 0x42, 0xB5, 0x7F, 0x88, 0xC6, 0x31, 0x5A, 0xAD, 0xE3, 0x14, 0x35, 0xC2, 0x8C, 0x7B, 0x10, 0xE7, 0xA9, 0x5E, 0xEB, 0x1C, 0x52, 0xA5, 0xCE, 0x39, 0x77, 0x80, 0xA1, 0x56, 0x18, 0xEF, 0x84, 0x73, 0x3D, 0xCA, 0xFE, 0x09, 0x47, 0xB0, 0xDB, 0x2C, 0x62, 0x95, 0xB4, 0x43, 0x0D, 0xFA, 0x91, 0x66, 0x28, 0xDF, 0x6A, 0x9D, 0xD3, 0x24, 0x4F, 0xB8, 0xF6, 0x01, 0x20, 0xD7, 0x99, 0x6E, 0x05, 0xF2, 0xBC, 0x4B, 0x81, 0x76, 0x38, 0xCF, 0xA4, 0x53, 0x1D, 0xEA, 0xCB, 0x3C, 0x72, 0x85, 0xEE, 0x19, 0x57, 0xA0, 0x15, 0xE2, 0xAC, 0x5B, 0x30, 0xC7, 0x89, 0x7E, 0x5F, 0xA8, 0xE6, 0x11, 0x7A, 0x8D, 0xC3, 0x34, 0xAB, 0x5C, 0x12, 0xE5, 0x8E, 0x79, 0x37, 0xC0, 0xE1, 0x16, 0x58, 0xAF, 0xC4, 0x33, 0x7D, 0x8A, 0x3F, 0xC8, 0x86, 0x71, 0x1A, 0xED, 0xA3, 0x54, 0x75, 0x82, 0xCC, 0x3B, 0x50, 0xA7, 0xE9, 0x1E, 0xD4, 0x23, 0x6D, 0x9A, 0xF1, 0x06, 0x48, 0xBF, 0x9E, 0x69, 0x27, 0xD0, 0xBB, 0x4C, 0x02, 0xF5, 0x40, 0xB7, 0xF9, 0x0E, 0x65, 0x92, 0xDC, 0x2B, 0x0A, 0xFD, 0xB3, 0x44, 0x2F, 0xD8, 0x96, 0x61, 0x55, 0xA2, 0xEC, 0x1B, 0x70, 0x87, 0xC9, 0x3E, 0x1F, 0xE8, 0xA6, 0x51, 0x3A, 0xCD, 0x83, 0x74, 0xC1, 0x36, 0x78, 0x8F, 0xE4, 0x13, 0x5D, 0xAA, 0x8B, 0x7C, 0x32, 0xC5, 0xAE, 0x59, 0x17, 0xE0, 0x2A, 0xDD, 0x93, 0x64, 0x0F, 0xF8, 0xB6, 0x41, 0x60, 0x97, 0xD9, 0x2E, 0x45, 0xB2, 0xFC, 0x0B, 0xBE, 0x49, 0x07, 0xF0, 0x9B, 0x6C, 0x22, 0xD5, 0xF4, 0x03, 0x4D, 0xBA, 0xD1, 0x26, 0x68, 0x9F, }; return t[crc ^ data]; } |
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static void sprom_get_mac(char *mac, const u16 *in) { int i; for (i = 0; i < 3; i++) { |
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*mac++ = in[i] >> 8; |
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*mac++ = in[i]; |
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} } |
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static u8 ssb_sprom_crc(const u16 *sprom, u16 size) |
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{ int word; u8 crc = 0xFF; |
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for (word = 0; word < size - 1; word++) { |
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crc = ssb_crc8(crc, sprom[word] & 0x00FF); crc = ssb_crc8(crc, (sprom[word] & 0xFF00) >> 8); } |
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crc = ssb_crc8(crc, sprom[size - 1] & 0x00FF); |
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crc ^= 0xFF; return crc; } |
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static int sprom_check_crc(const u16 *sprom, size_t size) |
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{ u8 crc; u8 expected_crc; u16 tmp; |
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crc = ssb_sprom_crc(sprom, size); tmp = sprom[size - 1] & SSB_SPROM_REVISION_CRC; |
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expected_crc = tmp >> SSB_SPROM_REVISION_CRC_SHIFT; if (crc != expected_crc) return -EPROTO; return 0; } |
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static int sprom_do_read(struct ssb_bus *bus, u16 *sprom) |
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{ int i; |
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for (i = 0; i < bus->sprom_size; i++) |
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sprom[i] = ioread16(bus->mmio + bus->sprom_offset + (i * 2)); |
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return 0; |
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} static int sprom_do_write(struct ssb_bus *bus, const u16 *sprom) { struct pci_dev *pdev = bus->host_pci; int i, err; u32 spromctl; |
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u16 size = bus->sprom_size; |
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pr_notice("Writing SPROM. Do NOT turn off the power! Please stand by... "); |
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err = pci_read_config_dword(pdev, SSB_SPROMCTL, &spromctl); if (err) goto err_ctlreg; spromctl |= SSB_SPROMCTL_WE; err = pci_write_config_dword(pdev, SSB_SPROMCTL, spromctl); if (err) goto err_ctlreg; |
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pr_notice("[ 0%%"); |
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msleep(500); |
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for (i = 0; i < size; i++) { if (i == size / 4) |
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pr_cont("25%%"); |
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else if (i == size / 2) |
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pr_cont("50%%"); |
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else if (i == (size * 3) / 4) |
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pr_cont("75%%"); |
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else if (i % 2) |
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pr_cont("."); |
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writew(sprom[i], bus->mmio + bus->sprom_offset + (i * 2)); |
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msleep(20); } err = pci_read_config_dword(pdev, SSB_SPROMCTL, &spromctl); if (err) goto err_ctlreg; spromctl &= ~SSB_SPROMCTL_WE; err = pci_write_config_dword(pdev, SSB_SPROMCTL, spromctl); if (err) goto err_ctlreg; msleep(500); |
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pr_cont("100%% ] "); pr_notice("SPROM written "); |
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return 0; err_ctlreg: |
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pr_err("Could not access SPROM control register. "); |
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return err; } |
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static s8 sprom_extract_antgain(u8 sprom_revision, const u16 *in, u16 offset, u16 mask, u16 shift) |
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{ u16 v; u8 gain; |
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v = in[SPOFF(offset)]; |
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gain = (v & mask) >> shift; if (gain == 0xFF) gain = 2; /* If unset use 2dBm */ if (sprom_revision == 1) { /* Convert to Q5.2 */ gain <<= 2; } else { /* Q5.2 Fractional part is stored in 0xC0 */ gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2); } return (s8)gain; } |
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static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in) { SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0); SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0); SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0); SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0); SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0); SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0); SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0); SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0); SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0); SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO, SSB_SPROM2_MAXP_A_LO_SHIFT); } |
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static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in) |
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{ |
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u16 loc[3]; |
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if (out->revision == 3) /* rev 3 moved MAC */ |
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loc[0] = SSB_SPROM3_IL0MAC; |
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else { |
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loc[0] = SSB_SPROM1_IL0MAC; loc[1] = SSB_SPROM1_ET0MAC; loc[2] = SSB_SPROM1_ET1MAC; } |
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sprom_get_mac(out->il0mac, &in[SPOFF(loc[0])]); |
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if (out->revision < 3) { /* only rev 1-2 have et0, et1 */ |
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sprom_get_mac(out->et0mac, &in[SPOFF(loc[1])]); sprom_get_mac(out->et1mac, &in[SPOFF(loc[2])]); |
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} |
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SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0); SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A, SSB_SPROM1_ETHPHY_ET1A_SHIFT); |
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SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14); SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15); SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0); |
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SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0); |
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if (out->revision == 1) SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE, SSB_SPROM1_BINF_CCODE_SHIFT); |
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SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA, SSB_SPROM1_BINF_ANTA_SHIFT); SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG, SSB_SPROM1_BINF_ANTBG_SHIFT); |
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SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0); SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0); SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0); SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0); SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0); SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0); SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0); SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1, SSB_SPROM1_GPIOA_P1_SHIFT); SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0); SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3, SSB_SPROM1_GPIOB_P3_SHIFT); SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A, SSB_SPROM1_MAXPWR_A_SHIFT); SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0); SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A, SSB_SPROM1_ITSSI_A_SHIFT); SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0); SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0); |
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SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8); SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0); |
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/* Extract the antenna gain values. */ |
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out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in, SSB_SPROM1_AGAIN, SSB_SPROM1_AGAIN_BG, SSB_SPROM1_AGAIN_BG_SHIFT); out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in, SSB_SPROM1_AGAIN, SSB_SPROM1_AGAIN_A, SSB_SPROM1_AGAIN_A_SHIFT); |
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if (out->revision >= 2) sprom_extract_r23(out, in); |
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} |
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419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 |
/* Revs 4 5 and 8 have partially shared layout */ static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in) { SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01, SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT); SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01, SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT); SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23, SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT); SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23, SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT); SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01, SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT); SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01, SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT); SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23, SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT); SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23, SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT); SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01, SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT); SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01, SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT); SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23, SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT); SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23, SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT); SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01, SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT); SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01, SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT); SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23, SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT); SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23, SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT); } |
095f695cb
|
458 |
static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in) |
61e115a56
|
459 |
{ |
6ad59343e
|
460 461 462 463 |
static const u16 pwr_info_offset[] = { SSB_SPROM4_PWR_INFO_CORE0, SSB_SPROM4_PWR_INFO_CORE1, SSB_SPROM4_PWR_INFO_CORE2, SSB_SPROM4_PWR_INFO_CORE3 }; |
095f695cb
|
464 |
u16 il0mac_offset; |
6ad59343e
|
465 466 467 468 |
int i; BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) != ARRAY_SIZE(out->core_pwr_info)); |
c272ef440
|
469 |
|
095f695cb
|
470 471 472 473 |
if (out->revision == 4) il0mac_offset = SSB_SPROM4_IL0MAC; else il0mac_offset = SSB_SPROM5_IL0MAC; |
e5652756f
|
474 475 |
sprom_get_mac(out->il0mac, &in[SPOFF(il0mac_offset)]); |
c272ef440
|
476 477 478 |
SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0); SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A, SSB_SPROM4_ETHPHY_ET1A_SHIFT); |
673335c8f
|
479 |
SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0); |
3623b266c
|
480 |
SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0); |
095f695cb
|
481 |
if (out->revision == 4) { |
bf7d420b4
|
482 483 |
SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8); SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0); |
095f695cb
|
484 485 |
SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0); SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0); |
6d1d4ea4a
|
486 487 |
SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0); SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0); |
095f695cb
|
488 |
} else { |
bf7d420b4
|
489 490 |
SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8); SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0); |
095f695cb
|
491 492 |
SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0); SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0); |
6d1d4ea4a
|
493 494 |
SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0); SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0); |
095f695cb
|
495 |
} |
e861b98d5
|
496 497 498 499 |
SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A, SSB_SPROM4_ANTAVAIL_A_SHIFT); SPEX(ant_available_bg, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_BG, SSB_SPROM4_ANTAVAIL_BG_SHIFT); |
d3c319f9c
|
500 501 502 503 504 505 |
SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0); SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG, SSB_SPROM4_ITSSI_BG_SHIFT); SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0); SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A, SSB_SPROM4_ITSSI_A_SHIFT); |
095f695cb
|
506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 |
if (out->revision == 4) { SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0); SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1, SSB_SPROM4_GPIOA_P1_SHIFT); SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0); SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3, SSB_SPROM4_GPIOB_P3_SHIFT); } else { SPEX(gpio0, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P0, 0); SPEX(gpio1, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P1, SSB_SPROM5_GPIOA_P1_SHIFT); SPEX(gpio2, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P2, 0); SPEX(gpio3, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P3, SSB_SPROM5_GPIOB_P3_SHIFT); } |
e861b98d5
|
521 522 |
/* Extract the antenna gain values. */ |
6daf43216
|
523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 |
out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in, SSB_SPROM4_AGAIN01, SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT); out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in, SSB_SPROM4_AGAIN01, SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT); out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in, SSB_SPROM4_AGAIN23, SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT); out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in, SSB_SPROM4_AGAIN23, SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT); |
e861b98d5
|
539 |
|
6ad59343e
|
540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 |
/* Extract cores power info info */ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) { u16 o = pwr_info_offset[i]; SPEX(core_pwr_info[i].itssi_2g, o + SSB_SPROM4_2G_MAXP_ITSSI, SSB_SPROM4_2G_ITSSI, SSB_SPROM4_2G_ITSSI_SHIFT); SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SPROM4_2G_MAXP_ITSSI, SSB_SPROM4_2G_MAXP, 0); SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SPROM4_2G_PA_0, ~0, 0); SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SPROM4_2G_PA_1, ~0, 0); SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SPROM4_2G_PA_2, ~0, 0); SPEX(core_pwr_info[i].pa_2g[3], o + SSB_SPROM4_2G_PA_3, ~0, 0); SPEX(core_pwr_info[i].itssi_5g, o + SSB_SPROM4_5G_MAXP_ITSSI, SSB_SPROM4_5G_ITSSI, SSB_SPROM4_5G_ITSSI_SHIFT); SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SPROM4_5G_MAXP_ITSSI, SSB_SPROM4_5G_MAXP, 0); SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM4_5GHL_MAXP, SSB_SPROM4_5GH_MAXP, 0); SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM4_5GHL_MAXP, SSB_SPROM4_5GL_MAXP, SSB_SPROM4_5GL_MAXP_SHIFT); SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SPROM4_5GL_PA_0, ~0, 0); SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SPROM4_5GL_PA_1, ~0, 0); SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SPROM4_5GL_PA_2, ~0, 0); SPEX(core_pwr_info[i].pa_5gl[3], o + SSB_SPROM4_5GL_PA_3, ~0, 0); SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SPROM4_5G_PA_0, ~0, 0); SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SPROM4_5G_PA_1, ~0, 0); SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SPROM4_5G_PA_2, ~0, 0); SPEX(core_pwr_info[i].pa_5g[3], o + SSB_SPROM4_5G_PA_3, ~0, 0); SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SPROM4_5GH_PA_0, ~0, 0); SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SPROM4_5GH_PA_1, ~0, 0); SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SPROM4_5GH_PA_2, ~0, 0); SPEX(core_pwr_info[i].pa_5gh[3], o + SSB_SPROM4_5GH_PA_3, ~0, 0); } |
172c69a47
|
576 |
sprom_extract_r458(out, in); |
c272ef440
|
577 |
/* TODO - get remaining rev 4 stuff needed */ |
61e115a56
|
578 |
} |
6b1c7c676
|
579 580 581 |
static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in) { int i; |
e5652756f
|
582 |
u16 o; |
d3bb26868
|
583 |
static const u16 pwr_info_offset[] = { |
b0f702920
|
584 585 586 587 588 |
SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1, SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3 }; BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) != ARRAY_SIZE(out->core_pwr_info)); |
6b1c7c676
|
589 590 |
/* extract the MAC address */ |
e5652756f
|
591 |
sprom_get_mac(out->il0mac, &in[SPOFF(SSB_SPROM8_IL0MAC)]); |
673335c8f
|
592 |
SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0); |
3623b266c
|
593 |
SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0); |
bf7d420b4
|
594 595 |
SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8); SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0); |
6b1c7c676
|
596 597 |
SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0); SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0); |
f679056b2
|
598 599 |
SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0); SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, 0xFFFF, 0); |
6b1c7c676
|
600 601 602 603 604 605 606 607 608 609 |
SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A, SSB_SPROM8_ANTAVAIL_A_SHIFT); SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG, SSB_SPROM8_ANTAVAIL_BG_SHIFT); SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0); SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG, SSB_SPROM8_ITSSI_BG_SHIFT); SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0); SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A, SSB_SPROM8_ITSSI_A_SHIFT); |
f679056b2
|
610 611 612 |
SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0); SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK, SSB_SPROM8_MAXP_AL_SHIFT); |
6b1c7c676
|
613 614 615 616 617 618 |
SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0); SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1, SSB_SPROM8_GPIOA_P1_SHIFT); SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0); SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3, SSB_SPROM8_GPIOB_P3_SHIFT); |
f679056b2
|
619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 |
SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0); SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G, SSB_SPROM8_TRI5G_SHIFT); SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0); SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH, SSB_SPROM8_TRI5GH_SHIFT); SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 0); SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G, SSB_SPROM8_RXPO5G_SHIFT); SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0); SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G, SSB_SPROM8_RSSISMC2G_SHIFT); SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G, SSB_SPROM8_RSSISAV2G_SHIFT); SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G, SSB_SPROM8_BXA2G_SHIFT); SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0); SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G, SSB_SPROM8_RSSISMC5G_SHIFT); SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G, SSB_SPROM8_RSSISAV5G_SHIFT); SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G, SSB_SPROM8_BXA5G_SHIFT); SPEX(pa0b0, SSB_SPROM8_PA0B0, 0xFFFF, 0); SPEX(pa0b1, SSB_SPROM8_PA0B1, 0xFFFF, 0); SPEX(pa0b2, SSB_SPROM8_PA0B2, 0xFFFF, 0); SPEX(pa1b0, SSB_SPROM8_PA1B0, 0xFFFF, 0); SPEX(pa1b1, SSB_SPROM8_PA1B1, 0xFFFF, 0); SPEX(pa1b2, SSB_SPROM8_PA1B2, 0xFFFF, 0); SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, 0xFFFF, 0); SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, 0xFFFF, 0); SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, 0xFFFF, 0); SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, 0xFFFF, 0); SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, 0xFFFF, 0); SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, 0xFFFF, 0); SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, 0xFFFF, 0); SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, 0xFFFFFFFF, 0); SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, 0xFFFFFFFF, 0); SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, 0xFFFFFFFF, 0); SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0); |
6b1c7c676
|
659 660 |
/* Extract the antenna gain values. */ |
6daf43216
|
661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 |
out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in, SSB_SPROM8_AGAIN01, SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT); out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in, SSB_SPROM8_AGAIN01, SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT); out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in, SSB_SPROM8_AGAIN23, SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT); out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in, SSB_SPROM8_AGAIN23, SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT); |
6b1c7c676
|
677 |
|
b0f702920
|
678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 |
/* Extract cores power info info */ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) { o = pwr_info_offset[i]; SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI, SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT); SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI, SSB_SPROM8_2G_MAXP, 0); SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0); SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0); SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0); SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI, SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT); SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI, SSB_SPROM8_5G_MAXP, 0); SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP, SSB_SPROM8_5GH_MAXP, 0); SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP, SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT); SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0); SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0); SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0); SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0); SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0); SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0); SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0); SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0); SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0); } |
8a5ac6ecd
|
709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 |
/* Extract FEM info */ SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT); SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT); SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT); SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT); SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT); SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT); SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT); SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT); SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT); SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT); |
e2da4bd3e
|
731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 |
SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON, SSB_SPROM8_LEDDC_ON_SHIFT); SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF, SSB_SPROM8_LEDDC_OFF_SHIFT); SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN, SSB_SPROM8_TXRXC_TXCHAIN_SHIFT); SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN, SSB_SPROM8_TXRXC_RXCHAIN_SHIFT); SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH, SSB_SPROM8_TXRXC_SWITCH_SHIFT); SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0); SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0); SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0); SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0); SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0); SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP, SSB_SPROM8_RAWTS_RAWTEMP_SHIFT); SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER, SSB_SPROM8_RAWTS_MEASPOWER_SHIFT); SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMP_SLOPE, SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT); SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT); SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMP_OPTION, SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT); SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR, SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT); SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP, SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT); SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT); SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0); SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0); SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0); SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0); SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH, SSB_SPROM8_THERMAL_TRESH_SHIFT); SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET, SSB_SPROM8_THERMAL_OFFSET_SHIFT); SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PHYCAL, SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT); SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD, SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT); SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_HYSTERESIS, SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT); |
172c69a47
|
788 |
sprom_extract_r458(out, in); |
6b1c7c676
|
789 790 |
/* TODO - get remaining rev 8 stuff needed */ } |
c272ef440
|
791 792 |
static int sprom_extract(struct ssb_bus *bus, struct ssb_sprom *out, const u16 *in, u16 size) |
61e115a56
|
793 794 |
{ memset(out, 0, sizeof(*out)); |
c272ef440
|
795 |
out->revision = in[size - 1] & 0x00FF; |
b8b6069cf
|
796 797 |
pr_debug("SPROM revision %d detected ", out->revision); |
31ce12fb3
|
798 799 |
memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */ memset(out->et1mac, 0xFF, 6); |
54435f9ec
|
800 |
|
61e115a56
|
801 802 803 804 |
if ((bus->chip_id & 0xFF00) == 0x4400) { /* Workaround: The BCM44XX chip has a stupid revision * number stored in the SPROM. * Always extract r1. */ |
c272ef440
|
805 |
out->revision = 1; |
b8b6069cf
|
806 807 |
pr_debug("SPROM treated as revision %d ", out->revision); |
54435f9ec
|
808 809 810 811 812 813 814 815 816 817 |
} switch (out->revision) { case 1: case 2: case 3: sprom_extract_r123(out, in); break; case 4: case 5: |
095f695cb
|
818 |
sprom_extract_r45(out, in); |
54435f9ec
|
819 820 821 822 823 |
break; case 8: sprom_extract_r8(out, in); break; default: |
b8b6069cf
|
824 825 826 |
pr_warn("Unsupported SPROM revision %d detected. Will extract v1 ", out->revision); |
54435f9ec
|
827 828 |
out->revision = 1; sprom_extract_r123(out, in); |
61e115a56
|
829 |
} |
4503183aa
|
830 831 832 833 |
if (out->boardflags_lo == 0xFFFF) out->boardflags_lo = 0; /* per specs */ if (out->boardflags_hi == 0xFFFF) out->boardflags_hi = 0; /* per specs */ |
61e115a56
|
834 |
return 0; |
61e115a56
|
835 836 837 838 839 |
} static int ssb_pci_sprom_get(struct ssb_bus *bus, struct ssb_sprom *sprom) { |
ca4a08319
|
840 |
int err; |
61e115a56
|
841 |
u16 *buf; |
d53cdbb94
|
842 |
if (!ssb_is_sprom_available(bus)) { |
b8b6069cf
|
843 844 |
pr_err("No SPROM available! "); |
d53cdbb94
|
845 846 |
return -ENODEV; } |
25985edce
|
847 |
if (bus->chipco.dev) { /* can be unavailable! */ |
9d1ac34ec
|
848 849 850 851 852 853 854 855 856 857 858 859 |
/* * get SPROM offset: SSB_SPROM_BASE1 except for * chipcommon rev >= 31 or chip ID is 0x4312 and * chipcommon status & 3 == 2 */ if (bus->chipco.dev->id.revision >= 31) bus->sprom_offset = SSB_SPROM_BASE31; else if (bus->chip_id == 0x4312 && (bus->chipco.status & 0x03) == 2) bus->sprom_offset = SSB_SPROM_BASE31; else bus->sprom_offset = SSB_SPROM_BASE1; |
da1fdb02d
|
860 861 862 |
} else { bus->sprom_offset = SSB_SPROM_BASE1; } |
b8b6069cf
|
863 864 |
pr_debug("SPROM offset is 0x%x ", bus->sprom_offset); |
ea2db495f
|
865 |
|
c272ef440
|
866 |
buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL); |
61e115a56
|
867 |
if (!buf) |
ca4a08319
|
868 |
return -ENOMEM; |
c272ef440
|
869 |
bus->sprom_size = SSB_SPROMSIZE_WORDS_R123; |
61e115a56
|
870 |
sprom_do_read(bus, buf); |
c272ef440
|
871 |
err = sprom_check_crc(buf, bus->sprom_size); |
61e115a56
|
872 |
if (err) { |
2afc49015
|
873 874 875 876 877 |
/* try for a 440 byte SPROM - revision 4 and higher */ kfree(buf); buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16), GFP_KERNEL); if (!buf) |
ca4a08319
|
878 |
return -ENOMEM; |
2afc49015
|
879 880 881 |
bus->sprom_size = SSB_SPROMSIZE_WORDS_R4; sprom_do_read(bus, buf); err = sprom_check_crc(buf, bus->sprom_size); |
e79c1ba84
|
882 883 884 |
if (err) { /* All CRC attempts failed. * Maybe there is no SPROM on the device? |
b3ae52b6b
|
885 886 887 888 |
* Now we ask the arch code if there is some sprom * available for this device in some other storage */ err = ssb_fill_sprom_with_fallback(bus, sprom); if (err) { |
b8b6069cf
|
889 890 891 |
pr_warn("WARNING: Using fallback SPROM failed (err %d) ", err); |
8052d7245
|
892 |
goto out_free; |
b3ae52b6b
|
893 |
} else { |
b8b6069cf
|
894 895 896 |
pr_debug("Using SPROM revision %d provided by platform ", sprom->revision); |
e79c1ba84
|
897 898 899 |
err = 0; goto out_free; } |
b8b6069cf
|
900 901 |
pr_warn("WARNING: Invalid SPROM CRC (corrupt SPROM) "); |
e79c1ba84
|
902 |
} |
61e115a56
|
903 |
} |
c272ef440
|
904 |
err = sprom_extract(bus, sprom, buf, bus->sprom_size); |
61e115a56
|
905 |
|
e79c1ba84
|
906 |
out_free: |
61e115a56
|
907 |
kfree(buf); |
61e115a56
|
908 909 910 911 912 913 |
return err; } static void ssb_pci_get_boardinfo(struct ssb_bus *bus, struct ssb_boardinfo *bi) { |
115f9450b
|
914 915 |
bi->vendor = bus->host_pci->subsystem_vendor; bi->type = bus->host_pci->subsystem_device; |
61e115a56
|
916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 |
} int ssb_pci_get_invariants(struct ssb_bus *bus, struct ssb_init_invariants *iv) { int err; err = ssb_pci_sprom_get(bus, &iv->sprom); if (err) goto out; ssb_pci_get_boardinfo(bus, &iv->boardinfo); out: return err; } |
61e115a56
|
931 932 933 934 |
static int ssb_pci_assert_buspower(struct ssb_bus *bus) { if (likely(bus->powered_up)) return 0; |
b8b6069cf
|
935 936 |
pr_err("FATAL ERROR: Bus powered down while accessing PCI MMIO space "); |
61e115a56
|
937 938 939 940 941 942 943 |
if (bus->power_warn_count <= 10) { bus->power_warn_count++; dump_stack(); } return -ENODEV; } |
61e115a56
|
944 |
|
ffc7689dd
|
945 946 947 948 949 950 951 952 953 954 955 956 |
static u8 ssb_pci_read8(struct ssb_device *dev, u16 offset) { struct ssb_bus *bus = dev->bus; if (unlikely(ssb_pci_assert_buspower(bus))) return 0xFF; if (unlikely(bus->mapped_device != dev)) { if (unlikely(ssb_pci_switch_core(bus, dev))) return 0xFF; } return ioread8(bus->mmio + offset); } |
61e115a56
|
957 958 959 960 961 962 963 964 965 966 |
static u16 ssb_pci_read16(struct ssb_device *dev, u16 offset) { struct ssb_bus *bus = dev->bus; if (unlikely(ssb_pci_assert_buspower(bus))) return 0xFFFF; if (unlikely(bus->mapped_device != dev)) { if (unlikely(ssb_pci_switch_core(bus, dev))) return 0xFFFF; } |
4b402c65a
|
967 |
return ioread16(bus->mmio + offset); |
61e115a56
|
968 969 970 971 972 973 974 975 976 977 978 979 |
} static u32 ssb_pci_read32(struct ssb_device *dev, u16 offset) { struct ssb_bus *bus = dev->bus; if (unlikely(ssb_pci_assert_buspower(bus))) return 0xFFFFFFFF; if (unlikely(bus->mapped_device != dev)) { if (unlikely(ssb_pci_switch_core(bus, dev))) return 0xFFFFFFFF; } |
4b402c65a
|
980 |
return ioread32(bus->mmio + offset); |
61e115a56
|
981 |
} |
d625a29ba
|
982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 |
#ifdef CONFIG_SSB_BLOCKIO static void ssb_pci_block_read(struct ssb_device *dev, void *buffer, size_t count, u16 offset, u8 reg_width) { struct ssb_bus *bus = dev->bus; void __iomem *addr = bus->mmio + offset; if (unlikely(ssb_pci_assert_buspower(bus))) goto error; if (unlikely(bus->mapped_device != dev)) { if (unlikely(ssb_pci_switch_core(bus, dev))) goto error; } switch (reg_width) { case sizeof(u8): ioread8_rep(addr, buffer, count); break; case sizeof(u16): |
209b43759
|
1000 |
WARN_ON(count & 1); |
d625a29ba
|
1001 1002 1003 |
ioread16_rep(addr, buffer, count >> 1); break; case sizeof(u32): |
209b43759
|
1004 |
WARN_ON(count & 3); |
d625a29ba
|
1005 1006 1007 |
ioread32_rep(addr, buffer, count >> 2); break; default: |
209b43759
|
1008 |
WARN_ON(1); |
d625a29ba
|
1009 1010 1011 1012 1013 1014 1015 |
} return; error: memset(buffer, 0xFF, count); } #endif /* CONFIG_SSB_BLOCKIO */ |
ffc7689dd
|
1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 |
static void ssb_pci_write8(struct ssb_device *dev, u16 offset, u8 value) { struct ssb_bus *bus = dev->bus; if (unlikely(ssb_pci_assert_buspower(bus))) return; if (unlikely(bus->mapped_device != dev)) { if (unlikely(ssb_pci_switch_core(bus, dev))) return; } iowrite8(value, bus->mmio + offset); } |
61e115a56
|
1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 |
static void ssb_pci_write16(struct ssb_device *dev, u16 offset, u16 value) { struct ssb_bus *bus = dev->bus; if (unlikely(ssb_pci_assert_buspower(bus))) return; if (unlikely(bus->mapped_device != dev)) { if (unlikely(ssb_pci_switch_core(bus, dev))) return; } |
4b402c65a
|
1038 |
iowrite16(value, bus->mmio + offset); |
61e115a56
|
1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 |
} static void ssb_pci_write32(struct ssb_device *dev, u16 offset, u32 value) { struct ssb_bus *bus = dev->bus; if (unlikely(ssb_pci_assert_buspower(bus))) return; if (unlikely(bus->mapped_device != dev)) { if (unlikely(ssb_pci_switch_core(bus, dev))) return; } |
4b402c65a
|
1051 |
iowrite32(value, bus->mmio + offset); |
61e115a56
|
1052 |
} |
d625a29ba
|
1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 |
#ifdef CONFIG_SSB_BLOCKIO static void ssb_pci_block_write(struct ssb_device *dev, const void *buffer, size_t count, u16 offset, u8 reg_width) { struct ssb_bus *bus = dev->bus; void __iomem *addr = bus->mmio + offset; if (unlikely(ssb_pci_assert_buspower(bus))) return; if (unlikely(bus->mapped_device != dev)) { if (unlikely(ssb_pci_switch_core(bus, dev))) return; } switch (reg_width) { case sizeof(u8): iowrite8_rep(addr, buffer, count); break; case sizeof(u16): |
209b43759
|
1071 |
WARN_ON(count & 1); |
d625a29ba
|
1072 1073 1074 |
iowrite16_rep(addr, buffer, count >> 1); break; case sizeof(u32): |
209b43759
|
1075 |
WARN_ON(count & 3); |
d625a29ba
|
1076 1077 1078 |
iowrite32_rep(addr, buffer, count >> 2); break; default: |
209b43759
|
1079 |
WARN_ON(1); |
d625a29ba
|
1080 1081 1082 |
} } #endif /* CONFIG_SSB_BLOCKIO */ |
61e115a56
|
1083 1084 |
/* Not "static", as it's used in main.c */ const struct ssb_bus_ops ssb_pci_ops = { |
ffc7689dd
|
1085 |
.read8 = ssb_pci_read8, |
61e115a56
|
1086 1087 |
.read16 = ssb_pci_read16, .read32 = ssb_pci_read32, |
ffc7689dd
|
1088 |
.write8 = ssb_pci_write8, |
61e115a56
|
1089 1090 |
.write16 = ssb_pci_write16, .write32 = ssb_pci_write32, |
d625a29ba
|
1091 1092 1093 1094 |
#ifdef CONFIG_SSB_BLOCKIO .block_read = ssb_pci_block_read, .block_write = ssb_pci_block_write, #endif |
61e115a56
|
1095 |
}; |
61e115a56
|
1096 1097 1098 1099 1100 1101 |
static ssize_t ssb_pci_attr_sprom_show(struct device *pcidev, struct device_attribute *attr, char *buf) { struct pci_dev *pdev = container_of(pcidev, struct pci_dev, dev); struct ssb_bus *bus; |
61e115a56
|
1102 1103 1104 |
bus = ssb_pci_dev_to_bus(pdev); if (!bus) |
e7ec2e323
|
1105 |
return -ENODEV; |
61e115a56
|
1106 |
|
e7ec2e323
|
1107 |
return ssb_attr_sprom_show(bus, buf, sprom_do_read); |
61e115a56
|
1108 1109 1110 1111 1112 1113 1114 1115 |
} static ssize_t ssb_pci_attr_sprom_store(struct device *pcidev, struct device_attribute *attr, const char *buf, size_t count) { struct pci_dev *pdev = container_of(pcidev, struct pci_dev, dev); struct ssb_bus *bus; |
61e115a56
|
1116 1117 1118 |
bus = ssb_pci_dev_to_bus(pdev); if (!bus) |
e7ec2e323
|
1119 |
return -ENODEV; |
61e115a56
|
1120 |
|
e7ec2e323
|
1121 1122 |
return ssb_attr_sprom_store(bus, buf, count, sprom_check_crc, sprom_do_write); |
61e115a56
|
1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 |
} static DEVICE_ATTR(ssb_sprom, 0600, ssb_pci_attr_sprom_show, ssb_pci_attr_sprom_store); void ssb_pci_exit(struct ssb_bus *bus) { struct pci_dev *pdev; if (bus->bustype != SSB_BUSTYPE_PCI) return; pdev = bus->host_pci; device_remove_file(&pdev->dev, &dev_attr_ssb_sprom); } int ssb_pci_init(struct ssb_bus *bus) { struct pci_dev *pdev; int err; if (bus->bustype != SSB_BUSTYPE_PCI) return 0; pdev = bus->host_pci; |
e7ec2e323
|
1149 |
mutex_init(&bus->sprom_mutex); |
61e115a56
|
1150 1151 1152 1153 1154 1155 1156 |
err = device_create_file(&pdev->dev, &dev_attr_ssb_sprom); if (err) goto out; out: return err; } |