ARM: consolidate SMP cross call implementation

Rather than having each platform class provide a mach/smp.h header for smp_cross_call(), arrange for them to register the function with the core ARM SMP code instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: consolidate SMP cross call implementation
Rather than having each platform class provide a mach/smp.h header for smp_cross_call(), arrange for them to register the function with the core ARM SMP code instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King
1 parent 43b3e18982
Showing 19 changed files with 37 additions and 162 deletions Side-by-side Diff
arch/arm/include/asm/smp.h
arch/arm/kernel/smp.c
arch/arm/mach-exynos4/include/mach/smp.h
arch/arm/mach-exynos4/platsmp.c
arch/arm/mach-msm/include/mach/smp.h
arch/arm/mach-msm/platsmp.c
arch/arm/mach-omap2/omap-smp.c
arch/arm/mach-realview/include/mach/smp.h
arch/arm/mach-realview/platsmp.c
arch/arm/mach-shmobile/include/mach/smp.h
arch/arm/mach-shmobile/platsmp.c
arch/arm/mach-tegra/include/mach/smp.h
arch/arm/mach-tegra/platsmp.c
arch/arm/mach-ux500/include/mach/smp.h
arch/arm/mach-ux500/platsmp.c
arch/arm/mach-vexpress/ct-ca9x4.c
arch/arm/mach-vexpress/include/mach/smp.h
arch/arm/plat-omap/include/plat/smp.h
arch/arm/plat-versatile/platsmp.c
@@ -14,8 +14,6 @@
 #include <linux/cpumask.h>
 #include <linux/thread_info.h>
  
-#include <mach/smp.h>
-
 #ifndef CONFIG_SMP
 # error "<asm/smp.h> included in non-SMP build"
 #endif
  
@@ -47,9 +45,9 @@
  
  
 /*
- * Raise an IPI cross call on CPUs in callmap.
+ * Provide a function to raise an IPI cross call on CPUs in callmap.
  */
-extern void smp_cross_call(const struct cpumask *mask, int ipi);
+extern void set_smp_cross_call(void (*)(const struct cpumask *, unsigned int));
  
 /*
  * Boot a secondary CPU, and assign it the specified idle task.
@@ -376,6 +376,13 @@
 	}
 }
  
+static void (*smp_cross_call)(const struct cpumask *, unsigned int);
+
+void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
+{
+	smp_cross_call = fn;
+}
+
 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 {
 	smp_cross_call(mask, IPI_CALL_FUNC);
-/* linux/arch/arm/mach-exynos4/include/mach/smp.h
- *
- * Cloned from arch/arm/mach-realview/include/mach/smp.h
-*/
-
-#ifndef ASM_ARCH_SMP_H
-#define ASM_ARCH_SMP_H __FILE__
-
-#include <asm/hardware/gic.h>
-
-/*
- * We use IRQ1 as the IPI
- */
-static inline void smp_cross_call(const struct cpumask *mask, int ipi)
-{
-	gic_raise_softirq(mask, ipi);
-}
-
-#endif
@@ -22,6 +22,7 @@
 #include <linux/io.h>
  
 #include <asm/cacheflush.h>
+#include <asm/hardware/gic.h>
 #include <asm/smp_scu.h>
 #include <asm/unified.h>
  
@@ -104,7 +105,7 @@
 	 * the boot monitor to read the system wide flags register,
 	 * and branch to the address found there.
 	 */
-	smp_cross_call(cpumask_of(cpu), 1);
+	gic_raise_softirq(cpumask_of(cpu), 1);
  
 	timeout = jiffies + (1 * HZ);
 	while (time_before(jiffies, timeout)) {
@@ -147,6 +148,8 @@
  
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
+
+	set_smp_cross_call(gic_raise_softirq);
 }
  
 void __init platform_smp_prepare_cpus(unsigned int max_cpus)
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_MSM_SMP_H
-#define __ASM_ARCH_MSM_SMP_H
-
-#include <asm/hardware/gic.h>
-
-static inline void smp_cross_call(const struct cpumask *mask, int ipi)
-{
-	gic_raise_softirq(mask, ipi);
-}
-
-#endif
@@ -119,7 +119,7 @@
 	 * the boot monitor to read the system wide flags register,
 	 * and branch to the address found there.
 	 */
-	smp_cross_call(cpumask_of(cpu), 1);
+	gic_raise_softirq(cpumask_of(cpu), 1);
  
 	timeout = jiffies + (1 * HZ);
 	while (time_before(jiffies, timeout)) {
@@ -151,6 +151,8 @@
  
 	for (i = 0; i < NR_CPUS; i++)
 		set_cpu_possible(i, true);
+
+        set_smp_cross_call(gic_raise_softirq);
 }
  
 void __init platform_smp_prepare_cpus(unsigned int max_cpus)
@@ -21,6 +21,7 @@
 #include <linux/io.h>
  
 #include <asm/cacheflush.h>
+#include <asm/hardware/gic.h>
 #include <asm/smp_scu.h>
 #include <mach/hardware.h>
 #include <mach/omap4-common.h>
@@ -63,7 +64,7 @@
 	omap_modify_auxcoreboot0(0x200, 0xfffffdff);
 	flush_cache_all();
 	smp_wmb();
-	smp_cross_call(cpumask_of(cpu), 1);
+	gic_raise_softirq(cpumask_of(cpu), 1);
  
 	/*
 	 * Now the secondary core is starting up let it run its
@@ -118,6 +119,8 @@
  
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
+
+	set_smp_cross_call(gic_raise_softirq);
 }
  
 void __init platform_smp_prepare_cpus(unsigned int max_cpus)
-#ifndef ASMARM_ARCH_SMP_H
-#define ASMARM_ARCH_SMP_H
-
-#include <asm/hardware/gic.h>
-
-/*
- * We use IRQ1 as the IPI
- */
-static inline void smp_cross_call(const struct cpumask *mask, int ipi)
-{
-	gic_raise_softirq(mask, ipi);
-}
-
-#endif
@@ -14,6 +14,7 @@
 #include <linux/io.h>
  
 #include <mach/hardware.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 #include <asm/smp_scu.h>
 #include <asm/unified.h>
@@ -61,6 +62,8 @@
  
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
+
+	set_smp_cross_call(gic_raise_softirq);
 }
  
 void __init platform_smp_prepare_cpus(unsigned int max_cpus)
-#ifndef __MACH_SMP_H
-#define __MACH_SMP_H
-
-#include <asm/hardware/gic.h>
-
-/*
- * We use IRQ1 as the IPI
- */
-static inline void smp_cross_call(const struct cpumask *mask, int ipi)
-{
-#if defined(CONFIG_ARM_GIC)
-	gic_raise_softirq(mask, ipi);
-#endif
-}
-
-#endif
@@ -16,6 +16,7 @@
 #include <linux/device.h>
 #include <linux/smp.h>
 #include <linux/io.h>
+#include <asm/hardware/gic.h>
 #include <asm/localtimer.h>
 #include <asm/mach-types.h>
 #include <mach/common.h>
@@ -57,6 +58,8 @@
  
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
+
+	set_smp_cross_call(gic_raise_softirq);
 }
  
 void __init platform_smp_prepare_cpus(unsigned int max_cpus)
-#ifndef ASMARM_ARCH_SMP_H
-#define ASMARM_ARCH_SMP_H
-
-#include <asm/hardware/gic.h>
-
-/*
- * We use IRQ1 as the IPI
- */
-static inline void smp_cross_call(const struct cpumask *mask, int ipi)
-{
-	gic_raise_softirq(mask, ipi);
-}
-
-#endif
@@ -20,6 +20,7 @@
 #include <linux/io.h>
  
 #include <asm/cacheflush.h>
+#include <asm/hardware/gic.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/smp_scu.h>
@@ -122,6 +123,8 @@
  
 	for (i = 0; i < ncores; i++)
 		cpu_set(i, cpu_possible_map);
+
+	set_smp_cross_call(gic_raise_softirq);
 }
  
 void __init platform_smp_prepare_cpus(unsigned int max_cpus)
-/*
- * This file is based ARM realview platform.
- * Copyright (C) ARM Limited.
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#ifndef ASMARM_ARCH_SMP_H
-#define ASMARM_ARCH_SMP_H
-
-#include <asm/hardware/gic.h>
-
-/* This is required to wakeup the secondary core */
-extern void u8500_secondary_startup(void);
-
-/*
- * We use IRQ1 as the IPI
- */
-static inline void smp_cross_call(const struct cpumask *mask, int ipi)
-{
-	gic_raise_softirq(mask, ipi);
-}
-#endif
@@ -18,6 +18,7 @@
 #include <linux/io.h>
  
 #include <asm/cacheflush.h>
+#include <asm/hardware/gic.h>
 #include <asm/smp_scu.h>
 #include <mach/hardware.h>
 #include <mach/setup.h>
@@ -94,7 +95,7 @@
 	 */
 	write_pen_release(cpu);
  
-	smp_cross_call(cpumask_of(cpu), 1);
+	gic_raise_softirq(cpumask_of(cpu), 1);
  
 	timeout = jiffies + (1 * HZ);
 	while (time_before(jiffies, timeout)) {
@@ -162,6 +163,8 @@
  
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);
+
+	set_smp_cross_call(gic_raise_softirq);
 }
  
 void __init platform_smp_prepare_cpus(unsigned int max_cpus)
@@ -210,6 +210,8 @@
  
 	for (i = 0; i < ncores; ++i)
 		set_cpu_possible(i, true);
+
+	set_smp_cross_call(gic_raise_softirq);
 }
  
 static void ct_ca9x4_smp_enable(unsigned int max_cpus)
-#ifndef __MACH_SMP_H
-#define __MACH_SMP_H
-
-#include <asm/hardware/gic.h>
-
-/*
- * We use IRQ1 as the IPI
- */
-static inline void smp_cross_call(const struct cpumask *mask, int ipi)
-{
-	gic_raise_softirq(mask, ipi);
-}
-#endif
-/*
- * OMAP4 machine specific smp.h
- *
- * Copyright (C) 2009 Texas Instruments, Inc.
- *
- * Author:
- *	Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * Interface functions needed for the SMP. This file is based on arm
- * realview smp platform.
- * Copyright (c) 2003 ARM Limited.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef OMAP_ARCH_SMP_H
-#define OMAP_ARCH_SMP_H
-
-#include <asm/hardware/gic.h>
-
-/*
- * We use Soft IRQ1 as the IPI
- */
-static inline void smp_cross_call(const struct cpumask *mask, int ipi)
-{
-	gic_raise_softirq(mask, ipi);
-}
-
-#endif
@@ -16,6 +16,7 @@
 #include <linux/smp.h>
  
 #include <asm/cacheflush.h>
+#include <asm/hardware/gic.h>
  
 /*
  * control for which core is the next to come out of the secondary
@@ -83,7 +84,7 @@
 	 * the boot monitor to read the system wide flags register,
 	 * and branch to the address found there.
 	 */
-	smp_cross_call(cpumask_of(cpu), 1);
+	gic_raise_softirq(cpumask_of(cpu), 1);
  
 	timeout = jiffies + (1 * HZ);
 	while (time_before(jiffies, timeout)) {
...	...	@@ -14,8 +14,6 @@
14	14	#include <linux/cpumask.h>
15	15	#include <linux/thread_info.h>
16	16
17		-#include <mach/smp.h>
18		-
19	17	#ifndef CONFIG_SMP
20	18	# error "<asm/smp.h> included in non-SMP build"
21	19	#endif
22	20
...	...	@@ -47,9 +45,9 @@
47	45
48	46
49	47	/*
50		- * Raise an IPI cross call on CPUs in callmap.
	48	+ * Provide a function to raise an IPI cross call on CPUs in callmap.
51	49	*/
52		-extern void smp_cross_call(const struct cpumask *mask, int ipi);
	50	+extern void set_smp_cross_call(void ()(const struct cpumask , unsigned int));
53	51
54	52	/*
55	53	* Boot a secondary CPU, and assign it the specified idle task.
...	...	@@ -376,6 +376,13 @@
376	376	}
377	377	}
378	378
	379	+static void (smp_cross_call)(const struct cpumask , unsigned int);
	380	+
	381	+void __init set_smp_cross_call(void (fn)(const struct cpumask , unsigned int))
	382	+{
	383	+ smp_cross_call = fn;
	384	+}
	385	+
379	386	void arch_send_call_function_ipi_mask(const struct cpumask *mask)
380	387	{
381	388	smp_cross_call(mask, IPI_CALL_FUNC);
1		-/* linux/arch/arm/mach-exynos4/include/mach/smp.h
2		- *
3		- * Cloned from arch/arm/mach-realview/include/mach/smp.h
4		-*/
5		-
6		-#ifndef ASM_ARCH_SMP_H
7		-#define ASM_ARCH_SMP_H __FILE__
8		-
9		-#include <asm/hardware/gic.h>
10		-
11		-/*
12		- * We use IRQ1 as the IPI
13		- */
14		-static inline void smp_cross_call(const struct cpumask *mask, int ipi)
15		-{
16		- gic_raise_softirq(mask, ipi);
17		-}
18		-
19		-#endif
...	...	@@ -22,6 +22,7 @@
22	22	#include <linux/io.h>
23	23
24	24	#include <asm/cacheflush.h>
	25	+#include <asm/hardware/gic.h>
25	26	#include <asm/smp_scu.h>
26	27	#include <asm/unified.h>
27	28
...	...	@@ -104,7 +105,7 @@
104	105	* the boot monitor to read the system wide flags register,
105	106	* and branch to the address found there.
106	107	*/
107		- smp_cross_call(cpumask_of(cpu), 1);
	108	+ gic_raise_softirq(cpumask_of(cpu), 1);
108	109
109	110	timeout = jiffies + (1 * HZ);
110	111	while (time_before(jiffies, timeout)) {
...	...	@@ -147,6 +148,8 @@
147	148
148	149	for (i = 0; i < ncores; i++)
149	150	set_cpu_possible(i, true);
	151	+
	152	+ set_smp_cross_call(gic_raise_softirq);
150	153	}
151	154
152	155	void __init platform_smp_prepare_cpus(unsigned int max_cpus)
1		-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
2		- *
3		- * This program is free software; you can redistribute it and/or modify
4		- * it under the terms of the GNU General Public License version 2 and
5		- * only version 2 as published by the Free Software Foundation.
6		- *
7		- * This program is distributed in the hope that it will be useful,
8		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
9		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10		- * GNU General Public License for more details.
11		- */
12		-
13		-#ifndef __ASM_ARCH_MSM_SMP_H
14		-#define __ASM_ARCH_MSM_SMP_H
15		-
16		-#include <asm/hardware/gic.h>
17		-
18		-static inline void smp_cross_call(const struct cpumask *mask, int ipi)
19		-{
20		- gic_raise_softirq(mask, ipi);
21		-}
22		-
23		-#endif
...	...	@@ -119,7 +119,7 @@
119	119	* the boot monitor to read the system wide flags register,
120	120	* and branch to the address found there.
121	121	*/
122		- smp_cross_call(cpumask_of(cpu), 1);
	122	+ gic_raise_softirq(cpumask_of(cpu), 1);
123	123
124	124	timeout = jiffies + (1 * HZ);
125	125	while (time_before(jiffies, timeout)) {
...	...	@@ -151,6 +151,8 @@
151	151
152	152	for (i = 0; i < NR_CPUS; i++)
153	153	set_cpu_possible(i, true);
	154	+
	155	+ set_smp_cross_call(gic_raise_softirq);
154	156	}
155	157
156	158	void __init platform_smp_prepare_cpus(unsigned int max_cpus)
...	...	@@ -21,6 +21,7 @@
21	21	#include <linux/io.h>
22	22
23	23	#include <asm/cacheflush.h>
	24	+#include <asm/hardware/gic.h>
24	25	#include <asm/smp_scu.h>
25	26	#include <mach/hardware.h>
26	27	#include <mach/omap4-common.h>
...	...	@@ -63,7 +64,7 @@
63	64	omap_modify_auxcoreboot0(0x200, 0xfffffdff);
64	65	flush_cache_all();
65	66	smp_wmb();
66		- smp_cross_call(cpumask_of(cpu), 1);
	67	+ gic_raise_softirq(cpumask_of(cpu), 1);
67	68
68	69	/*
69	70	* Now the secondary core is starting up let it run its
...	...	@@ -118,6 +119,8 @@
118	119
119	120	for (i = 0; i < ncores; i++)
120	121	set_cpu_possible(i, true);
	122	+
	123	+ set_smp_cross_call(gic_raise_softirq);
121	124	}
122	125
123	126	void __init platform_smp_prepare_cpus(unsigned int max_cpus)
1		-#ifndef ASMARM_ARCH_SMP_H
2		-#define ASMARM_ARCH_SMP_H
3		-
4		-#include <asm/hardware/gic.h>
5		-
6		-/*
7		- * We use IRQ1 as the IPI
8		- */
9		-static inline void smp_cross_call(const struct cpumask *mask, int ipi)
10		-{
11		- gic_raise_softirq(mask, ipi);
12		-}
13		-
14		-#endif
...	...	@@ -14,6 +14,7 @@
14	14	#include <linux/io.h>
15	15
16	16	#include <mach/hardware.h>
	17	+#include <asm/hardware/gic.h>
17	18	#include <asm/mach-types.h>
18	19	#include <asm/smp_scu.h>
19	20	#include <asm/unified.h>
...	...	@@ -61,6 +62,8 @@
61	62
62	63	for (i = 0; i < ncores; i++)
63	64	set_cpu_possible(i, true);
	65	+
	66	+ set_smp_cross_call(gic_raise_softirq);
64	67	}
65	68
66	69	void __init platform_smp_prepare_cpus(unsigned int max_cpus)
1		-#ifndef __MACH_SMP_H
2		-#define __MACH_SMP_H
3		-
4		-#include <asm/hardware/gic.h>
5		-
6		-/*
7		- * We use IRQ1 as the IPI
8		- */
9		-static inline void smp_cross_call(const struct cpumask *mask, int ipi)
10		-{
11		-#if defined(CONFIG_ARM_GIC)
12		- gic_raise_softirq(mask, ipi);
13		-#endif
14		-}
15		-
16		-#endif