Commit 948c66df0d5e23dbcb84bee39a11b56c8a0d3e41
Committed by
Kevin Hilman
1 parent
e2da3aaa42
Exists in
master
and in
39 other branches
davinci: cpuidle: move mapping of DDR2 controller registers out of driver
When suspend is supported, both cpuidle and suspend code need to work on DDR2 registers. Instead of mapping the DDR2 registers twice, do it once outside of cpuidle driver and let cpuidle driver get the virtual base address of DDR2 registers. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Showing 4 changed files with 21 additions and 30 deletions Side-by-side Diff
arch/arm/mach-davinci/cpuidle.c
... | ... | @@ -106,8 +106,6 @@ |
106 | 106 | int ret; |
107 | 107 | struct cpuidle_device *device; |
108 | 108 | struct davinci_cpuidle_config *pdata = pdev->dev.platform_data; |
109 | - struct resource *ddr2_regs; | |
110 | - resource_size_t len; | |
111 | 109 | |
112 | 110 | device = &per_cpu(davinci_cpuidle_device, smp_processor_id()); |
113 | 111 | |
114 | 112 | |
115 | 113 | |
... | ... | @@ -116,28 +114,12 @@ |
116 | 114 | return -ENOENT; |
117 | 115 | } |
118 | 116 | |
119 | - ddr2_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
120 | - if (!ddr2_regs) { | |
121 | - dev_err(&pdev->dev, "cannot get DDR2 controller register base"); | |
122 | - return -ENODEV; | |
123 | - } | |
117 | + ddr2_reg_base = pdata->ddr2_ctlr_base; | |
124 | 118 | |
125 | - len = resource_size(ddr2_regs); | |
126 | - | |
127 | - ddr2_regs = request_mem_region(ddr2_regs->start, len, ddr2_regs->name); | |
128 | - if (!ddr2_regs) | |
129 | - return -EBUSY; | |
130 | - | |
131 | - ddr2_reg_base = ioremap(ddr2_regs->start, len); | |
132 | - if (!ddr2_reg_base) { | |
133 | - ret = -ENOMEM; | |
134 | - goto ioremap_fail; | |
135 | - } | |
136 | - | |
137 | 119 | ret = cpuidle_register_driver(&davinci_idle_driver); |
138 | 120 | if (ret) { |
139 | 121 | dev_err(&pdev->dev, "failed to register driver\n"); |
140 | - goto driver_register_fail; | |
122 | + return ret; | |
141 | 123 | } |
142 | 124 | |
143 | 125 | /* Wait for interrupt state */ |
144 | 126 | |
... | ... | @@ -164,18 +146,11 @@ |
164 | 146 | ret = cpuidle_register_device(device); |
165 | 147 | if (ret) { |
166 | 148 | dev_err(&pdev->dev, "failed to register device\n"); |
167 | - goto device_register_fail; | |
149 | + cpuidle_unregister_driver(&davinci_idle_driver); | |
150 | + return ret; | |
168 | 151 | } |
169 | 152 | |
170 | 153 | return 0; |
171 | - | |
172 | -device_register_fail: | |
173 | - cpuidle_unregister_driver(&davinci_idle_driver); | |
174 | -driver_register_fail: | |
175 | - iounmap(ddr2_reg_base); | |
176 | -ioremap_fail: | |
177 | - release_mem_region(ddr2_regs->start, len); | |
178 | - return ret; | |
179 | 154 | } |
180 | 155 | |
181 | 156 | static struct platform_driver davinci_cpuidle_driver = { |
arch/arm/mach-davinci/devices-da8xx.c
... | ... | @@ -496,6 +496,19 @@ |
496 | 496 | return ret; |
497 | 497 | } |
498 | 498 | |
499 | +static void __iomem *da8xx_ddr2_ctlr_base; | |
500 | +void __iomem * __init da8xx_get_mem_ctlr(void) | |
501 | +{ | |
502 | + if (da8xx_ddr2_ctlr_base) | |
503 | + return da8xx_ddr2_ctlr_base; | |
504 | + | |
505 | + da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K); | |
506 | + if (!da8xx_ddr2_ctlr_base) | |
507 | + pr_warning("%s: Unable to map DDR2 controller", __func__); | |
508 | + | |
509 | + return da8xx_ddr2_ctlr_base; | |
510 | +} | |
511 | + | |
499 | 512 | static struct resource da8xx_cpuidle_resources[] = { |
500 | 513 | { |
501 | 514 | .start = DA8XX_DDR2_CTL_BASE, |
... | ... | @@ -521,6 +534,8 @@ |
521 | 534 | |
522 | 535 | int __init da8xx_register_cpuidle(void) |
523 | 536 | { |
537 | + da8xx_cpuidle_pdata.ddr2_ctlr_base = da8xx_get_mem_ctlr(); | |
538 | + | |
524 | 539 | return platform_device_register(&da8xx_cpuidle_device); |
525 | 540 | } |
arch/arm/mach-davinci/include/mach/cpuidle.h
arch/arm/mach-davinci/include/mach/da8xx.h
... | ... | @@ -94,6 +94,7 @@ |
94 | 94 | int da8xx_register_rtc(void); |
95 | 95 | int da850_register_cpufreq(void); |
96 | 96 | int da8xx_register_cpuidle(void); |
97 | +void __iomem * __init da8xx_get_mem_ctlr(void); | |
97 | 98 | |
98 | 99 | extern struct platform_device da8xx_serial_device; |
99 | 100 | extern struct emac_platform_data da8xx_emac_pdata; |