Commit a31657a8cc57bcffdfe1e63756cbca7fd2f14648
1 parent
edbedc0fab
Exists in
smarc_8m_imx_4.14.78_1.0.0_ga
Make changes for hardware rev. 00E0
Showing 2 changed files with 25 additions and 10 deletions Side-by-side Diff
arch/arm64/boot/dts/embedian/fsl-smarcimx8mq-common.dtsi
| ... | ... | @@ -162,7 +162,7 @@ |
| 162 | 162 | MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5 0x41 /*PCIE_WAKE#*/ |
| 163 | 163 | MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x41 /*LID#*/ |
| 164 | 164 | MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x41 /*SLEEP#*/ |
| 165 | - MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x41 /*CHARGING#*/ | |
| 165 | + MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11 0x41 /*CHARGING#*/ | |
| 166 | 166 | MX8MQ_IOMUXC_SAI2_RXC_GPIO4_IO22 0x41 /*CHARGER_PRSNT#*/ |
| 167 | 167 | MX8MQ_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19 /*CARRIER_STBY#*/ |
| 168 | 168 | MX8MQ_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x41 /*BATLOW#*/ |
| ... | ... | @@ -283,8 +283,8 @@ |
| 283 | 283 | fsl,pins = < |
| 284 | 284 | MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49 |
| 285 | 285 | MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49 |
| 286 | - MX8MQ_IOMUXC_ECSPI2_MOSI_GPIO5_IO11 0x19 | |
| 287 | - MX8MQ_IOMUXC_ECSPI2_SCLK_GPIO5_IO10 0x19 | |
| 286 | + MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B 0x49 | |
| 287 | + MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B 0x49 | |
| 288 | 288 | >; |
| 289 | 289 | }; |
| 290 | 290 | |
| ... | ... | @@ -297,8 +297,8 @@ |
| 297 | 297 | |
| 298 | 298 | pinctrl_uart4: uart4grp { |
| 299 | 299 | fsl,pins = < |
| 300 | - MX8MQ_IOMUXC_UART4_RXD_UART4_DCE_RX 0x49 | |
| 301 | - MX8MQ_IOMUXC_UART4_TXD_UART4_DCE_TX 0x49 | |
| 300 | + MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49 | |
| 301 | + MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49 | |
| 302 | 302 | MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49 |
| 303 | 303 | MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49 |
| 304 | 304 | >; |
| ... | ... | @@ -516,6 +516,12 @@ |
| 516 | 516 | MX8MQ_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x16 |
| 517 | 517 | >; |
| 518 | 518 | }; |
| 519 | + | |
| 520 | + pinctrl_hdmi: hdmigrp { | |
| 521 | + fsl,pins = < | |
| 522 | + MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1 0xc1 | |
| 523 | + >; | |
| 524 | + }; | |
| 519 | 525 | }; |
| 520 | 526 | }; |
| 521 | 527 | |
| ... | ... | @@ -626,7 +632,6 @@ |
| 626 | 632 | vgen6_reg: vgen6 { |
| 627 | 633 | regulator-min-microvolt = <1800000>; |
| 628 | 634 | regulator-max-microvolt = <3300000>; |
| 629 | - regulator-always-on; | |
| 630 | 635 | }; |
| 631 | 636 | }; |
| 632 | 637 | }; |
| ... | ... | @@ -808,9 +813,7 @@ |
| 808 | 813 | pinctrl-names = "default"; |
| 809 | 814 | pinctrl-0 = <&pinctrl_uart2>; |
| 810 | 815 | assigned-clocks = <&clk IMX8MQ_CLK_UART2>; |
| 811 | - assigned-clock-parents = <&clk IMX8MQ_CLK_25M>; | |
| 812 | - cts-gpios = <&gpio5 10 GPIO_ACTIVE_LOW>; | |
| 813 | - rts-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; | |
| 816 | + assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>; | |
| 814 | 817 | fsl,uart-has-rtscts; |
| 815 | 818 | status = "okay"; |
| 816 | 819 | }; |
arch/arm64/boot/dts/embedian/fsl-smarcimx8mq-hdmi.dtsi
| 1 | 1 | /* |
| 2 | 2 | * Copyright 2017 NXP |
| 3 | - * Copyright 2018-2019 Variscite Ltd. | |
| 3 | + * Copyright 2018-2019 Embedian, Inc. | |
| 4 | 4 | * |
| 5 | 5 | * This program is free software; you can redistribute it and/or |
| 6 | 6 | * modify it under the terms of the GNU General Public License |
| ... | ... | @@ -30,5 +30,17 @@ |
| 30 | 30 | |
| 31 | 31 | &hdmi { |
| 32 | 32 | status = "okay"; |
| 33 | +}; | |
| 34 | + | |
| 35 | +&gpio1 { | |
| 36 | + pinctrl-names = "default"; | |
| 37 | + pinctrl-0 = <&pinctrl_hdmi>; | |
| 38 | + | |
| 39 | + hdmi_on_hog { | |
| 40 | + gpio-hog; | |
| 41 | + gpios = <1 0>; | |
| 42 | + output-high; | |
| 43 | + line-name = "hdmi_on"; | |
| 44 | + }; | |
| 33 | 45 | }; |