20 Jan, 2011
1 commit
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When fixing the frequency calculations for perf on powerpc I
forgot to fix the FSL version.If we dont set event->hw.last_period the frequency to period
calculations in perf go haywire and we continually
throttle/unthrottle the PMU.Signed-off-by: Anton Blanchard
Acked-by: Benjamin Herrenschmidt
Cc: Scott Wood
Cc: Paul Mackerras
Cc: Arnaldo Carvalho de Melo
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Peter Zijlstra
LKML-Reference:
Signed-off-by: Ingo Molnar
19 Jan, 2011
32 commits
-
…git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86: Clear irqstack thread_info
x86: Make relocatable kernel work with new binutils -
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (26 commits)
MIPS: Malta: enable Cirrus FB console
MIPS: add CONFIG_VIRTUALIZATION for virtio support
MIPS: Implement __read_mostly
MIPS: ath79: add common WMAC device for AR913X based boards
MIPS: ath79: Add initial support for the Atheros AP81 reference board
MIPS: ath79: add common SPI controller device
SPI: Add SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCs
MIPS: ath79: add common GPIO buttons device
MIPS: ath79: add common watchdog device
MIPS: ath79: add common GPIO LEDs device
MIPS: ath79: add initial support for the Atheros PB44 reference board
MIPS: ath79: utilize the MIPS multi-machine support
MIPS: ath79: add GPIOLIB support
MIPS: Add initial support for the Atheros AR71XX/AR724X/AR931X SoCs
MIPS: jump label: Add MIPS support.
MIPS: Use WARN() in uasm for better diagnostics.
MIPS: Optimize TLB handlers for Octeon CPUs
MIPS: Add LDX and LWX instructions to uasm.
MIPS: Use BBIT instructions in TLB handlers
MIPS: Declare uasm bbit0 and bbit1 functions.
... -
While most users of a physical Malta board are using the serial port
as the console, a lot of QEMU users would prefer to interact with a
graphical console. Enable the Cirrus FB support in the Malta default
configuration to make that possible. Note that the default console will
still be the serial port, users have to pass "console=tty0" to the
kernel to use the Cirrus FB.Signed-off-by: Aurelien Jarno
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2001/
Signed-off-by: Ralf Baechle -
Add CONFIG_VIRTUALIZATION to the MIPS architecture and include the
the virtio code there. Used to enable the virtio drivers under QEMU.Signed-off-by: Aurelien Jarno
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2002/
Signed-off-by: Ralf Baechle -
Just do what everyone else is doing by placing __read_mostly things in
the .data.read_mostly section.mips_io_port_base can not be read-only (const) and writable
(__read_mostly) at the same time. One of them has to go, so I chose
to eliminate the __read_mostly. It will still get stuck in a portion
of memory that is not adjacent to things that are written, and thus
not be on a dirty cache line, for whatever that is worth.Signed-off-by: David Daney
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1702/
Signed-off-by: Ralf Baechle -
Add common platform_device and helper code to make the registration
of the built-in wireless MAC easier on the Atheros AR9130/AR9132
based boards. Also register the WMAC device on the AR81 board.Signed-off-by: Gabor Juhos
Cc: linux-mips@linux-mips.org
Cc: Imre Kaloz ,
Cc: Luis R. Rodriguez
Cc: Cliff Holden
Cc: Kathy Giori
Patchwork: https://patchwork.linux-mips.org/patch/1962/
Signed-off-by: Ralf Baechle -
Signed-off-by: Gabor Juhos
Signed-off-by: Imre Kaloz
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez
Cc: Cliff Holden
Cc: Kathy Giori
Patchwork: https://patchwork.linux-mips.org/patch/1952/
Signed-off-by: Ralf Baechle -
Several boards are using the built-in SPI controller of the
AR71XX/AR724X/AR913X SoCs. This patch adds common platform_device
and helper code to register it. Additionally, the patch registers
the SPI bus on the PB44 board.Signed-off-by: Gabor Juhos
Cc: linux-mips@linux-mips.org
Cc: Imre Kaloz
Cc: Luis R. Rodriguez
Cc: Cliff Holden
Cc: Kathy Giori
Patchwork: https://patchwork.linux-mips.org/patch/1956/
Signed-off-by: Ralf Baechle -
The Atheros AR71XX/AR724X/AR913X SoCs have a built-in SPI controller. This
patch implements a driver for that.Signed-off-by: Gabor Juhos
Cc: David Brownell
Cc: spi-devel-general@lists.sourceforge.net
Acked-by: Grant Likely
Cc: linux-mips@linux-mips.org
Cc: Imre Kaloz
Cc: Luis R. Rodriguez
Cc: Cliff Holden
Cc: Kathy Giori
Patchwork: https://patchwork.linux-mips.org/patch/1960/
Signed-off-by: Ralf Baechle -
Almost all boards have one or more push buttons connected to GPIO lines.
This patch adds common code to register a platform_device for them.The patch also adds support for the buttons on the PB44 board.
Signed-off-by: Gabor Juhos
Signed-off-by: Imre Kaloz
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez
Cc: Cliff Holden
Cc: Kathy Giori
Patchwork: https://patchwork.linux-mips.org/patch/1954/
Signed-off-by: Ralf Baechle -
All supported SoCs have a built-in hardware watchdog driver. This patch
registers a platform_device for that to make it usable.Signed-off-by: Gabor Juhos
Signed-off-by: Imre Kaloz
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez
Cc: Cliff Holden
Cc: Kathy Giori
Patchwork: https://patchwork.linux-mips.org/patch/1955/
Signed-off-by: Ralf Baechle -
Almost all boards have one or more LEDs connected to GPIO lines. This
patch adds common code to register a platform_device for them.The patch also adds support for the LEDs on the PB44 board.
Signed-off-by: Gabor Juhos
Signed-off-by: Imre Kaloz
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez
Cc: Cliff Holden
Cc: Kathy Giori
Patchwork: https://patchwork.linux-mips.org/patch/1953/
Signed-off-by: Ralf Baechle -
Signed-off-by: Gabor Juhos
Cc: Imre Kaloz
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez
Cc: Cliff Holden
Cc: Kathy Giori
Patchwork: https://patchwork.linux-mips.org/patch/1950/
Signed-off-by: Ralf Baechle -
Signed-off-by: Gabor Juhos
Cc: Imre Kaloz
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez
Cc: Cliff Holden
Cc: Kathy Giori
Patchwork: https://patchwork.linux-mips.org/patch/1949/
Signed-off-by: Ralf Baechle -
This patch implements generic GPIO routines for the built-in
GPIO controllers of the Atheros AR71XX/AR724X/AR913X SoCs.Signed-off-by: Gabor Juhos
Signed-off-by: Imre Kaloz
Cc: David Brownell
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez
Cc: Cliff Holden
Cc: Kathy Giori
Patchwork: https://patchwork.linux-mips.org/patch/1948/
Signed-off-by: Ralf Baechle -
This patch adds initial support for various Atheros SoCs based on the
MIPS 24Kc core. The following models are supported at the moment:- AR7130
- AR7141
- AR7161
- AR9130
- AR9132
- AR7240
- AR7241
- AR7242The current patch contains minimal support only, but the resulting
kernel can boot into user-space with using of an initramfs image on
various boards which are using these SoCs. Support for more built-in
devices and individual boards will be implemented in further patches.Signed-off-by: Gabor Juhos
Signed-off-by: Imre Kaloz
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez
Cc: Cliff Holden
Cc: Kathy Giori
Patchwork: https://patchwork.linux-mips.org/patch/1947/
Signed-off-by: Ralf Baechle -
In order not to be left behind, we add jump label support for MIPS.
Tested on 64-bit big endian (Octeon), and 32-bit little endian
(malta/qemu).Signed-off-by: David Daney
To: linux-mips@linux-mips.org
Cc: Steven Rostedt
Cc: Jason Baron
Patchwork: https://patchwork.linux-mips.org/patch/1923/
Signed-off-by: Ralf Baechle -
On the off chance that uasm ever warns about overflow, there is no way
to know what the offending instruction is.Change the printks to WARNs, so we can get a nice stack trace. It has
the added benefit of being much more noticeable than the short single
line warning message, so is less likely to be ignored.Signed-off-by: David Daney
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1905/
Signed-off-by: Ralf Baechle -
Octeon can use scratch registers in the TLB handlers. Octeon II can
use LDX instructions.Signed-off-by: David Daney
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1904/
Signed-off-by: Ralf Baechle -
Needed by Octeon II optimized TLB handlers.
Signed-off-by: David Daney
To: linux-mips@linux-mips.org
Pachwork: https://patchwork.linux-mips.org/patch/1903/
Signed-off-by: Ralf Baechle -
If the CPU supports BBIT0 and BBIT1, use them in TLB handlers as they
are more efficient than an AND followed by an branch and then
restoring the clobbered register.Signed-off-by: David Daney
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1873/
Signed-off-by: Ralf Baechle -
these are already defined, but declaring them allow them to be used
outside of uasm.c.Signed-off-by: David Daney
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1872/
Signed-off-by: Ralf Baechle -
Decide at runtime to use either Context or KScratch to hold the PGD
pointer.Signed-off-by: David Daney
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1876/
Signed-off-by: Ralf Baechle -
Signed-off-by: David Daney
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1875/
Signed-off-by: Ralf Baechle -
Probe c0_config4 for KScratch registers and report them in /proc/cpuinfo.
Signed-off-by: David Daney
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1877/
Signed-off-by: Ralf Baechle -
This patch adds a generic solution to support multiple machines based on
a given SoC within a single kernel image. It is implemented already for
several other architectures but MIPS has no generic support for that yet.[Ralf: This competes with DT but DT is a much more complex solution and this
code has been used by OpenWRT for a long time so for now DT is a bad reason
to stop the merge but longer term this should be migrated to DT.]Signed-off-by: Gabor Juhos
Cc: linux-mips@linux-mips.org
Cc: kaloz@openwrt.org
Cc: Luis R. Rodriguez
Cc: Cliff Holden
Patchwork: https://patchwork.linux-mips.org/patch/1814/
Signed-off-by: Ralf Baechle -
Using %pR standardizes the struct resource output.
Signed-off-by: Joe Perches
To: Jiri Kosina
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1772/
Signed-off-by: Ralf Baechle -
Signed-off-by: Joe Perches
To: Jiri Kosina
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1756/
Signed-off-by: Ralf Baechle -
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6:
parisc: fix compile breakage caused by inlining maybe_mkwrite
parisc : Remove broken line wrapping handling pdc_iodc_print() -
* 'next' of git://git.monstr.eu/linux-2.6-microblaze:
microblaze: Fix asm/pgtable.h
microblaze: Fix missing pagemap.h -
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (25 commits)
m68knommu: fix broken setting of irq_chip and handler
m68knommu: switch to using -mcpu= flags for ColdFire targets
m68knommu: arch/m68knommu/Kconfig whitespace cleanup
m68knommu: create optimal separate instruction and data cache for ColdFire
m68knommu: support ColdFire caches that do copyback and write-through
m68knommu: support version 2 ColdFire split cache
m68knommu: make cache push code ColdFire generic
m68knommu: clean up ColdFire cache control code
m68knommu: move inclusion of ColdFire v4 cache registers
m68knommu: merge bit definitions for version 3 ColdFire cache controller
m68knommu: create bit definitions for the version 2 ColdFire cache controller
m68knommu: remove empty __iounmap() it is no used
m68knommu: remove kernel_map() code, it is not used
m68knommu: remove do_page_fault(), it is not used
m68knommu: use user stack pointer hardware on some ColdFire cores
m68knommu: remove command line printing DEBUG
m68knommu: remove fasthandler interrupt code
m68knommu: move UART addressing to part specific includes
m68knommu: fix clock rate value reported for ColdFire 54xx parts
m68knommu: move ColdFire CPU names into their headers
... -
…/git/tip/linux-2.6-tip
* 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
perf tools: Fix tracepoint id to string perf.data header table
perf tools: Fix handling of wildcards in tracepoint event selectors
powerpc: perf: Fix frequency calculation for overflowing counters
18 Jan, 2011
7 commits
-
Mathias Merz reported that v2.6.37 failed to boot on his
system.Make sure that the thread_info part of the irqstack is
initialized to zeroes.Reported-and-Tested-by: Matthias Merz
Signed-off-by: Brian Gerst
Acked-by: Pekka Enberg
Cc: Arjan van de Ven
Cc: Linus Torvalds
LKML-Reference:
Signed-off-by: Ingo Molnar -
The CONFIG_RELOCATABLE=y option is broken with new binutils, which will make
boot panic.According to Lu Hongjiu, the affected binutils are from 2.20.51.0.12 to
2.21.51.0.3, which are release since Oct 22 this year. At least ubuntu 10.10 is
using such binutils. See:http://sourceware.org/bugzilla/show_bug.cgi?id=12327
The reason of the boot panic is that we have 'jiffies = jiffies_64;' in
vmlinux.lds.S. The jiffies isn't in any section. In kernel build, there is
warning saying jiffies is an absolute address and can't be relocatable. At
runtime, jiffies will have virtual address 0.Signed-off-by: Shaohua Li
Cc: Lu Hongjiu
Cc: Huang Ying
Cc: Sam Ravnborg
LKML-Reference:
Signed-off-by: Ingo Molnar -
Signed-off-by: Jassi Brar
Signed-off-by: Kukjin Kim -
Signed-off-by: Jassi Brar
Signed-off-by: Kukjin Kim -
Signed-off-by: Jassi Brar
Signed-off-by: Kukjin Kim -
Signed-off-by: Jassi Brar
Signed-off-by: Kukjin Kim -
Add missing virtual ASoC DMA device.
Signed-off-by: Jassi Brar
Acked-by: Mark Brown
[kgene.kim@samsung.com: minor changed title]
Signed-off-by: Kukjin Kim
