23 Oct, 2018
2 commits
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1;5201;0c
Reduce size of duplicated comments by switching to use SPDX identifier.No functional change.
Signed-off-by: Andy Shevchenko
Reviewed-by: Mika Westerberg
Signed-off-by: Lee Jones -
Sort headers alphabetically for better maintenance.
No functional change.
Signed-off-by: Andy Shevchenko
Reviewed-by: Mika Westerberg
Signed-off-by: Lee Jones
08 Jan, 2018
1 commit
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These duplicate includes have been found with scripts/checkincludes.pl but
they have been removed manually to avoid removing false positives.Signed-off-by: Pravin Shedge
Signed-off-by: Lee Jones
05 Sep, 2017
2 commits
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Both Bay and Cherry Trail devices may be used together with a Crystal Cove
PMIC. Each platform has its own variant of the PMIC, which both use the
same ACPI HID, but they are not 100% compatible.This commits makes the intel_soc_pmic_core code check the _HRV of the
ACPI-firmware-node and selects intel_soc_pmic_config_byt_crc resp.
intel_soc_pmic_config_cht_crc based on this.This fixes the Bay Trail specific ACPI OpRegion code causing problems
on Cherry Trail devices. Specifically this was causing the external
microsd slot on a Dell Venue 8 5855 (Cherry Trail version) to not work
and the eMMC to become unreliable and throw lots of errors.Fixes: 5165238460 ("mfd: intel_soc_pmic: Core driver")
Reported-and-tested-by: russianneuromancer
Signed-off-by: Hans de Goede
Reviewed-by: Andy Shevchenko
Signed-off-by: Lee Jones -
Both Bay and Cherry Trail devices may be used together with a Crystal Cove
PMIC. Each platform has its own variant of the PMIC, which both use the
same ACPI HID, but they are not 100% compatible.Looking at the android x86 kernel sources where most of the Crystal Cove
code comes from, it talks about "Valley View", "Bay Trail" and / or BYT
without ever mentioning Cherry Trail, with the exception of the regulator
driver. The Asus Zenfone-2 kernel code has 2 regulator drivers, one
for Crystal Cove and one for what it calls Crystal Cove Plus. The
Crystal Cove Plus regulator driver is the only one to mention Cherry
Trail and that driver uses different register addresses then the
normal (Bay Trail) Crystal Cove regulator driver, showing that at
least the regulator register addresses are different.The GPIO code should work on both, and the PWM code is known to work on
both and is necessary for backlight control on some Cherry Trail devices.Testing has shown that the ACPI OpRegion code otoh is causing problems
on Cherry Trail devices, which is not surprising as it deals with the
regulators and those have different register addresses on CHT.Specifically the ACPI OpRegion code causes the external microsd slot on
a Dell Venue 8 5855 (Cherry Trail version) to not work and the eMMC to
become unreliable and throw lots of errors.This commit replaces the single mfd_cell array currently used for Crystal
Cove with 2 separate arrays, one for the Bay Trail variant and one for
the Cherry Trail variant, note that the Cherry Trail version of the array
only contains gpio and pwm cells. The PMIC OpRegion cell is deliberately
not included and drivers for the other cells in the Bay Trail cell array
were never upstreamed.Fixes: 7cf0a66f32 ("mfd: intel_soc_pmic: Crystal Cove support")
Reported-and-tested-by: russianneuromancer
Signed-off-by: Hans de Goede
Reviewed-by: Andy Shevchenko
Signed-off-by: Lee Jones
27 Apr, 2017
2 commits
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unction devm_regmap_init_i2c() returns an ERR_PTR on errors, and its
return value should be checked before it is dereferenced. However, in
function intel_soc_pmic_i2c_probe(), the return value of function
devm_regmap_init_i2c() is used without validation. This patch fixes it.Signed-off-by: Pan Bian
Signed-off-by: Lee Jones -
Since commit 845c877009cf ("i2c / ACPI: Assign IRQ for devices that have
GpioInt automatically") I2C core assigns interrupt line to I2C slave
devices with regarding to GpioInt() resources.There is no need to repeat this in the driver.
Signed-off-by: Andy Shevchenko
Signed-off-by: Lee Jones
09 May, 2016
1 commit
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GPIO lookup tables are supposed to be zero terminated. Let's do that
and avoid accidentally walking off the end.Cc: stable@vger.kernel.org
Fixes: 61dd2ca2d44e ("mfd: intel_soc_pmic_core: Add lookup table for Panel Control as GPIO signal")
Signed-off-by: Ville Syrjälä
Acked-by: Linus Walleij
Acked-by: Daniel Vetter
Signed-off-by: Lee Jones
05 Sep, 2015
1 commit
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Pull drm updates from Dave Airlie:
"This is the main pull request for the drm for 4.3. Nouveau is
probably the biggest amount of changes in here, since it missed 4.2.
Highlights below, along with the usual bunch of fixes.All stuff outside drm should have applicable acks.
Highlights:
- new drivers:
freescale dcu kms driver- core:
more atomic fixes
disable some dri1 interfaces on kms drivers
drop fb panic handling, this was just getting more broken, as more locking was required.
new core fbdev Kconfig support - instead of each driver enable/disabling it
struct_mutex cleanups- panel:
more new panels
cleanup Kconfig- i915:
Skylake support enabled by default
legacy modesetting using atomic infrastructure
Skylake fixes
GEN9 workarounds- amdgpu:
Fiji support
CGS support for amdgpu
Initial GPU scheduler - off by default
Lots of bug fixes and optimisations.- radeon:
DP fixes
misc fixes- amdkfd:
Add Carrizo support for amdkfd using amdgpu.- nouveau:
long pending cleanup to complete driver,
fully bisectable which makes it larger,
perfmon work
more reclocking improvements
maxwell displayport fixes- vmwgfx:
new DX device support, supports OpenGL 3.3
screen targets support- mgag200:
G200eW support
G200e new revision support- msm:
dragonboard 410c support, msm8x94 support, msm8x74v1 support
yuv format support
dma plane support
mdp5 rotation
initial hdcp- sti:
atomic support- exynos:
lots of cleanups
atomic modesetting/pageflipping support
render node support- tegra:
tegra210 support (dc, dsi, dp/hdmi)
dpms with atomic modesetting support- atmel:
support for 3 more atmel SoCs
new input formats, PRIME support.- dwhdmi:
preparing to add audio support- rockchip:
yuv plane support"* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (1369 commits)
drm/amdgpu: rename gmc_v8_0_init_compute_vmid
drm/amdgpu: fix vce3 instance handling
drm/amdgpu: remove ib test for the second VCE Ring
drm/amdgpu: properly enable VM fault interrupts
drm/amdgpu: fix warning in scheduler
drm/amdgpu: fix buffer placement under memory pressure
drm/amdgpu/cz: fix cz_dpm_update_low_memory_pstate logic
drm/amdgpu: fix typo in dce11 watermark setup
drm/amdgpu: fix typo in dce10 watermark setup
drm/amdgpu: use top down allocation for non-CPU accessible vram
drm/amdgpu: be explicit about cpu vram access for driver BOs (v2)
drm/amdgpu: set MEC doorbell range for Fiji
drm/amdgpu: implement burst NOP for SDMA
drm/amdgpu: add insert_nop ring func and default implementation
drm/amdgpu: add amdgpu_get_sdma_instance helper function
drm/amdgpu: add AMDGPU_MAX_SDMA_INSTANCES
drm/amdgpu: add burst_nop flag for sdma
drm/amdgpu: add count field for the SDMA NOP packet v2
drm/amdgpu: use PT for VM sync on unmap
drm/amdgpu: make wait_event uninterruptible in push_job
...
11 Aug, 2015
2 commits
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i2c_driver does not need to set an owner because i2c_register_driver()
will set it.Signed-off-by: Krzysztof Kozlowski
Signed-off-by: Lee Jones -
Constify the ACPI device ID array, it doesn't need to be writable at
runtime.Signed-off-by: Mathias Krause
Signed-off-by: Lee Jones
21 Jul, 2015
2 commits
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On some BYT PLatform the PWM is controlled using CRC PMIC. Add a lookup
entry for the same to be used by the consumer (Intel GFX)CC: Samuel Ortiz
Cc: Linus Walleij
Cc: Alexandre Courbot
Cc: Thierry Reding
Acked-by: Lee Jones
Tested-by: Ville Syrjälä
Signed-off-by: Shobhit Kumar
Signed-off-by: Daniel Vetter -
On some Intel SoC platforms, the panel enable/disable signals are
controlled by CRC PMIC. Add those control as a new GPIO in a lookup
table for gpio-crystalcove chip during CRC driver loadCC: Samuel Ortiz
Cc: Linus Walleij
Cc: Alexandre Courbot
Cc: Thierry Reding
Acked-by: Lee Jones
Acked-by: Linus Walleij
Tested-by: Ville Syrjälä
Signed-off-by: Shobhit Kumar
Signed-off-by: Daniel Vetter
04 Mar, 2015
3 commits
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Surely GPIO irq will be used as an input pin so make sure its direction is
set after requesting.Signed-off-by: Jarkko Nikula
Signed-off-by: Lee Jones -
It is usually better to pass actual error code from a function call than
mangling it to another.Signed-off-by: Jarkko Nikula
Signed-off-by: Lee Jones -
intel_soc_pmic_find_gpio_irq() tries to find a GPIO interrupt but doesn't
select between it or I2C interrupt so it makes more sense to move this
comment to intel_soc_pmic_i2c_probe() with minor edits.Signed-off-by: Jarkko Nikula
Signed-off-by: Lee Jones
17 Feb, 2015
1 commit
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This patch add a missing check on the return value of devm_kzalloc,
which would cause a NULL pointer dereference in a OOM situation.Signed-off-by: Kiran Padwal
Signed-off-by: Lee Jones
26 Sep, 2014
1 commit
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This patch fix warning message with CONFIG_PM_SLEEP disabled
If CONFIG_PM_SLEEP is not enabled we receive the following warning message:drivers/mfd/intel_soc_pmic_core.c:118:12:
warning: 'intel_soc_pmic_suspend' defined but not usedSigned-off-by: Jaewon Kim
Signed-off-by: Lee Jones
09 Jul, 2014
1 commit
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If CONIFG_ACPI is not enabled we receive the following warning:
drivers/mfd/intel_soc_pmic_core.c:144:30:
warning: ‘intel_soc_pmic_acpi_match’ defined but not usedThis patch rids it.
Signed-off-by: Lee Jones
17 Jun, 2014
1 commit
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This patch provides the common I2C driver code for Intel SoC PMICs.
Signed-off-by: Yang, Bin
Signed-off-by: Zhu, Lejun
Signed-off-by: Lee Jones
