Eric Lee / smarc-fsl-linux-kernel

30 May, 2018

1 commit

  • 4b0a3b9a5   arm64: dts: cavium: fix PCI bus dtc warnings ... Browse Code »

    [ Upstream commit e2c8d283c4e2f468bed1bcfedb80b670b1bc8ab1 ]

    dtc recently added PCI bus checks. Fix these warnings:

    arch/arm64/boot/dts/cavium/thunder2-99xx.dtb: Warning (pci_bridge): Node /pci missing bus-range for PCI bridge
    arch/arm64/boot/dts/cavium/thunder2-99xx.dtb: Warning (unit_address_vs_reg): Node /pci has a reg or ranges property, but no unit name

    Signed-off-by: Rob Herring
    Cc: Jayachandran C
    Signed-off-by: Arnd Bergmann
    Signed-off-by: Sasha Levin
    Signed-off-by: Greg Kroah-Hartman

    Rob Herring
     

02 Nov, 2017

1 commit

  • b24413180   License cleanup: add SPDX GPL-2.0 license identifier to files with no license ... Browse Code »

    Many source files in the tree are missing licensing information, which
    makes it harder for compliance tools to determine the correct license.

    By default all files without license information are under the default
    license of the kernel, which is GPL version 2.

    Update the files which contain no license information with the 'GPL-2.0'
    SPDX license identifier. The SPDX identifier is a legally binding
    shorthand, which can be used instead of the full boiler plate text.

    This patch is based on work done by Thomas Gleixner and Kate Stewart and
    Philippe Ombredanne.

    How this work was done:

    Patches were generated and checked against linux-4.14-rc6 for a subset of
    the use cases:
    - file had no licensing information it it.
    - file was a */uapi/* one with no licensing information in it,
    - file was a */uapi/* one with existing licensing information,

    Further patches will be generated in subsequent months to fix up cases
    where non-standard license headers were used, and references to license
    had to be inferred by heuristics based on keywords.

    The analysis to determine which SPDX License Identifier to be applied to
    a file was done in a spreadsheet of side by side results from of the
    output of two independent scanners (ScanCode & Windriver) producing SPDX
    tag:value files created by Philippe Ombredanne. Philippe prepared the
    base worksheet, and did an initial spot review of a few 1000 files.

    The 4.13 kernel was the starting point of the analysis with 60,537 files
    assessed. Kate Stewart did a file by file comparison of the scanner
    results in the spreadsheet to determine which SPDX license identifier(s)
    to be applied to the file. She confirmed any determination that was not
    immediately clear with lawyers working with the Linux Foundation.

    Criteria used to select files for SPDX license identifier tagging was:
    - Files considered eligible had to be source code files.
    - Make and config files were included as candidates if they contained >5
    lines of source
    - File already had some variant of a license header in it (even if
    Reviewed-by: Philippe Ombredanne
    Reviewed-by: Thomas Gleixner
    Signed-off-by: Greg Kroah-Hartman

    Greg Kroah-Hartman
     

31 Mar, 2017

1 commit

  • 517b311ea   arm64: dts: move from ARCH_VULCAN to ARCH_THUNDER2 ... Browse Code »

    Move and update device tree files as part of transition from Broadcom
    Vulcan to Cavium ThunderX2.

    The changes are to:
    * rename dts/broadcom/vulcan.dtsi to cavium/thunder2-99xx.dtsi,
    update cpu cores to be "cavium,thunder2", and update SoC to be
    "cavium,thunderx2-cn9900"
    * move SoC dts/broadcom/vulcan-eval.dtsi to cavium/thunder2-99xx.dtsi
    and update board name string
    * Update dts/broadcom/Makefile not to build vulcan dtbs
    * Update dts/cavium/Makefile to build thunder2 dtbs

    No changes to the dts contents except the updated "compatible" and
    "model" properties.

    Signed-off-by: Jayachandran C
    Reviewed-by: Matthias Brugger
    Signed-off-by: Arnd Bergmann

    Jayachandran C
     

15 Sep, 2016

1 commit

  • f2a89d3b2   arm64: dts: Fix broken architected timer interrupt trigger ... Browse Code »

    The ARM architected timer specification mandates that the interrupt
    associated with each timer is level triggered (which corresponds to
    the "counter >= comparator" condition).

    A number of DTs are being remarkably creative, declaring the interrupt
    to be edge triggered. A quick look at the TRM for the corresponding ARM
    CPUs clearly shows that this is wrong, and I've corrected those.
    For non-ARM designs (and in the absence of a publicly available TRM),
    I've made them active low as well, which can't be completely wrong
    as the GIC cannot disinguish between level low and level high.

    The respective maintainers are of course welcome to prove me wrong.

    While I was at it, I took the liberty to fix a couple of related issue,
    such as some spurious affinity bits on ThunderX, and their complete
    absence on ls1043a (both of which seem to be related to copy-pasting
    from other DTs).

    Acked-by: Duc Dang
    Acked-by: Carlo Caione
    Acked-by: Michal Simek
    Acked-by: Krzysztof Kozlowski
    Acked-by: Dinh Nguyen
    Acked-by: Masahiro Yamada
    Signed-off-by: Marc Zyngier
    Signed-off-by: Arnd Bergmann

    Marc Zyngier
     

19 Feb, 2016

1 commit

09 Jul, 2015

1 commit

22 Oct, 2014

1 commit