26 Jul, 2017

1 commit


18 Jul, 2017

1 commit


17 Jul, 2017

1 commit

  • Provide a module parameter to request internal loop by the SPI master
    controller.
    This should make loop testing easier without extra HW modification.

    For test automation a logic analyzer is recommended for host
    controller-independent verification.
    An example test rig configuration and procedure:
    i.MX6S RIoRBoard Logic Analyzer
    -----------------------------------------
    (J13 4) GND ------------- GND
    (J13 6) CSPI3-CLK ------> PIN 3
    (J13 8) CSPI3-MOSI PIN 1

    grab some data and decode it:
    sigrok-cli -d fx2lafw --time 160000 --config samplerate=10m \
    --channels 0-2 -o dump.sr
    sigrok-cli -i dump.sr -P spi:mosi=1:clk=2 > result_for_regression_tests

    Signed-off-by: Oleksij Rempel
    Signed-off-by: Mark Brown

    Oleksij Rempel
     

29 Jun, 2017

2 commits


26 Apr, 2017

1 commit


30 Mar, 2017

1 commit


21 Mar, 2017

1 commit

  • A multiplication of 8U * xfer-len with the type of a 32 bit unsigned int
    is evaluated using 32 bit arithmetic and then used in a context that
    expects an expression of type unsigned long long (64 bits). Avoid any
    potential overflow by casting BITS_PER_BYTE to unsigned long long.

    Detected by CoverityScan, CID#1419691 ("Unintentional integer overflow")

    Fixes: ea9936f324356 ("spi: loopback-test: add elapsed time check")
    Signed-off-by: Colin Ian King
    Signed-off-by: Mark Brown

    Colin Ian King
     

18 Mar, 2017

5 commits

  • This adds a new test to check whether the spi_transfer.delay_usecs
    setting has properly taken effect.

    Signed-off-by: Akinobu Mita
    Signed-off-by: Mark Brown

    Akinobu Mita
     
  • This adds checks whether the elapsed time is longer than the minimam
    estimated time. The estimated time is calculated with the total
    transfer length per clock rate and optional spi_transfer.delay_usecs.

    Signed-off-by: Akinobu Mita
    Signed-off-by: Mark Brown

    Akinobu Mita
     
  • The spi-loopback-test module currently cannot test the spi_message
    including a zero-length transfer. Because the zero-length transfer is
    treated as a special value in several meanings.

    1. The number of spi_transfer to execute in one test case is described
    by spi_test.transfer_count. It is normally computed by counting number
    of transfers with len > 0 in spi_test.transfers array.

    This change stops the detection for the number of spi_transfer. Each
    spi_test.transfer_count needs to be filled by hand now.

    2. The spi_test.iterate_len is a list of transfer length to iterate on.
    This list is terminated by zero, so zero-length transfer cannot be
    included.

    This changes the terminal value from 0 to -1.

    3. The length for the spi_transfer masked by spi_test.iterate_transfer_mask
    is iterated. Before starting the iteration, the default value which
    is statically initialized is applied. In order to specify the default
    value, zero-length is reserved.

    Currently, the default values are always '1'. So this removes this
    trick and add '1' to iterate_len list.

    By applying all these changes, the spi-loopback-test can execute spi
    messages with zero-length transfer.

    Signed-off-by: Akinobu Mita
    Signed-off-by: Mark Brown

    Akinobu Mita
     
  • When the loopback parameter is set, rx_buf are compared with tx_buf
    after the spi_message is executed. But the first byte of buffer is
    not checked.

    Signed-off-by: Akinobu Mita
    Signed-off-by: Mark Brown

    Akinobu Mita
     
  • The test "two tx-transfers - alter first" actually alters the second
    not the first transfer. Similarly the test "two tx-transfers - alter
    second" actually alters the first not the second transfer.

    The mismatches for the two symmetrical tests cancel each other's
    mistakes. But it's better to fix the mismatches to avoid confusion.

    Signed-off-by: Akinobu Mita
    Signed-off-by: Mark Brown

    Akinobu Mita
     

17 Mar, 2017

1 commit


16 Mar, 2017

1 commit

  • Using vmalloc'ed buffers will use one SG entry for each page,
    that may provoke DMA errors for large transfers.
    Also vmalloc'ed buffers may cause errors on CPU's with VIVT cache.
    Add this option to catch these errors when testing.
    Note that to catch VIVT cache errors, checking the rx range
    has to be disabled, so this option has been added as well.

    Signed-off-by: Frode Isaksen
    Signed-off-by: Mark Brown

    Frode Isaksen
     

02 Sep, 2016

1 commit

  • We get 1 warning when building kernel with W=1:
    drivers/spi/spi-loopback-test.c:408:5: warning: no previous prototype for 'rx_ranges_cmp' [-Wmissing-prototypes]

    In fact, this function is only used in the file in which it is
    declared and don't need a declaration, but can be made static.
    So this patch marks it 'static'.

    Signed-off-by: Baoyou Xie
    Acked-by: Arnd Bergmann
    Signed-off-by: Mark Brown

    Baoyou Xie
     

29 Jun, 2016

1 commit


16 Jan, 2016

1 commit

  • These variables are always used uninitialized:

    drivers/spi/spi-loopback-test.c: In function 'spi_test_run_iter':
    drivers/spi/spi-loopback-test.c:768:17: warning: 'rx_count' may be used uninitialized in this function [-Wmaybe-uninitialized]
    drivers/spi/spi-loopback-test.c:762:17: warning: 'tx_count' may be used uninitialized in this function [-Wmaybe-uninitialized]

    Adding an explicit initialization seems to be the only
    workable solution here, to make the code behave correctly
    and build without warning.

    Fixes: 84e0c4e5e2c4 ("spi: add loopback test driver to allow for spi_master regression tests")
    Signed-off-by: Arnd Bergmann
    Acked-by: Geert Uytterhoeven
    Signed-off-by: Mark Brown

    Arnd Bergmann
     

08 Jan, 2016

1 commit


06 Jan, 2016

3 commits


14 Dec, 2015

2 commits


13 Dec, 2015

1 commit

  • This driver is submitting lots of distinct spi-messages messages
    with all kinds of alignments and length pattern.
    Also distinct kinds of transfer pattern tests are implemented
    (rx, tx, rx/tx, tx+tx, tx+rx,...)

    Right now on a raspberry pi 752 distinct spi_messages are executed
    in 13 different scenarios.

    Configuration of additional test-pattern is easy, so that when
    new bugs in drivers get detected the relevant transfer pattern can
    also get added to the test framework, so that such situations are
    detected in other drivers as well.

    The idea behind this driver is to make it possible to also detect
    regressions in spi_master implementations when changes occur.
    Potentially these tests could get executed automatically in a
    test-server-farm.

    Signed-off-by: Martin Sperl
    Signed-off-by: Mark Brown

    Martin Sperl