02 May, 2015
1 commit
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devm_ioremap_resource() returns ERR_PTR on failure.
Signed-off-by: Axel Lin
Signed-off-by: Mark Brown
21 Apr, 2015
1 commit
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As it turns out, the set_cs() enable parameter refers to the logic level
on the CS pin, not the state of chip selection.This broke functionality of the LEDs behind the CPLD, or at least delayed
the commands until another one came in to toggle CS.Signed-off-by: Bert Vermeulen
Signed-off-by: Mark Brown
18 Apr, 2015
1 commit
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This driver mediates access between the connected CPLD and other devices
on the bus.The m25p80-compatible boot flash and (some models) MMC use regular SPI,
bitbanged as required by the SoC. However the SPI-connected CPLD has
a two-wire mode, in which two bits are transferred per SPI clock
cycle. The second bit is transmitted with the SoC's CS2 pin.Signed-off-by: Bert Vermeulen
Signed-off-by: Mark Brown