28 Jan, 2021
1 commit
-
Since we only support Jailhouse on ARM64, so drop this to avoid
build warning on ARM32Reviewed-by: Dong Aisheng
Signed-off-by: Peng Fan
20 Jan, 2021
6 commits
-
This is the 5.10.9 stable release
* tag 'v5.10.9': (153 commits)
Linux 5.10.9
netfilter: nf_nat: Fix memleak in nf_nat_init
netfilter: conntrack: fix reading nf_conntrack_buckets
...Signed-off-by: Jason Liu
-
This is the 5.10.8 stable release
* tag 'v5.10.8': (104 commits)
Linux 5.10.8
tools headers UAPI: Sync linux/fscrypt.h with the kernel sources
drm/panfrost: Remove unused variables in panfrost_job_close()
...Signed-off-by: Jason Liu
-
This is the 5.10.7 stable release
* tag 'v5.10.7': (144 commits)
Linux 5.10.7
scsi: target: Fix XCOPY NAA identifier lookup
rtlwifi: rise completion at the last step of firmware callback
...Signed-off-by: Jason Liu
-
[ Upstream commit bac717171971176b78c72d15a8b6961764ab197f ]
dtc points out that the interrupts for some devices are not parsable:
picoxcell-pc3x2.dtsi:45.19-49.5: Warning (interrupts_property): /paxi/gem@30000: Missing interrupt-parent
picoxcell-pc3x2.dtsi:51.21-55.5: Warning (interrupts_property): /paxi/dmac@40000: Missing interrupt-parent
picoxcell-pc3x2.dtsi:57.21-61.5: Warning (interrupts_property): /paxi/dmac@50000: Missing interrupt-parent
picoxcell-pc3x2.dtsi:233.21-237.5: Warning (interrupts_property): /rwid-axi/axi2pico@c0000000: Missing interrupt-parentThere are two VIC instances, so it's not clear which one needs to be
used. I found the BSP sources that reference VIC0, so use that:https://github.com/r1mikey/meta-picoxcell/blob/master/recipes-kernel/linux/linux-picochip-3.0/0001-picoxcell-support-for-Picochip-picoXcell-SoC.patch
Acked-by: Jamie Iles
Link: https://lore.kernel.org/r/20201230152010.3914962-1-arnd@kernel.org'
Signed-off-by: Arnd Bergmann
Signed-off-by: Sasha Levin -
[ Upstream commit 7887cc89d5851cbdec49219e9614beec776af150 ]
A too high brightness by default (default is max) makes the
screen go blank. Set this to 15 as in the Vendor tree.Signed-off-by: Linus Walleij
Cc: Stephan Gerhold
Link: https://lore.kernel.org/r/20201214223413.253893-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann
Signed-off-by: Sasha Levin -
[ Upstream commit c0bc969c176b10598b31d5d1a5edf9a5261f0a9f ]
xt875 comes up with a iva voltage of 1375000 and android runs at this too. fix
maximum voltage to be consistent with this.Signed-off-by: Carl Philipp Klemm
Signed-off-by: Tony Lindgren
Signed-off-by: Sasha Levin
17 Jan, 2021
1 commit
-
commit ec76c2eea903947202098090bbe07a739b5246e9 upstream.
On the GTA04A5 od->_driver_status was not set to BUS_NOTIFY_BIND_DRIVER
during probe of the second mmc used for wifi. Therefore
omap_device_late_idle idled the device during probing causing oopses when
accessing the registers.It was not set because od->_state was set to OMAP_DEVICE_STATE_IDLE
in the notifier callback. Therefore set od->_driver_status also in that
case.This came apparent after commit 21b2cec61c04 ("mmc: Set
PROBE_PREFER_ASYNCHRONOUS for drivers that existed in v4.4") causing this
oops:omap_hsmmc 480b4000.mmc: omap_device_late_idle: enabled but no driver. Idling
8] (omap_hsmmc_set_ios+0x11c/0x258)
(omap_hsmmc_set_ios) from [] (mmc_power_up.part.8+0x3c/0xd0)
(mmc_power_up.part.8) from [] (mmc_start_host+0x88/0x9c)
(mmc_start_host) from [] (mmc_add_host+0x58/0x84)
(mmc_add_host) from [] (omap_hsmmc_probe+0x5fc/0x8c0)
(omap_hsmmc_probe) from [] (platform_drv_probe+0x48/0x98)
(platform_drv_probe) from [] (really_probe+0x1dc/0x3b4)Fixes: 04abaf07f6d5 ("ARM: OMAP2+: omap_device: Sync omap_device and pm_runtime after probe defer")
Fixes: 21b2cec61c04 ("mmc: Set PROBE_PREFER_ASYNCHRONOUS for drivers that existed in v4.4")
Acked-by: Ulf Hansson
Signed-off-by: Andreas Kemnade
[tony@atomide.com: left out extra parens, trimmed description stack trace]
Signed-off-by: Tony Lindgren
Signed-off-by: Greg Kroah-Hartman
15 Jan, 2021
1 commit
-
The data of property 'fsl,rcpm-wakeup' is not corrcet, which causing
RCPM driver incorrectly program register IPPDEXPCR1, then flextimer is
wrongly clock gated during system suspend, can't send interrupt to
wake.Signed-off-by: Ran Wang
Acked-by: Li Yang
13 Jan, 2021
3 commits
-
For imx7ulp PM_SUSPEND_MEM mode, all port related register will lost.
This patch add the save/restore operation. This will benefit gpio-irq.
Without this patch, gpio irq can't work after system PM.
This patch depend on the dts file, the sequence of gpio definition must
be gpio_ptc gpio_ptd gpio_pte gpio_ptf.Signed-off-by: Haibo Chen
Acked-by: Jacky Bai -
commit f1dc15cd7fc146107cad2a926d9c1d005f69002a upstream.
AES needs to be disabled on Nokia N950/N9 as well (HS devices), otherwise
kernel fails to boot.Fixes: c312f066314e ("ARM: dts: omap3: Migrate AES from hwmods to sysc-omap2")
Signed-off-by: Aaro Koskinen
Signed-off-by: Tony Lindgren
Signed-off-by: Greg Kroah-Hartman -
[ Upstream commit 87dbc209ea04645fd2351981f09eff5d23f8e2e9 ]
Make mandatory in include/asm-generic/Kbuild and
remove all arch/*/include/asm/local64.h arch-specific files since they
only #include .This fixes build errors on arch/c6x/ and arch/nios2/ for
block/blk-iocost.c.Build-tested on 21 of 25 arch-es. (tools problems on the others)
Yes, we could even rename to
and change all #includes to use
instead.Link: https://lkml.kernel.org/r/20201227024446.17018-1-rdunlap@infradead.org
Signed-off-by: Randy Dunlap
Suggested-by: Christoph Hellwig
Reviewed-by: Masahiro Yamada
Cc: Jens Axboe
Cc: Ley Foon Tan
Cc: Mark Salter
Cc: Aurelien Jacquiot
Cc: Peter Zijlstra
Cc: Arnd Bergmann
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
Signed-off-by: Sasha Levin
06 Jan, 2021
1 commit
-
Current LCDIF pixel clock source comes from osc_24m like below:
lcdif_pixel_src 1 1 0 24000000 0 0 50000
lcdif_pixel_cg 1 1 0 24000000 0 0 50000
lcdif_pixel_pre_div 1 1 0 8000000 0 0 50000
lcdif_pixel_post_div 1 1 0 8000000 0 0 50000
lcdif_pixel_root_clk 1 1 0 8000000 0 0 50000But osc_24m cannot meet LCDIF requirement for different display
modes obviously. So assign the video PLL for its parent and the
clock tree becomes as below:pll_video_main 1 1 1 736000000 0 0 50000
pll_video_main_bypass 1 1 1 736000000 0 0 50000
pll_video_main_clk 1 1 1 736000000 0 0 50000
pll_video_test_div 1 1 2 184000000 0 0 50000
pll_video_post_div 1 1 1 46000000 0 0 50000
lcdif_pixel_src 1 1 0 46000000 0 0 50000
lcdif_pixel_cg 1 1 0 46000000 0 0 50000
lcdif_pixel_pre_div 1 1 0 9200000 0 0 50000
lcdif_pixel_post_div 1 1 0 9200000 0 0 50000
lcdif_pixel_root_clk 1 1 0 9200000 0 0 50000Signed-off-by: Fancy Fang
Reviewed-by: Robby Cai
04 Jan, 2021
2 commits
-
This is the 5.10.4 stable release
* tag 'v5.10.4': (717 commits)
Linux 5.10.4
x86/CPU/AMD: Save AMD NodeId as cpu_die_id
drm/edid: fix objtool warning in drm_cvt_modes()
...Signed-off-by: Jason Liu
Conflicts:
drivers/gpu/drm/imx/dcss/dcss-plane.c
drivers/media/i2c/ov5640.c -
This is the 5.10.3 stable release
* tag 'v5.10.3': (41 commits)
Linux 5.10.3
md: fix a warning caused by a race between concurrent md_ioctl()s
nl80211: validate key indexes for cfg80211_registered_device
...Signed-off-by: Jason Liu
30 Dec, 2020
21 commits
-
commit bd7cd7e05a42491469ca19861da44abc3168cf5f upstream.
Commit 9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver
(Tegra30 supported now)") update the Tegra20 CPUFREQ driver to use the
generic CPUFREQ device-tree driver. Since this change CPUFREQ support
on the Tegra20 Ventana platform has been broken because the necessary
device-tree nodes with the operating point information are not populated
for this platform. Fix this by updating device-tree for Venata to
include the operating point informration for Tegra20.Fixes: 9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now)")
Cc: stable@vger.kernel.org
Signed-off-by: Jon Hunter
Signed-off-by: Thierry Reding
Signed-off-by: Greg Kroah-Hartman -
commit 85b8350ae99d1300eb6dc072459246c2649a8e50 upstream.
CAN0 and CAN1 instances share the same message ram configured
at 0x210000 on sama5d2 Linux systems.
According to current configuration of CAN0, we need 0x1c00 bytes
so that the CAN1 don't overlap its message ram:
64 x RX FIFO0 elements => 64 x 72 bytes
32 x TXE (TX Event FIFO) elements => 32 x 8 bytes
32 x TXB (TX Buffer) elements => 32 x 72 bytes
So a total of 7168 bytes (0x1C00).Fix offset to match this needed size.
Make the CAN0 message ram ioremap match exactly this size so that is
easily understandable. Adapt CAN1 size accordingly.Fixes: bc6d5d7666b7 ("ARM: dts: at91: sama5d2: add m_can nodes")
Reported-by: Dan Sneddon
Signed-off-by: Nicolas Ferre
Signed-off-by: Alexandre Belloni
Tested-by: Cristian Birsan
Cc: stable@vger.kernel.org # v4.13+
Link: https://lore.kernel.org/r/20201203091949.9015-1-nicolas.ferre@microchip.com
Signed-off-by: Greg Kroah-Hartman -
commit df9dbaf2c415cd94ad520067a1eccfee62f00a33 upstream.
The pinmux control register offset passed to OMAP4_IOPAD is odd.
Fixes: ab9a13665e7c ("ARM: dts: pandaboard: add gpio user button")
Cc: stable@vger.kernel.org
Signed-off-by: H. Nikolaus Schaller
Signed-off-by: Tony Lindgren
Signed-off-by: Greg Kroah-Hartman -
commit f3456b9fd269c6d0c973b136c5449d46b2510f4b upstream.
ARM Cortex-A57 and Cortex-A72 cores running in 32-bit mode are affected
by silicon errata #1742098 and #1655431, respectively, where the second
instruction of a AES instruction pair may execute twice if an interrupt
is taken right after the first instruction consumes an input register of
which a single 32-bit lane has been updated the last time it was modified.This is not such a rare occurrence as it may seem: in counter mode, only
the least significant 32-bit word is incremented in the absence of a
carry, which makes our counter mode implementation susceptible to these
errata.So let's shuffle the counter assignments around a bit so that the most
recent updates when the AES instruction pair executes are 128-bit wide.[0] ARM-EPM-049219 v23 Cortex-A57 MPCore Software Developers Errata Notice
[1] ARM-EPM-012079 v11.0 Cortex-A72 MPCore Software Developers Errata NoticeCc: # v5.4+
Signed-off-by: Ard Biesheuvel
Signed-off-by: Herbert Xu
Signed-off-by: Greg Kroah-Hartman -
[ Upstream commit 1ecec38547d415054fdb63a231234f44396b6d06 ]
The dbgadtb macro is passed the size of the appended DTB, not the end
address.Fixes: c03e41470e901123 ("ARM: 9010/1: uncompress: Print the location of appended DTB")
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Linus Walleij
Signed-off-by: Russell King
Signed-off-by: Sasha Levin -
[ Upstream commit 3cce9d44321e460e7c88cdec4e4537a6e9ad7c0d ]
Commit f77ac2e378be9dd6 ("ARM: 9030/1: entry: omit FP emulation for UND
exceptions taken in kernel mode") failed to take into account that there
is in fact a case where we relied on this code path: during boot, the
VFP detection code issues a read of FPSID, which will trigger an undef
exception on cores that lack VFP support.So let's reinstate this logic using an undef hook which is registered
only for the duration of the initcall to vpf_init(), and which sets
VFP_arch to a non-zero value - as before - if no VFP support is present.Fixes: f77ac2e378be9dd6 ("ARM: 9030/1: entry: omit FP emulation for UND ...")
Reported-by: "kernelci.org bot"
Signed-off-by: Ard Biesheuvel
Signed-off-by: Russell King
Signed-off-by: Sasha Levin -
[ Upstream commit f77ac2e378be9dd61eb88728f0840642f045d9d1 ]
There are a couple of problems with the exception entry code that deals
with FP exceptions (which are reported as UND exceptions) when building
the kernel in Thumb2 mode:
- the conditional branch to vfp_kmode_exception in vfp_support_entry()
may be out of range for its target, depending on how the linker decides
to arrange the sections;
- when the UND exception is taken in kernel mode, the emulation handling
logic is entered via the 'call_fpe' label, which means we end up using
the wrong value/mask pairs to match and detect the NEON opcodes.Since UND exceptions in kernel mode are unlikely to occur on a hot path
(as opposed to the user mode version which is invoked for VFP support
code and lazy restore), we can use the existing undef hook machinery for
any kernel mode instruction emulation that is needed, including calling
the existing vfp_kmode_exception() routine for unexpected cases. So drop
the call to call_fpe, and instead, install an undef hook that will get
called for NEON and VFP instructions that trigger an UND exception in
kernel mode.While at it, make sure that the PC correction is accurate for the
execution mode where the exception was taken, by checking the PSR
Thumb bit.Cc: Dmitry Osipenko
Cc: Kees Cook
Fixes: eff8728fe698 ("vmlinux.lds.h: Add PGO and AutoFDO input sections")
Signed-off-by: Ard Biesheuvel
Reviewed-by: Linus Walleij
Reviewed-by: Nick Desaulniers
Signed-off-by: Russell King
Signed-off-by: Sasha Levin -
[ Upstream commit 656ab1bdcd2b755dc161a9774201100d5bf74b8d ]
According to the datasheet (Rev. 1.9) the RTL8211F requires at least
72ms "for internal circuits settling time" before accessing the PHY
registers. On similar boards with the same PHY this fixes an issue where
Ethernet link would not come up when using ip link set down/up.Fixes: a2c6e82e5341 ("ARM: dts: meson: switch to the generic Ethernet PHY reset bindings")
Reviewed-by: Martin Blumenstingl
Tested-by: Martin Blumenstingl # on Odroid-C1+
Signed-off-by: Stefan Agner
Signed-off-by: Kevin Hilman
Link: https://lore.kernel.org/r/ff78772b306411e145769c46d4090554344db41e.1607363522.git.stefan@agner.ch
Signed-off-by: Sasha Levin -
[ Upstream commit 9b5dcc8d427e2bcb84c49eb03ffefe11e7537a55 ]
Due to strobe signal not being propagated from CPU to securam
the securam needs to be mapped as device or strongly ordered memory
to work properly. Otherwise, updating to one offset may affect
the adjacent locations in securam.Fixes: d4ce5f44d4409 ("ARM: dts: at91: sama5d2: Add securam node")
Signed-off-by: Claudiu Beznea
Signed-off-by: Alexandre Belloni
Acked-by: Nicolas Ferre
Link: https://lore.kernel.org/r/1606903025-14197-3-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Sasha Levin -
[ Upstream commit ab8a9bb41b2c330a0b280280bf37b6f3b1dd1e58 ]
atmel,osc-bypass property sets the bit 1 at main oscillator register.
On SAM9X60 this bit is not valid according to datasheet (chapter
28.16.9 PMC Clock Generator Main Oscillator Register).Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board")
Signed-off-by: Claudiu Beznea
Signed-off-by: Alexandre Belloni
Acked-by: Nicolas Ferre
Cc: Marco Cardellini
Link: https://lore.kernel.org/r/1606903025-14197-2-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Sasha Levin -
[ Upstream commit 851a95da583c26e2ddeb7281e9b61f0d76ea5aba ]
The triggers for the ADC were taken from at91sam9260 dtsi but are not
correct.Fixes: a4c1d6c75822 ("ARM: at91/dt: sam9rl: add lcd, adc, usb gadget and pwm support")
Signed-off-by: Alexandre Belloni
Link: https://lore.kernel.org/r/20201128222818.1910764-10-alexandre.belloni@bootlin.com
Signed-off-by: Sasha Levin -
[ Upstream commit 7f24479ead579459106bb55c2320a000135731f9 ]
The switches with integrated CPUs have only got a single i2c controller.
They incorrectly gained one when they were split from the Armada-XP.Fixes: 43e28ba87708 ("ARM: dts: Use armada-370-xp as a base for armada-xp-98dx3236")
Signed-off-by: Chris Packham
Reviewed-by: Andrew Lunn
Signed-off-by: Gregory CLEMENT
Signed-off-by: Sasha Levin -
[ Upstream commit e1062fa7292f1e3744db0a487c4ac0109e09b03d ]
The pincontrol node is needed for USB Host since Linux v5.7-rc1. Without
it the driver probes but VBus is not powered because of wrong pincontrol
configuration.Fixes: b7c2b61570798 ("ARM: at91: add Atmel's SAMA5D3 Xplained board")
Signed-off-by: Cristian Birsan
Signed-off-by: Alexandre Belloni
Acked-by: Ludovic Desroches
Link: https://lore.kernel.org/r/20201118120019.1257580-4-cristian.birsan@microchip.com
Signed-off-by: Sasha Levin -
[ Upstream commit be4dd2d448816a27c1446f8f37fce375daf64148 ]
The pincontrol node is needed for USB Host since Linux v5.7-rc1. Without
it the driver probes but VBus is not powered because of wrong pincontrol
configuration.Fixes: 38153a017896f ("ARM: at91/dt: sama5d4: add dts for sama5d4 xplained board")
Signed-off-by: Cristian Birsan
Signed-off-by: Alexandre Belloni
Acked-by: Ludovic Desroches
Link: https://lore.kernel.org/r/20201118120019.1257580-3-cristian.birsan@microchip.com
Signed-off-by: Sasha Levin -
[ Upstream commit 5ba6291086d2ae8006be9e0f19bf2001a85c9dc1 ]
The pincontrol node is needed for USB Host since Linux v5.7-rc1. Without
it the driver probes but VBus is not powered because of wrong pincontrol
configuration.Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board")
Signed-off-by: Cristian Birsan
Signed-off-by: Alexandre Belloni
Acked-by: Ludovic Desroches
Link: https://lore.kernel.org/r/20201118120019.1257580-2-cristian.birsan@microchip.com
Signed-off-by: Sasha Levin -
[ Upstream commit cbee028da69d31cb927142e2828710de55a49f2a ]
The mismatch lead to a miscalculation of regions in another patch, and
shouldn't be mismatched anyway, so make them consistent.Fixes: 575640201e66 ("ARM: dts: aspeed: tacoma: Use 64MB for firmware memory")
Signed-off-by: Andrew Jeffery
Reviewed-by: Joel Stanley
Link: https://lore.kernel.org/r/20201022014731.2035438-2-andrew@aj.id.au
Signed-off-by: Joel Stanley
Signed-off-by: Sasha Levin -
[ Upstream commit a2715fbdc6fc387e85211df917a4778761ec693d ]
Loading the module deadlocks since:
-local cbc(aes) implementation needs a fallback and
-crypto API tries to find one but the request_module() resolves back to
the same moduleFix this by changing the module alias for cbc(aes) and
using the NEED_FALLBACK flag when requesting for a fallback algorithm.Fixes: 00b99ad2bac2 ("crypto: arm/aes-neonbs - Use generic cbc encryption path")
Signed-off-by: Horia Geantă
Signed-off-by: Herbert Xu
Signed-off-by: Sasha Levin -
[ Upstream commit 14f100c00f1e35e5890340d4c6a64bda5dff4320 ]
Removed vuart for facebook tiogapass platform as it uses uart2 and
uart3 pin with aspeed uart routing feature.Signed-off-by: Vijay Khemka
Reviewed-by: Joel Stanley
Fixes: ffdbf494821d ("ARM: dts: aspeed: tiogapass: Enable VUART")
Link: https://lore.kernel.org/r/20200813190431.3331026-1-vijaykhemka@fb.com
Signed-off-by: Joel Stanley
Signed-off-by: Sasha Levin -
[ Upstream commit 4e79f0211b473f8e1eab8211a9fd50cc41a3a061 ]
When running in BE mode on LPAE hardware with a PA-to-VA translation
that exceeds 4 GB, we patch bits 39:32 of the offset into the wrong
byte of the opcode. So fix that, by rotating the offset in r0 to the
right by 8 bits, which will put the 8-bit immediate in bits 31:24.Note that this will also move bit #22 in its correct place when
applying the rotation to the constant #0x400000.Fixes: d9a790df8e984 ("ARM: 7883/1: fix mov to mvn conversion in case of 64 bit phys_addr_t and BE")
Acked-by: Nicolas Pitre
Reviewed-by: Linus Walleij
Signed-off-by: Ard Biesheuvel
Signed-off-by: Sasha Levin -
[ Upstream commit 9e1cc9679776f5b9e42481d392b1550753ebd084 ]
The VGA memory region is always from the top of RAM. On this board, that
is 0x80000000 + 0x20000000 - 0x01000000 = 0x9f000000.This was not an issue in practice as the region is "reserved" by the
vendor's u-boot reducing the amount of available RAM, and the only user
is the host VGA device poking at RAM over PCIe. That is, nothing from
the ARM touches it.It is worth fixing as developers copy existing device trees when
building their machines, and the XDMA driver does use the memory region
from the ARM side.Fixes: c4043ecac34a ("ARM: dts: aspeed: Add S2600WF BMC Machine")
Reported-by: John Wang
Link: https://lore.kernel.org/r/20200922064234.163799-1-joel@jms.id.au
Signed-off-by: Joel Stanley
Signed-off-by: Sasha Levin -
[ Upstream commit 886f82ce9f1f4559c139fdb2d79d158999ca38cd ]
The GPIO controller is a GPIO controller followed by some SGPIO
controllers, which are a different type of device with their own binding
and drivers.Make the gpio node cover the only conventional GPIO controller.
Fixes: 8dbcb5b709b9 ("ARM: dts: aspeed-g6: Add gpio devices")
Signed-off-by: Billy Tsai
Reviewed-by: Andrew Jeffery
Reviewed-by: Joel Stanley
Link: https://lore.kernel.org/r/20201012033150.21056-2-billy_tsai@aspeedtech.com
Signed-off-by: Joel Stanley
Signed-off-by: Sasha Levin
28 Dec, 2020
1 commit
-
When lcdif fb is disabled, epdc fb would be the primary framebuffer (/dev/fb0).
Yocto will search and act on primary buffer and actually it doesn't have good
support for epdc fb, and besides, this is not a requirement for epdc fb.
So, we disable epdc here.Signed-off-by: Robby Cai
Reviewed-by: Sherry Sun
26 Dec, 2020
3 commits
-
commit bd7e7ff56feea7810df900fb09c9741d259861d9 upstream.
On Odroid XU LDO12 and LDO15 supplies the power to USB 3.0 blocks but
the GPK GPIO pins are supplied by LDO7 (VDDQ_LCD). LDO7 also supplies
GPJ GPIO pins.The Exynos pinctrl driver does not take any supplies, so to have entire
GPIO block always available, make the regulator always on.Fixes: 88644b4c750b ("ARM: dts: exynos: Configure PWM, usb3503, PMIC and thermal on Odroid XU board")
Signed-off-by: Krzysztof Kozlowski
Cc:
Link: https://lore.kernel.org/r/20201015182044.480562-3-krzk@kernel.org
Tested-by: Gabriel Ribba Esteva
Signed-off-by: Greg Kroah-Hartman -
commit 3d992fd8f4e0f09c980726308d2f2725587b32d6 upstream.
The VBUS control (PWREN) and over-current pins of USB 3.0 DWC3
controllers are on Exynos5410 regular GPIOs. This is different than for
example on Exynos5422 where these are special ETC pins with proper reset
values (pulls, functions).Therefore these pins should be configured to enable proper USB 3.0
peripheral and host modes. This also fixes over-current warning:[ 6.024658] usb usb4-port1: over-current condition
[ 6.028271] usb usb3-port1: over-current conditionFixes: cb0896562228 ("ARM: dts: exynos: Add USB to Exynos5410")
Signed-off-by: Krzysztof Kozlowski
Cc:
Link: https://lore.kernel.org/r/20201015182044.480562-2-krzk@kernel.org
Tested-by: Gabriel Ribba Esteva
Signed-off-by: Greg Kroah-Hartman -
commit ecc1ff532b499d20304a4f682247137025814c34 upstream.
On Odroid XU board the USB3-0 port is a microUSB and USB3-1 port is USB
type A (host). The roles were copied from Odroid XU3 (Exynos5422)
design which has it reversed.Fixes: 8149afe4dbf9 ("ARM: dts: exynos: Add initial support for Odroid XU board")
Signed-off-by: Krzysztof Kozlowski
Cc:
Link: https://lore.kernel.org/r/20201015182044.480562-1-krzk@kernel.org
Tested-by: Gabriel Ribba Esteva
Signed-off-by: Greg Kroah-Hartman
