07 Oct, 2020
1 commit
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Some of the pins were not exposed in the initial driver or kept as
reserved. Exposing all of them now.Signed-off-by: Shyam Sundar S K
Link: https://lore.kernel.org/r/20201007111220.744348-1-Shyam-sundar.S-k@amd.com
Signed-off-by: Linus Walleij
22 Jun, 2020
1 commit
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uart0_pins is defined as:
static const unsigned uart0_pins[] = {135, 136, 137, 138, 139};which npins is wronly specified as 9 later
{
.name = "uart0",
.pins = uart0_pins,
.npins = 9,
},npins should be 5 instead of 9 according to the definition.
Signed-off-by: Jacky Hu
Link: https://lore.kernel.org/r/20200616015024.287683-1-hengqing.hu@gmail.com
Signed-off-by: Linus Walleij
05 Jun, 2019
1 commit
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Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms and conditions of the gnu general public license
version 2 as published by the free software foundationextracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 101 file(s).
Signed-off-by: Thomas Gleixner
Reviewed-by: Allison Randal
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190531190113.822954939@linutronix.de
Signed-off-by: Greg Kroah-Hartman
30 Jul, 2018
1 commit
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According to the AMD BKDG, the GPIO ActiveLevel bits (10:9) map to:
00 Active High
01 Active Low
10 Active on both edges iff LevelTrig (bit 8) == 0
11 ReservedThe current code has a bug where it interprets 00 => Active Low, and
01 => Active High.Fix the bug, restrict "Active on both" to just the edge trigger case, and
refactor a bit to make the logic more readable.Signed-off-by: Daniel Kurtz
Signed-off-by: Linus Walleij
12 Sep, 2017
1 commit
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The touchpad in the Asus laptop models X505BA/BP and X542BA/BP is
unresponsive after suspend/resume. The following error appears during
resume:i2c_hid i2c-ELAN1300:00: failed to reset device.
The problem here is that i2c_hid does not notice the interrupt being
generated at this point, because the GPIO is no longer configured
for interrupts.Fix this by saving pinctrl-amd pin registers during suspend and
restoring them at resume time.Based on code from pinctrl-intel.
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Drake
Signed-off-by: Linus Walleij
16 Mar, 2017
1 commit
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The amd pinctrl drivers currently implement an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel. Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.Signed-off-by: Julia Cartwright
Signed-off-by: Linus Walleij
28 Dec, 2016
1 commit
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This patch adds support for new Bank and adds IRQCHIP_SKIP_SET_WAKE flag.
Reviewed-by: S-k, Shyam-sundar
Signed-off-by: Nehal Shah
Signed-off-by: Linus Walleij
07 Apr, 2015
1 commit
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recognized by static analysis tool smatch. Declare constant
Variables with Sparse's suggestion.Signed-off-by: Ken Xue
Signed-off-by: Linus Walleij
18 Mar, 2015
1 commit
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KERNCZ GPIO is a new IP from AMD. it can be implemented in both x86 and ARM.
Current driver patch only support GPIO in x86.Signed-off-by: Ken Xue
[Moved back to header]
Signed-off-by: Linus Walleij