18 Aug, 2011

1 commit


20 Apr, 2011

1 commit


19 Jul, 2010

1 commit

  • The phy_mii_ioctl() function unnecessarily throws away the original ifreq.
    We need access to the ifreq in order to support PHYs that can perform
    hardware time stamping.

    Two maverick drivers filter the ioctl commands passed to phy_mii_ioctl().
    This is unnecessary since phylib will check the command in any case.

    Signed-off-by: Richard Cochran
    Signed-off-by: David S. Miller

    Richard Cochran
     

04 Apr, 2010

1 commit


30 May, 2009

1 commit

  • This patch converts unicast address list to standard list_head using
    previously introduced struct netdev_hw_addr. It also relaxes the
    locking. Original spinlock (still used for multicast addresses) is not
    needed and is no longer used for a protection of this list. All
    reading and writing takes place under rtnl (with no changes).

    I also removed a possibility to specify the length of the address
    while adding or deleting unicast address. It's always dev->addr_len.

    The convertion touched especially e1000 and ixgbe codes when the
    change is not so trivial.

    Signed-off-by: Jiri Pirko

    drivers/net/bnx2.c | 13 +--
    drivers/net/e1000/e1000_main.c | 24 +++--
    drivers/net/ixgbe/ixgbe_common.c | 14 ++--
    drivers/net/ixgbe/ixgbe_common.h | 4 +-
    drivers/net/ixgbe/ixgbe_main.c | 6 +-
    drivers/net/ixgbe/ixgbe_type.h | 4 +-
    drivers/net/macvlan.c | 11 +-
    drivers/net/mv643xx_eth.c | 11 +-
    drivers/net/niu.c | 7 +-
    drivers/net/virtio_net.c | 7 +-
    drivers/s390/net/qeth_l2_main.c | 6 +-
    drivers/scsi/fcoe/fcoe.c | 16 ++--
    include/linux/netdevice.h | 18 ++--
    net/8021q/vlan.c | 4 +-
    net/8021q/vlan_dev.c | 10 +-
    net/core/dev.c | 195 +++++++++++++++++++++++++++-----------
    net/dsa/slave.c | 10 +-
    net/packet/af_packet.c | 4 +-
    18 files changed, 227 insertions(+), 137 deletions(-)
    Signed-off-by: David S. Miller

    Jiri Pirko
     

22 Mar, 2009

2 commits

  • The initial version of the DSA driver only supported a single switch
    chip per network interface, while DSA-capable switch chips can be
    interconnected to form a tree of switch chips. This patch adds support
    for multiple switch chips on a network interface.

    An example topology for a 16-port device with an embedded CPU is as
    follows:

    +-----+ +--------+ +--------+
    | |eth0 10| switch |9 10| switch |
    | CPU +----------+ +-------+ |
    | | | chip 0 | | chip 1 |
    +-----+ +---++---+ +---++---+
    || ||
    || ||
    ||1000baseT ||1000baseT
    ||ports 1-8 ||ports 9-16

    This requires a couple of interdependent changes in the DSA layer:

    - The dsa platform driver data needs to be extended: there is still
    only one netdevice per DSA driver instance (eth0 in the example
    above), but each of the switch chips in the tree needs its own
    mii_bus device pointer, MII management bus address, and port name
    array. (include/net/dsa.h) The existing in-tree dsa users need
    some small changes to deal with this. (arch/arm)

    - The DSA and Ethertype DSA tagging modules need to be extended to
    use the DSA device ID field on receive and demultiplex the packet
    accordingly, and fill in the DSA device ID field on transmit
    according to which switch chip the packet is heading to.
    (net/dsa/tag_{dsa,edsa}.c)

    - The concept of "CPU port", which is the switch chip port that the
    CPU is connected to (port 10 on switch chip 0 in the example), needs
    to be extended with the concept of "upstream port", which is the
    port on the switch chip that will bring us one hop closer to the CPU
    (port 10 for both switch chips in the example above).

    - The dsa platform data needs to specify which ports on which switch
    chips are links to other switch chips, so that we can enable DSA
    tagging mode on them. (For inter-switch links, we always use
    non-EtherType DSA tagging, since it has lower overhead. The CPU
    link uses dsa or edsa tagging depending on what the 'root' switch
    chip supports.) This is done by specifying "dsa" for the given
    port in the port array.

    - The dsa platform data needs to be extended with information on via
    which port to reach any given switch chip from any given switch chip.
    This info is specified via the per-switch chip data struct ->rtable[]
    array, which gives the nexthop ports for each of the other switches
    in the tree.

    For the example topology above, the dsa platform data would look
    something like this:

    static struct dsa_chip_data sw[2] = {
    {
    .mii_bus = &foo,
    .sw_addr = 1,
    .port_names[0] = "p1",
    .port_names[1] = "p2",
    .port_names[2] = "p3",
    .port_names[3] = "p4",
    .port_names[4] = "p5",
    .port_names[5] = "p6",
    .port_names[6] = "p7",
    .port_names[7] = "p8",
    .port_names[9] = "dsa",
    .port_names[10] = "cpu",
    .rtable = (s8 []){ -1, 9, },
    }, {
    .mii_bus = &foo,
    .sw_addr = 2,
    .port_names[0] = "p9",
    .port_names[1] = "p10",
    .port_names[2] = "p11",
    .port_names[3] = "p12",
    .port_names[4] = "p13",
    .port_names[5] = "p14",
    .port_names[6] = "p15",
    .port_names[7] = "p16",
    .port_names[10] = "dsa",
    .rtable = (s8 []){ 10, -1, },
    },
    },

    static struct dsa_platform_data pd = {
    .netdev = &foo,
    .nr_switches = 2,
    .sw = sw,
    };

    Signed-off-by: Lennert Buytenhek
    Tested-by: Gary Thomas
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     
  • ..so that we can parse the DSA topology from 'ip link' output:

    1: lo: mtu 16436 qdisc noqueue
    2: eth0: mtu 1500 qdisc pfifo_fast qlen 1000
    3: eth1: mtu 1500 qdisc pfifo_fast qlen 1000
    4: lan1@eth0: mtu 1500 qdisc noqueue
    5: lan2@eth0: mtu 1500 qdisc noqueue
    6: lan3@eth0: mtu 1500 qdisc noqueue
    7: lan4@eth0: mtu 1500 qdisc noqueue

    Signed-off-by: Lennert Buytenhek
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     

07 Jan, 2009

1 commit


12 Nov, 2008

1 commit


11 Nov, 2008

2 commits

  • Before commit b6c40d68ff6498b7f63ddf97cf0aa818d748dee7 ("net: only
    invoke dev->change_rx_flags when device is UP"), the dsa driver could
    sort-of get away with only fiddling with the master interface's
    allmulti/promisc counts in ->change_rx_flags() and not touching them
    in ->open() or ->stop(). After this commit (note that it was merged
    almost simultaneously with the dsa patches, which is why this wasn't
    caught initially), the breakage that was already there became more
    apparent.

    Since it makes no sense to keep the master interface's allmulti or
    promisc count pinned for a slave interface that is down, copy the vlan
    driver's sync logic (which does exactly what we want) over to dsa to
    fix this.

    Bug report from Dirk Teurlings and Peter van Valderen
    .

    Signed-off-by: Lennert Buytenhek
    Tested-by: Dirk Teurlings
    Tested-by: Peter van Valderen
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     
  • Acked-by: Marcel Holtmann
    Acked-by: Greg Kroah-Hartman
    Signed-off-by: Kay Sievers
    Signed-off-by: David S. Miller

    Kay Sievers
     

09 Oct, 2008

3 commits

  • This adds support for the Trailer switch tagging format. This is
    another tagging that doesn't explicitly mark tagged packets with a
    distinct ethertype, so that we need to add a similar hack in the
    receive path as for the Original DSA tagging format.

    Signed-off-by: Lennert Buytenhek
    Tested-by: Byron Bradley
    Tested-by: Tim Ellis
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     
  • Most of the DSA switches currently in the field do not support the
    Ethertype DSA tagging format that one of the previous patches added
    support for, but only the original DSA tagging format.

    The original DSA tagging format carries the same information as the
    Ethertype DSA tagging format, but with the difference that it does not
    have an ethertype field. In other words, when receiving a packet that
    is tagged with an original DSA tag, there is no way of telling in
    eth_type_trans() that this packet is in fact a DSA-tagged packet.

    This patch adds a hook into eth_type_trans() which is only compiled in
    if support for a switch chip that doesn't support Ethertype DSA is
    selected, and which checks whether there is a DSA switch driver
    instance attached to this network device which uses the old tag format.
    If so, it sets the protocol field to ETH_P_DSA without looking at the
    packet, so that the packet ends up in the right place.

    Signed-off-by: Lennert Buytenhek
    Tested-by: Nicolas Pitre
    Tested-by: Peter van Valderen
    Tested-by: Dirk Teurlings
    Signed-off-by: David S. Miller

    Lennert Buytenhek
     
  • Distributed Switch Architecture is a protocol for managing hardware
    switch chips. It consists of a set of MII management registers and
    commands to configure the switch, and an ethernet header format to
    signal which of the ports of the switch a packet was received from
    or is intended to be sent to.

    The switches that this driver supports are typically embedded in
    access points and routers, and a typical setup with a DSA switch
    looks something like this:

    +-----------+ +-----------+
    | | RGMII | |
    | +-------+ +------ 1000baseT MDI ("WAN")
    | | | 6-port +------ 1000baseT MDI ("LAN1")
    | CPU | | ethernet +------ 1000baseT MDI ("LAN2")
    | |MIImgmt| switch +------ 1000baseT MDI ("LAN3")
    | +-------+ w/5 PHYs +------ 1000baseT MDI ("LAN4")
    | | | |
    +-----------+ +-----------+

    The switch driver presents each port on the switch as a separate
    network interface to Linux, polls the switch to maintain software
    link state of those ports, forwards MII management interface
    accesses to those network interfaces (e.g. as done by ethtool) to
    the switch, and exposes the switch's hardware statistics counters
    via the appropriate Linux kernel interfaces.

    This initial patch supports the MII management interface register
    layout of the Marvell 88E6123, 88E6161 and 88E6165 switch chips, and
    supports the "Ethertype DSA" packet tagging format.

    (There is no officially registered ethertype for the Ethertype DSA
    packet format, so we just grab a random one. The ethertype to use
    is programmed into the switch, and the switch driver uses the value
    of ETH_P_EDSA for this, so this define can be changed at any time in
    the future if the one we chose is allocated to another protocol or
    if Ethertype DSA gets its own officially registered ethertype, and
    everything will continue to work.)

    Signed-off-by: Lennert Buytenhek
    Tested-by: Nicolas Pitre
    Tested-by: Byron Bradley
    Tested-by: Tim Ellis
    Tested-by: Peter van Valderen
    Tested-by: Dirk Teurlings
    Signed-off-by: David S. Miller

    Lennert Buytenhek