14 Feb, 2020
1 commit
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Add the gxl ACODEC clock id to the gxbb clock controller bindings
Acked-by: Neil Armstrong
Signed-off-by: Jerome Brunet
23 Nov, 2018
1 commit
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Add the video clock bindings covering all the video graphics pipeline
and the HDMI controller.Signed-off-by: Neil Armstrong
Acked-by: Jerome Brunet
Link: http://lkml.kernel.org/r/1541516257-16157-4-git-send-email-narmstrong@baylibre.com
09 Jul, 2018
1 commit
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Expose GEN_CLK clock id
Signed-off-by: Jerome Brunet
25 Apr, 2018
1 commit
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Export video decoder clock dt-bindings
Signed-off-by: Maxime Jourdan
[added commit description]
Signed-off-by: Jerome Brunet
18 Nov, 2017
1 commit
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Pull clk updates from Stephen Boyd:
"We have two changes to the core framework this time around.The first being a large change that introduces runtime PM support to
the clk framework. Now we properly call runtime PM operations on the
device providing a clk when the clk is in use. This helps on SoCs
where the clks provided by a device need something to be powered on
before using the clks, like power domains or regulators. It also helps
power those things down when clks aren't in use.The other core change is a devm API addition for clk providers so we
can get rid of a bunch of clk driver remove functions that are just
doing of_clk_del_provider().Outside of the core, we have the usual addition of clk drivers and
smattering of non-critical fixes to existing drivers. The biggest diff
is support for Mediatek MT2712 and MT7622 SoCs, but those patches
really just add a bunch of data.By the way, we're trying something new here where we build the tree up
with topic branches. We plan to work this into our workflow so that we
don't step on each other's toes, and so the fixes branch can be merged
on an as-needed basis.Summary:
Core:
- runtime PM support for clk providers
- devm API for of_clk_add_hw_provider()New Drivers:
- Mediatek MT2712 and MT7622
- Renesas R-Car V3M SoCUpdates:
- runtime PM support for Samsung exynos5433/exynos4412 providers
- removal of clkdev aliases on Samsung SoCs
- convert clk-gpio to use gpio descriptors
- various driver cleanups to match kernel coding style
- Amlogic Video Processing Unit VPU and VAPB clks
- sigma-delta modulation for Allwinner audio PLLs
- Allwinner A83t Display clks
- support for the second display unit clock on Renesas RZ/G1E
- suspend/resume support for Renesas R-Car Gen3 CPG/MSSR
- new clock ids for Rockchip rk3188 and rk3368 SoCs
- various 'const' markings on clk_ops structures
- RPM clk support on Qualcomm MSM8996/MSM8660 SoCs"* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (137 commits)
clk: stm32h7: fix test of clock config
clk: pxa: fix building on older compilers
clk: sunxi-ng: a83t: Fix i2c buses bits
clk: ti: dra7-atl-clock: fix child-node lookups
clk: qcom: common: fix legacy board-clock registration
clk: uniphier: fix DAPLL2 clock rate of Pro5
clk: uniphier: fix parent of miodmac clock data
clk: hi3798cv200: correct parent mux clock for 'clk_sdio0_ciu'
clk: hisilicon: Delete an error message for a failed memory allocation in hisi_register_clkgate_sep()
clk: hi3660: fix incorrect uart3 clock freqency
clk: kona-setup: Delete error messages for failed memory allocations
ARC: clk: fix spelling mistake: "configurarion" -> "configuration"
clk: cdce925: remove redundant check for non-null parent_name
clk: versatile: Improve sizeof() usage
clk: versatile: Delete error messages for failed memory allocations
clk: ux500: Improve sizeof() usage
clk: ux500: Delete error messages for failed memory allocations
clk: spear: Delete error messages for failed memory allocations
clk: ti: Delete error messages for failed memory allocations
clk: mmp: Adjust checks for NULL pointers
...
02 Nov, 2017
1 commit
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Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.By default all files without license information are under the default
license of the kernel, which is GPL version 2.Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if
Reviewed-by: Philippe Ombredanne
Reviewed-by: Thomas Gleixner
Signed-off-by: Greg Kroah-Hartman
20 Oct, 2017
1 commit
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Add the clkids for the clocks feeding the Video Processing Unit.
Acked-by: Jerome Brunet
Signed-off-by: Neil Armstrong
04 Aug, 2017
2 commits
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Add the clkids for the clocks feeding the input0 of the mmc controllers
Signed-off-by: Jerome Brunet
Signed-off-by: Neil Armstrong -
Expose all clocks which maybe used as DT bindings
Only clock ids internal the controller remain un-exposedAcked-by: Neil Armstrong
Acked-by: Arnd Bergmann
Signed-off-by: Jerome Brunet
Signed-off-by: Neil Armstrong
29 May, 2017
6 commits
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The CPU clock defined in the Meson GX clock driver is actually a
left-over from the Meson8b clock controller. Un-export the clock so we
can remove it from the driver.Signed-off-by: Martin Blumenstingl
Signed-off-by: Jerome Brunet -
Expose the clock ids of the three none AO uarts to the dt-bindings
Acked-by: Neil Armstrong
Signed-off-by: Helmut Klein
Signed-off-by: Neil Armstrong
[tidy the commit message to match similar change]
Signed-off-by: Jerome Brunet -
Expose the SPICC gate clock to enable the SPICC controller.
Acked-by: Jerome Brunet
Signed-off-by: Neil Armstrong
[tidy commit message to match similar changes]
Signed-off-by: Jerome Brunet -
Expose the spdif master clock and the mux to select the appropriate spdif
clock parent depending on the data source.Acked-by: Michael Turquette
Signed-off-by: Jerome Brunet -
Expose cts_amclk in the device tree bindings
Acked-by: Michael Turquette
Signed-off-by: Jerome Brunet -
Expose the clock gates required for the spdif output
Acked-by: Michael Turquette
Signed-off-by: Jerome Brunet
10 May, 2017
1 commit
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Pull ARM 64-bit DT updates from Olof Johansson:
"Device-tree updates for arm64 platforms. Just as with 32-bit, a bunch
of smaller changes, but also some new platforms that are worth
mentioning:- Rockchip RK3399 platforms for Chromebooks, including Samsung
Chromebook Plus (Kevin)- Orange Pi PC2 (Allwinner H5)
- Freescale LS2088A and LS1088A SoCs
- Expanded support for Nvidia Tegra186 (and Jetson TX2)"
* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (180 commits)
arm64: dts: Add basic DT to support Spreadtrum's SP9860G
arm64: dts: exynos: Use - instead of @ for DT OPP entries
arm64: dts: exynos: Add support for s6e3hf2 panel device on TM2e board
arm64: dts: juno: add information about L1 and L2 caches
arm64: dts: juno: fix few unit address format warnings
arm64: marvell: dts: enable the crypto engine on the Armada 8040 DB
arm64: marvell: dts: enable the crypto engine on the Armada 7040 DB
arm64: marvell: dts: add crypto engine description for 7k/8k
arm64: dts: marvell: add sdhci support for Armada 7K/8K
arm64: dts: marvell: add eMMC support for Armada 37xx
arm64: dts: hisi: add pinctrl dtsi file for HiKey960 development board
arm64: dts: hisi: add drive strength levels of the pins for Hi3660 SoC
arm64: dts: hisi: enable the NIC and SAS for the hip07-d05 board
arm64: dts: hisi: add SAS nodes for the hip07 SoC
arm64: dts: hisi: add RoCE nodes for the hip07 SoC
arm64: dts: hisi: add network related nodes for the hip07 SoC
arm64: dts: hisi: add mbigen nodes for the hip07 SoC
arm64: dts: rockchip: fix the memory size of PX5 Evaluation board
arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board
dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board
...
05 Apr, 2017
3 commits
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This patch exposes the GP0 PLL clock id in the dt bindings.
Signed-off-by: Neil Armstrong
Signed-off-by: Michael Turquette
Link: lkml.kernel.org/r/1490178747-14837-5-git-send-email-narmstrong@baylibre.com -
Add missing MALI clock IDs and expose the muxes and gates in the dt-bindings.
Signed-off-by: Neil Armstrong
Signed-off-by: Michael Turquette
Link: lkml.kernel.org/r/1490177935-9646-2-git-send-email-narmstrong@baylibre.com -
Signed-off-by: Jerome Brunet
Signed-off-by: Michael Turquette
Link: lkml.kernel.org/r/20170309104154.28295-10-jbrunet@baylibre.com
16 Mar, 2017
1 commit
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Expose clock CLKID_RNG0 which is needed for the HW random number generator.
Signed-off-by: Heiner Kallweit
Reviewed-by: Neil Armstrong
Signed-off-by: Herbert Xu
24 Jan, 2017
1 commit
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The HHI_SAR_CLK_CNTL contains three SAR ADC specific clocks:
- a mux clock to choose between different ADC reference clocks (this is
2-bit wide, but the datasheet only lists the parents for the first
bit)
- a divider for the input/reference clock
- a gate which enables the ADC clockAdditionally this exposes the ADC core clock (CLKID_SAR_ADC) and
CLKID_SANA (which seems to enable the analog inputs, but unfortunately
there is no documentation for this - we just mimic what the vendor
driver does).Signed-off-by: Martin Blumenstingl
Tested-by: Neil Armstrong
Acked-by: Stephen Boyd
Signed-off-by: Kevin Hilman
19 Jan, 2017
1 commit
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Export HDMI clock from internal to dt-bindings.
Signed-off-by: Neil Armstrong
Acked-by: Stephen Boyd
Signed-off-by: Kevin Hilman
15 Sep, 2016
4 commits
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I2C and AO_I2C clocks are needed for the i2c driver, expose to DT
(and comment out in clk driver)Signed-off-by: Jerome Brunet
Acked-by: Stephen Boyd
Signed-off-by: Kevin Hilman -
USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
Expose these clocks to DT and comment out in clk driver.Signed-off-by: Martin Blumenstingl
Signed-off-by: Jerome Brunet
Acked-by: Stephen Boyd
Signed-off-by: Kevin Hilman -
SPI clock is needed for the spifc driver, expose to DT
(and comment out in the clk driver)Signed-off-by: Jerome Brunet
Acked-by: Stephen Boyd
Signed-off-by: Kevin Hilman -
This exposes the MPLL2 clock as this is one of the input clocks of the
ethernet controller's internal mux.Signed-off-by: Martin Blumenstingl
Acked-by: Stephen Boyd
Signed-off-by: Kevin Hilman
03 Sep, 2016
1 commit
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Add the PWM related clocks in order to be referenced as PWM source
clocks.Signed-off-by: Neil Armstrong
Signed-off-by: Michael Turquette
Link: lkml.kernel.org/r/1471870177-10609-1-git-send-email-narmstrong@baylibre.com
16 Aug, 2016
1 commit
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Add the SD/eMMC gate clocks and expose them for use by DT.
While at it, also explose FCLK_DIV2 since this is one of the input
clocks to the mux internal to each of the SD/eMMC blocks.Signed-off-by: Kevin Hilman
Tested-by: Martin Blumenstingl
Signed-off-by: Stephen Boyd
16 Jul, 2016
1 commit
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This reverts commit e16fb2e6355c1c1b41623af9e01ada196e2af098.
Updated documentation from the chip vendor reveals that this clock is
not required for correct operation of the MMC controller. As such, do
not expose it to DT.Signed-off-by: Michael Turquette
08 Jul, 2016
1 commit
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The MMC_PCLK is needed for the SD/eMMC driver, expose to DT (and comment
out in clk driver)Signed-off-by: Kevin Hilman
Signed-off-by: Michael Turquette
Link: lkml.kernel.org/r/20160707033837.20029-1-khilman@baylibre.com
23 Jun, 2016
1 commit
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The gxbb clock controller is the primary clock generation unit for the
AmLogic GXBB SoC. It is clocked by a fixed 24MHz xtal, contains several
PLLs and the usual post-dividers, muxes, dividers and leaf gates that
are fed into various IP blocks in the SoC.Tested-by: Kevin Hilman
Signed-off-by: Michael Turquette