16 Oct, 2018

1 commit

  • Add devm_fpga_bridge_create() which is the managed
    version of fpga_bridge_create().

    Change current bridge drivers to use
    devm_fpga_bridge_create().

    Signed-off-by: Alan Tull
    Suggested-by: Federico Vaga
    Acked-by: Moritz Fischer
    Signed-off-by: Greg Kroah-Hartman

    Alan Tull
     

26 May, 2018

2 commits

  • Replace GPLv2 boilerplate with SPDX in FPGA code that came from me or
    from Altera.

    Signed-off-by: Alan Tull
    Signed-off-by: Greg Kroah-Hartman

    Alan Tull
     
  • Change fpga_bridge_register to not set drvdata. This is to support
    the case where a PCIe device can have more than one bridge.

    Add API functions to create/free the fpga bridge struct. Change
    fpga_bridge_register/unregister to take FPGA bridge struct as
    the only parameter.

    struct fpga_bridge
    *fpga_bridge_create(struct device *dev, const char *name,
    const struct fpga_bridge_ops *br_ops,
    void *priv);
    void fpga_bridge_free(struct fpga_bridge *br);
    int fpga_bridge_register(struct fpga_bridge *br);
    void fpga_bridge_unregister(struct fpga_bridge *br);

    Update the drivers that call fpga_bridge_register with the new API.

    Signed-off-by: Alan Tull
    Reported-by: Jiuyue Ma
    Signed-off-by: Moritz Fischer
    Signed-off-by: Greg Kroah-Hartman

    Alan Tull
     

26 Apr, 2017

1 commit

  • The value in the version register of the altera freeze bridge
    controller changed from the beta value of 2 to the
    value of 0xad000003 in the official release of the IP.
    This patch supports the old and new version numbers, and the
    driver's probe function will fail if neither of the supported
    versions is found.

    Signed-off-by: Matthew Gerlach
    Reviewed-by: Moritz Fischer
    Signed-off-by: Alan Tull
    Signed-off-by: Greg Kroah-Hartman

    Matthew Gerlach
     

08 Apr, 2017

1 commit


11 Nov, 2016

1 commit

  • Add a low level driver for Altera Freeze Bridges to the FPGA Bridge
    framework. A freeze bridge is a bridge that exists in the FPGA
    fabric to isolate one region of the FPGA from the busses while that
    one region is being reprogrammed.

    Signed-off-by: Alan Tull
    Signed-off-by: Matthew Gerlach
    Signed-off-by: Greg Kroah-Hartman

    Alan Tull