11 Jul, 2006
1 commit
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Signed-off-by: Muli Ben-Yehuda
Signed-off-by: Jon Mason
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds
05 Jul, 2006
1 commit
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* git://git.infradead.org/hdrinstall-2.6:
Remove export of include/linux/isdn/tpam.h
Remove and from userspace export
Restrict headers exported to userspace for SPARC and SPARC64
Add empty Kbuild files for 'make headers_install' in remaining arches.
Add Kbuild file for Alpha 'make headers_install'
Add Kbuild file for SPARC 'make headers_install'
Add Kbuild file for IA64 'make headers_install'
Add Kbuild file for S390 'make headers_install'
Add Kbuild file for i386 'make headers_install'
Add Kbuild file for x86_64 'make headers_install'
Add Kbuild file for PowerPC 'make headers_install'
Add generic Kbuild files for 'make headers_install'
Basic implementation of 'make headers_check'
Basic implementation of 'make headers_install'
04 Jul, 2006
4 commits
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Clean up the x86-64 irqflags.h file:
- macro => inline function transformation
- simplifications
- style fixesSigned-off-by: Ingo Molnar
Signed-off-by: Arjan van de Ven
Cc: Andi Kleen
Cc: Jan Beulich
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Add irqflags-tracing support to x86_64.
[akpm@osdl.org: build fix]
Signed-off-by: Ingo Molnar
Cc: Andi Kleen
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Beautify x86_64 stacktraces to be more readable.
Signed-off-by: Ingo Molnar
Signed-off-by: Arjan van de Ven
Acked-by: Andi Kleen
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Add the per_cpu_offset() generic method. (used by the lock validator)
Signed-off-by: Ingo Molnar
Signed-off-by: Arjan van de Ven
Cc: Rusty Russell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
03 Jul, 2006
1 commit
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Use the new IRQF_ constants and remove the SA_INTERRUPT define
Signed-off-by: Thomas Gleixner
Cc: Ingo Molnar
Cc: "David S. Miller"
Cc: Benjamin Herrenschmidt
Cc: Andi Kleen
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
02 Jul, 2006
1 commit
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Hide the magic in alternative.h and provide some dummy inline functions
for the UP case (gcc should manage to optimize away these calls). No
changes in module.c.Cc: Dave Jones
Cc: Andi Kleen
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
30 Jun, 2006
2 commits
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This patch implements an API whereby an application can determine the
label of its peer's Unix datagram sockets via the auxiliary data mechanism of
recvmsg.Patch purpose:
This patch enables a security-aware application to retrieve the
security context of the peer of a Unix datagram socket. The application
can then use this security context to determine the security context for
processing on behalf of the peer who sent the packet.Patch design and implementation:
The design and implementation is very similar to the UDP case for INET
sockets. Basically we build upon the existing Unix domain socket API for
retrieving user credentials. Linux offers the API for obtaining user
credentials via ancillary messages (i.e., out of band/control messages
that are bundled together with a normal message). To retrieve the security
context, the application first indicates to the kernel such desire by
setting the SO_PASSSEC option via getsockopt. Then the application
retrieves the security context using the auxiliary data mechanism.An example server application for Unix datagram socket should look like this:
toggle = 1;
toggle_len = sizeof(toggle);setsockopt(sockfd, SOL_SOCKET, SO_PASSSEC, &toggle, &toggle_len);
recvmsg(sockfd, &msg_hdr, 0);
if (msg_hdr.msg_controllen > sizeof(struct cmsghdr)) {
cmsg_hdr = CMSG_FIRSTHDR(&msg_hdr);
if (cmsg_hdr->cmsg_len cmsg_level == SOL_SOCKET &&
cmsg_hdr->cmsg_type == SCM_SECURITY) {
memcpy(&scontext, CMSG_DATA(cmsg_hdr), sizeof(scontext));
}
}sock_setsockopt is enhanced with a new socket option SOCK_PASSSEC to allow
a server socket to receive security context of the peer.Testing:
We have tested the patch by setting up Unix datagram client and server
applications. We verified that the server can retrieve the security context
using the auxiliary data mechanism of recvmsg.Signed-off-by: Catherine Zhang
Acked-by: Acked-by: James Morris
Signed-off-by: David S. Miller -
Add ->retrigger() irq op to consolidate hw_irq_resend() implementations.
(Most architectures had it defined to NOP anyway.)NOTE: ia64 needs testing. i386 and x86_64 tested.
Signed-off-by: Ingo Molnar
Signed-off-by: Thomas Gleixner
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
28 Jun, 2006
2 commits
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sysfs entries 'sched_mc_power_savings' and 'sched_smt_power_savings' in
/sys/devices/system/cpu/ control the MC/SMT power savings policy for the
scheduler.Based on the values (1-enable, 0-disable) for these controls, sched groups
cpu power will be determined for different domains. When power savings
policy is enabled and under light load conditions, scheduler will minimize
the physical packages/cpu cores carrying the load and thus conserving
power(with a perf impact based on the workload characteristics... see OLS
2005 CMP kernel scheduler paper for more details..)Signed-off-by: Suresh Siddha
Cc: Ingo Molnar
Cc: Nick Piggin
Cc: Con Kolivas
Cc: "Chen, Kenneth W"
Cc: "David S. Miller"
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Remove the limit of 256 interrupt vectors by changing the value stored in
orig_{e,r}ax to be the complemented interrupt vector. The orig_{e,r}ax
needs to be < 0 to allow the signal code to distinguish between return from
interrupt and return from syscall. With this change applied, NR_IRQS can
be > 256.Xen extends the IRQ numbering space to include room for dynamically
allocated virtual interrupts (in the range 256-511), which requires a more
permissive interface to do_IRQ.Signed-off-by: Ian Pratt
Signed-off-by: Christian Limpach
Signed-off-by: Chris Wright
Signed-off-by: Rusty Russell
Cc: "Protasevich, Natalie"
Cc: Andi Kleen
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
27 Jun, 2006
28 commits
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* x86-64: (83 commits)
[PATCH] x86_64: x86_64 stack usage debugging
[PATCH] x86_64: (resend) x86_64 stack overflow debugging
[PATCH] x86_64: msi_apic.c build fix
[PATCH] x86_64: i386/x86-64 Add nmi watchdog support for new Intel CPUs
[PATCH] x86_64: Avoid broadcasting NMI IPIs
[PATCH] x86_64: fix apic error on bootup
[PATCH] x86_64: enlarge window for stack growth
[PATCH] x86_64: Minor string functions optimizations
[PATCH] x86_64: Move export symbols to their C functions
[PATCH] x86_64: Standardize i386/x86_64 handling of NMI_VECTOR
[PATCH] x86_64: Fix modular pc speaker
[PATCH] x86_64: remove sys32_ni_syscall()
[PATCH] x86_64: Do not use -ffunction-sections for modules
[PATCH] x86_64: Add cpu_relax to apic_wait_icr_idle
[PATCH] x86_64: adjust kstack_depth_to_print default
[PATCH] i386/x86-64: adjust /proc/interrupts column headings
[PATCH] x86_64: Fix race in cpu_local_* on preemptible kernels
[PATCH] x86_64: Fix fast check in safe_smp_processor_id
[PATCH] x86_64: x86_64 setup.c - printing cmp related boottime information
[PATCH] i386/x86-64/ia64: Move polling flag into thread_info_status
...Manual resolve of trivial conflict in arch/i386/kernel/Makefile
-
Applies to git & 2.6.17-rc6 after CONFIG_DEBUG_STACKOVERFLOW patch
uses same stack-zeroing mechanism as on i386 to discover maximum stack
excursions.Signed-off-by: Eric Sandeen
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Intel now has support for Architectural Performance Monitoring Counters
( Refer to IA-32 Intel Architecture Software Developer's Manual
http://www.intel.com/design/pentium4/manuals/253669.htm ). This
feature is present starting from Intel Core Duo and Intel Core Solo processors.What this means is, the performance monitoring counters and some performance
monitoring events are now defined in an architectural way (using cpuid).
And there will be no need to check for family/model etc for these architectural
events.Below is the patch to use this performance counters in nmi watchdog driver.
Patch handles both i386 and x86-64 kernels.Signed-off-by: Venkatesh Pallipadi
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
This one is adding a cpu_relax() that already existed in the i386 version.
Signed-off-by: Andreas Mohr
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
When a process changes CPUs while doing the non atomic cpu_local_*
operations it might operate on the local_t of a different CPUs.Fix that by disabling preemption.
Pointed out by Christopher Lameter
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
During some profiling I noticed that default_idle causes a lot of
memory traffic. I think that is caused by the atomic operations
to clear/set the polling flag in thread_info. There is actually
no reason to make this atomic - only the idle thread does it
to itself, other CPUs only read it. So I moved it into ti->status.Converted i386/x86-64/ia64 for now because that was the easiest
way to fix ACPI which also manipulates these flags in its idle
function.Cc: Nick Piggin
Cc: Tony Luck
Cc: Len Brown
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Add support for mce threshold registers found in future
AMD family 0x10 processors. Backwards compatible with
family 0xF hardware.AK: fixed build on !SMP
Signed-off-by: Jacob Shin
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Get rid of /sys/devices/system/threshold directory and move
mce_amd thresholding files into the machine sysfs directory --
/sys/devices/system/machinecheck.AK: Fixed warning
Signed-off-by: Jacob Shin
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Add support for extended APIC LVT found in future AMD processors.
Signed-off-by: Jacob Shin
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
This patch adds the X86_FEATURE_RDTSCP #define, so that kernel code can
check for the feature easily and also fixes the location of the "rdtscp"
string in the cpuinfo tables.Signed-off-by: Vojtech Pavlik
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Rename oem_force_hpet_timer to apic_is_clustered_box, to give the
function a better fitting name - it really isn't at all about HPET.Signed-off-by: Vojtech Pavlik
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Most of the fields of cpuinfo are defined in cpuinfo_x86 structure.
This patch moves the phys_proc_id and cpu_core_id for each processor to
cpuinfo_x86 structure as well.Signed-off-by: Rohit Seth
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
This patch hooks Calgary into the build, the x86-64 IOMMU
initialization paths, and introduces the Calgary specific bits. The
implementation draws inspiration from both PPC (which has support for
the same chip but requires firmware support which we don't have on
x86-64) and gart. Calgary is different from gart in that it support a
translation table per PHB, as opposed to the single gart aperture.Changes from previous version:
* Addition of boot-time disablement for bus-level translation/isolation
(e.g, enable userspace DMA for things like X)
* Usage of newer IOMMU abstraction functionsSigned-off-by: Muli Ben-Yehuda
Signed-off-by: Jon Mason
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
This patch creates a new interface for IOMMUs by adding a centralized
location for IOMMU allocation (for translation tables/apertures) and
IOMMU initialization. In creating these, code was moved around for
abstraction, uniformity, and consiceness.Take note of the move of the iommu_setup bootarg parsing code to
__setup. This is enabled by moving back the location of the aperture
allocation/detection to mem init (which while ugly, was already the
location of the swiotlb_init).While a slight departure from the previous patch, I belive this provides
the true intention of the previous versions of the patch which changed
this code. It also makes the addition of the upcoming calgary code much
cleaner than previous patches.[AK: Removed one broken change. iommu_setup still has to be called
early]Signed-off-by: Muli Ben-Yehuda
Signed-off-by: Jon Mason
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Based on Andi Kleen's comments on the original Calgary patch, move
valid_dma_direction into the calling functions.Signed-off-by: Muli Ben-Yehuda
Signed-off-by: Jon Mason
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
swiotlb relies on the gart specific iommu_aperture variable to know if
we discovered a hardware IOMMU before swiotlb initialization. Introduce
iommu_detected to do the same thing, but in a HW IOMMU neutral manner,
in preparation for adding the Calgary HW IOMMU.Signed-Off-By: Muli Ben-Yehuda
Signed-Off-By: Jon Mason
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
pud_offset_k() equivalent to pud_offset() now. Pointed out by Jan Beulich
Similar for __pud_offset_ok, which needs a small change in the callers.Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
If no unwinding is possible at all for a certain exception instance,
fall back to the old style call trace instead of not showing any trace
at all.Also, allow setting the stack trace mode at the command line.
Signed-off-by: Jan Beulich
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
These are the x86_64-specific pieces to enable reliable stack traces. The
only restriction with this is that it currently cannot unwind across the
interrupt->normal stack boundary, as that transition is lacking proper
annotation.Signed-off-by: Jan Beulich
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
- Rename the GART_IOMMU option to IOMMU to make clear it's not
just for AMD
- Rewrite the help text to better emphatise this fact
- Make it an embedded option because too many people get it wrong.To my astonishment I discovered the aacraid driver tests this
symbol directly. This looks quite broken to me - it's an internal
implementation detail of the PCI DMA API. Can the maintainer
please clarify what this test was intended to do?Cc: linux-scsi@vger.kernel.org
Cc: alan@redhat.com
Cc: markh@osdl.org
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
include/asm-x86_64/gart-mapping.h is only ever used in
arch/x86_64/kernel/setup.c and none of its contents are referenced.
Looks to be leftover cruft not removed in the dma_ops patch.Signed-off-by: Jon Mason
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Early development of x86-64 Linux was in CVS, but that hasn't been
the case for a long time now. Remove the obsolete $Id$s.Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Misc header cleanup for nmi watchdog.
Signed-off-by: Don Zickus
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
- Factor out the duplicated access/cache code into a single file
* Shared between i386/x86-64.
- Share flush code between AGP and IOMMU
* Fix a bug: AGP didn't wait for end of flush before
- Drop 8 northbridges limit and allocate dynamically
- Add lock to serialize AGP and IOMMU GART flushes
- Add PCI ID for next AMD northbridge
- Random related cleanupsThe old K8 NUMA discovery code is unchanged. New systems
should all use SRAT for this.Cc: "Navin Boppuri"
Cc: Dave Jones
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
It's only needed for three system calls, no need to maintain
a full list forever.Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Changes are largely identical to the i386 version:
* alternative #define are moved to the new alternative.h file.
* one new elf section with pointers to the lock prefixes which can be
nop'ed out for non-smp.
* two new elf sections simliar to the "classic" alternatives to
replace SMP code with simpler UP code.
* fixup headers to use alternative.h instead of defining their own
LOCK / LOCK_PREFIX macros.The patch reuses the i386 version of the alternatives code to avoid code
duplication. The code in alternatives.c was shuffled around a bit to
reduce the number of #ifdefs needed. It also got some tweaks needed for
x86_64 (vsyscall page handling) and new features (noreplacement option
which was x86_64 only up to now). Debug printk's are changed from
compile-time to runtime.Loosely based on a early version from Bastian Blank
Signed-off-by: Gerd Hoffmann
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
Intel systems report the cache level data from CPUID 4 in sysfs.
Add a CPUID 4 emulation for AMD CPUs to report the same
information for them. This allows programs to read this
information in a uniform way.The AMD way to report this is less flexible so some assumptions
are hardcoded (e.g. no L3)Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds
