21 Jun, 2016

1 commit

  • In the current multiplier base clock implementation, if the
    CLK_SET_RATE_PARENT flag isn't set, the code will not make sure that the
    multiplier computed remains within the boundaries of our clock.

    This means that if the clock we want to reach is below the parent rate,
    or if the multiplier is above the maximum that we can reach, we will end up
    with a completely bogus one that the clock cannot achieve.

    Fixes: f2e0a53271a4 ("clk: Add a basic multiplier clock")
    Signed-off-by: Maxime Ripard
    Signed-off-by: Michael Turquette
    Link: lkml.kernel.org/r/1463402840-17062-3-git-send-email-maxime.ripard@free-electrons.com

    Maxime Ripard
     

30 Jan, 2016

1 commit


24 Oct, 2015

1 commit


22 Oct, 2015

1 commit

  • Some clocks are using a multiplier component, however, unlike their mux,
    gate or divider counterpart, these factors don't have a basic clock
    implementation.

    This leads to code duplication across platforms that want to use that kind
    of clocks, and the impossibility to use the composite clocks with such a
    clock without defining your own rate operations.

    Create such a driver in order to remove these issues, and hopefully factor
    the implementations, reducing code size across platforms and consolidating
    the various implementations.

    Signed-off-by: Maxime Ripard
    Reviewed-by: Chen-Yu Tsai

    Maxime Ripard