20 Apr, 2016

1 commit


30 Jan, 2016

1 commit


23 Dec, 2015

1 commit


25 Aug, 2015

1 commit

  • Mostly converted with the following semantic patch:

    @@
    struct clk_hw *E;
    @@

    -__clk_get_num_parents(E->clk)
    +clk_hw_get_num_parents(E)

    Acked-by: Boris Brezillon
    Cc: Chao Xie
    Cc: Krzysztof Kozlowski
    Cc: Javier Martinez Canillas
    Cc: Tomasz Figa
    Cc: Maxime Ripard
    Cc: "Emilio López"
    Acked-by: Tero Kristo
    Cc: Geert Uytterhoeven
    Acked-by: Sylwester Nawrocki
    Signed-off-by: Stephen Boyd

    Stephen Boyd
     

29 Jul, 2015

1 commit

  • The basic clock types use conditional locking for the register
    accessor spinlocks. Add __acquire() and __release() markings in
    the right locations so that sparse isn't tripped up on the
    conditional locking.

    drivers/clk/clk-mux.c:68:12: warning: context imbalance in 'clk_mux_set_parent' - different lock contexts for basic block
    drivers/clk/clk-divider.c:379:12: warning: context imbalance in 'clk_divider_set_rate' - different lock contexts for basic block
    drivers/clk/clk-gate.c:71:9: warning: context imbalance in 'clk_gate_endisable' - different lock contexts for basic block
    drivers/clk/clk-fractional-divider.c:36:9: warning: context imbalance in 'clk_fd_recalc_rate' - different lock contexts for basic block
    drivers/clk/clk-fractional-divider.c:68:12: warning: context imbalance in 'clk_fd_set_rate' - different lock contexts for basic block

    Cc: Andy Shevchenko
    Signed-off-by: Stephen Boyd

    Stephen Boyd
     

21 Jul, 2015

1 commit


06 May, 2015

1 commit

  • The clk functions and structs declare the parent_name arrays as
    'const char **parent_names' which means the parent name strings
    are const, but the array itself is not. Use
    'const char * const * parent_names' instead which also makes
    the array const. This allows us to put the parent_name arrays into
    the __initconst section.

    Signed-off-by: Sascha Hauer
    Reviewed-by: Krzysztof Kozlowski
    Tested-by: Krzysztof Kozlowski
    Acked-by: Uwe Kleine-König
    [sboyd@codeaurora.org: Squelch 80-character checkpatch warnings]
    Signed-off-by: Stephen Boyd

    Sascha Hauer
     

18 Jan, 2015

1 commit

  • The common clk_register_{divider,gate,mux} functions allocated memory
    for internal data which wasn't freed anywhere. Drivers using these
    helpers could only unregister clocks but the memory would still leak.

    Add corresponding unregister functions which will release all resources.

    Signed-off-by: Krzysztof Kozlowski
    Reviewed-by: Stephen Boyd
    Signed-off-by: Michael Turquette

    Krzysztof Kozlowski
     

20 Nov, 2014

1 commit

  • If CLK_MUX_INDEX_BIT is set, then each bit turns on / off a single parent,
    so theoretically multiple parents could be enabled at the same time, but in
    practice only one bit should ever be 1. So to select parent 0, set
    the register (*) to 0x01, to select parent 1 set it 0x02, parent 2, 0x04,
    parent 3, 0x08, etc.

    But the current code does:

    if (mux->flags & CLK_MUX_INDEX_BIT)
    index = (1 << ffs(index));

    Which means that:

    For an input index of 0, ffs returns 0, so we set the register
    to 0x01, ok.

    For an input index of 1, ffs returns 1, so we set the register
    to 0x02, ok.

    For an input index of 2, ffs returns 2, so we set the register
    to 0x04, ok.

    For an input index of 3, ffs returns 1, so we set the register
    to 0x02, not good!

    The code should simply be:

    if (mux->flags & CLK_MUX_INDEX_BIT)
    index = 1 << index;

    Which always does the right thing, this commit fixes this.

    Signed-off-by: Hans de Goede
    Signed-off-by: Michael Turquette

    Hans de Goede
     

28 Aug, 2013

1 commit

  • the common clock drivers were motivated/initiated by ARM development
    and apparently assume little endian peripherals

    wrap register/peripherals access in the common code (div, gate, mux)
    in preparation of adding COMMON_CLK support for other platforms

    Signed-off-by: Gerhard Sittig
    Signed-off-by: Mike Turquette

    Gerhard Sittig
     

20 Aug, 2013

1 commit

  • Implement clk-mux remuxing if the CLK_SET_RATE_NO_REPARENT flag isn't
    set. This implements determine_rate for clk-mux to propagate to each
    parent and to choose the best one (like clk-divider this chooses the
    parent which provides the fastest rate
    Reviewed-by: Stephen Boyd
    Cc: Mike Turquette
    Cc: linux-arm-kernel@lists.infradead.org
    Signed-off-by: Mike Turquette

    James Hogan
     

17 Aug, 2013

1 commit


06 Aug, 2013

1 commit

  • Some platforms have read-only clock muxes that are preconfigured at
    reset and cannot be changed at runtime. This patch extends mux clock
    driver to allow handling such read-only muxes by adding new
    CLK_MUX_READ_ONLY mux flag.

    Signed-off-by: Tomasz Figa
    Signed-off-by: Mike Turquette

    Tomasz Figa
     

16 Jun, 2013

1 commit

  • In both Hisilicon & Rockchip Cortex-A9 based chips, they don't use the
    paradigm of reading-changing-writing the register contents.
    Instead they use a hiword mask to indicate the changed bits.

    When b01 should be set as switching mux, it also needs to indicate
    the change by setting hiword mask (b11 << 16).

    The patch adds mux flag for this usage.

    Signed-off-by: Heiko Stuebner
    Signed-off-by: Haojian Zhuang
    Signed-off-by: Mike Turquette

    Haojian Zhuang
     

23 Mar, 2013

1 commit

  • Add a table lookup feature to the mux clock. Also allow arbitrary masks
    instead of the width. This will be used by some clocks on Tegra114. Also
    adapt the tegra periph clk because it uses struct clk_mux directly.

    Signed-off-by: Peter De Schrijver
    Tested-by: Stephen Warren
    Signed-off-by: Mike Turquette

    Peter De Schrijver
     

12 Jul, 2012

1 commit

  • Most platforms end up using a mix of basic clock types and
    some which use clk_hw_foo struct for filling in custom platform
    information when the clocks don't fit into basic types supported.

    In platform code, its useful to know if a clock is using a basic
    type or clk_hw_foo, which helps platforms know if they can
    safely use to_clk_hw_foo to derive the clk_hw_foo pointer from
    clk_hw.

    Mark all basic clocks with a CLK_IS_BASIC flag.

    Signed-off-by: Rajendra Nayak
    Signed-off-by: Mike Turquette

    Rajendra Nayak
     

09 May, 2012

1 commit


02 May, 2012

1 commit

  • Create a struct clk_init_data to hold all data that needs to be passed from
    the platfrom specific driver to the common clock framework during clock
    registration. Add a pointer to this struct inside clk_hw.

    This has several advantages:
    * Completely hides struct clk from many clock platform drivers and static
    clock initialization code that don't care for static initialization of
    the struct clks.
    * For platforms that want to do complete static initialization, it removed
    the need to directly mess with the struct clk's fields while still
    allowing to statically allocate struct clk. This keeps the code more
    future proof even if they include clk-private.h.
    * Simplifies the generic clk_register() function and allows adding optional
    fields in the future without modifying the function signature.
    * Simplifies the static initialization of clocks on all platforms by
    removing the need for forward delcarations or convoluted macros.

    Signed-off-by: Saravana Kannan
    [mturquette@linaro.org: kept DEFINE_CLK_* macros and __clk_init]
    Signed-off-by: Mike Turquette
    Cc: Andrew Lunn
    Cc: Rob Herring
    Cc: Russell King
    Cc: Jeremy Kerr
    Cc: Thomas Gleixner
    Cc: Arnd Bergman
    Cc: Paul Walmsley
    Cc: Shawn Guo
    Cc: Sascha Hauer
    Cc: Jamie Iles
    Cc: Richard Zhao
    Cc: Saravana Kannan
    Cc: Magnus Damm
    Cc: Mark Brown
    Cc: Linus Walleij
    Cc: Stephen Boyd
    Cc: Amit Kucheria
    Cc: Deepak Saxena
    Cc: Grant Likely

    Saravana Kannan
     

25 Apr, 2012

5 commits


17 Mar, 2012

1 commit

  • Many platforms support simple gateable clocks, fixed-rate clocks,
    adjustable divider clocks and multi-parent multiplexer clocks.

    This patch introduces basic clock types for the above-mentioned hardware
    which share some common characteristics.

    Based on original work by Jeremy Kerr and contribution by Jamie Iles.
    Dividers and multiplexor clocks originally contributed by Richard Zhao &
    Sascha Hauer.

    Signed-off-by: Mike Turquette
    Signed-off-by: Mike Turquette
    Reviewed-by: Andrew Lunn
    Tested-by: Andrew Lunn
    Reviewed-by: Rob Herring
    Cc: Russell King
    Cc: Jeremy Kerr
    Cc: Thomas Gleixner
    Cc: Arnd Bergman
    Cc: Paul Walmsley
    Cc: Shawn Guo
    Cc: Sascha Hauer
    Cc: Jamie Iles
    Cc: Richard Zhao
    Cc: Saravana Kannan
    Cc: Magnus Damm
    Cc: Mark Brown
    Cc: Linus Walleij
    Cc: Stephen Boyd
    Cc: Amit Kucheria
    Cc: Deepak Saxena
    Cc: Grant Likely
    Signed-off-by: Arnd Bergmann

    Mike Turquette