20 Oct, 2016
2 commits
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I made a mistake as for naming for this block. The MIO block is not
implemented for these 3 SoCs in the first place. The current naming
will be a trouble if an SoC with both MIO and SD-ctrl blocks appear
in the future.This driver has just been merged in the previous merge window.
Rename it before the release.Signed-off-by: Masahiro Yamada
Signed-off-by: Stephen Boyd -
The first loop of this "for" statement writes memory beyond the
allocated clk_hw_onecell_data.It should be:
for (clk_num--; clk_num >= 0; clk_num--)
...Or more simply:
while (--clk_num >= 0)
...Fixes: 734d82f4a678 ("clk: uniphier: add core support code for UniPhier clock driver")
Signed-off-by: Masahiro Yamada
Signed-off-by: Stephen Boyd
18 Oct, 2016
2 commits
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The 3rd argument of regmap_read() takes a pointer to unsigned int.
This driver is saved just because u32 happens to be typedef'ed as
unsigned int, but we should not rely on that fact. Change the
variable type just in case.Signed-off-by: Masahiro Yamada
Signed-off-by: Stephen Boyd -
I do not know why, but I missed to add this compatible string in
the initial commit of this driver.Signed-off-by: Masahiro Yamada
Signed-off-by: Stephen Boyd
17 Sep, 2016
2 commits
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Add clock data arrays for all UniPhier SoCs with a binding document.
Signed-off-by: Masahiro Yamada
Acked-by: Rob Herring
Signed-off-by: Stephen Boyd -
This includes UniPhier clock driver code, except SoC-specific
data arrays.Signed-off-by: Masahiro Yamada
Signed-off-by: Stephen Boyd