Eric Lee / smarc-fsl-linux-kernel

14 Apr, 2016

1 commit

  • ad06fdeee   pwm: fsl-ftm: Use flat regmap cache ... Browse Code »

    Use flat regmap cache to avoid lockdep warning at probe:

    [ 0.697285] WARNING: CPU: 0 PID: 1 at kernel/locking/lockdep.c:2755 lockdep_trace_alloc+0x15c/0x160()
    [ 0.697449] DEBUG_LOCKS_WARN_ON(irqs_disabled_flags(flags))

    The RB-tree regmap cache needs to allocate new space on first writes.
    However, allocations in an atomic context (e.g. when a spinlock is held)
    are not allowed. The function regmap_write calls map->lock, which
    acquires a spinlock in the fast_io case. Since the pwm-fsl-ftm driver
    uses MMIO, the regmap bus of type regmap_mmio is being used which has
    fast_io set to true.

    The MMIO space of the pwm-fsl-ftm driver is reasonable condense, hence
    using the much faster flat regmap cache is anyway the better choice.

    Signed-off-by: Stefan Agner
    Cc: Mark Brown
    Signed-off-by: Thierry Reding

    Stefan Agner
     

16 Dec, 2015

1 commit

  • 816aec232   pwm: fsl-ftm: Fix clock enable/disable when using PM ... Browse Code »

    A FTM PWM instance enables/disables three clocks: The bus clock, the
    counter clock and the PWM clock. The bus clock gets enabled on
    pwm_request, whereas the counter and PWM clocks will be enabled upon
    pwm_enable.

    The driver has three closesly related issues when enabling/disabling
    clocks during suspend/resume:
    - The three clocks are not treated differently in regards to the
    individual PWM state enabled/requested. This can lead to clocks
    getting disabled which have not been enabled in the first place
    (a PWM channel which only has been requested going through
    suspend/resume).

    - When entering suspend, the current behavior relies on the
    FTM_OUTMASK register: If a PWM output is unmasked, the driver
    assumes the clocks are enabled. However, some PWM instances
    have only 2 channels connected (e.g. Vybrid's FTM1). In that case,
    the FTM_OUTMASK reads 0x3 if all channels are disabled, even if
    the code wrote 0xff to it before. For those PWM instances, the
    current approach to detect enabled PWM signals does not work.

    - A third issue applies to the bus clock only, which can get enabled
    multiple times (once for each PWM channel of a PWM chip). This is
    fine, however when entering suspend mode, the clock only gets
    disabled once.

    This change introduces a different approach by relying on the enable
    and prepared counters of the clock framework and using the frameworks
    PWM signal states to address all three issues.

    Clocks get disabled during suspend and back enabled on resume
    regarding to the PWM channels individual state (requested/enabled).

    Since we do not count the clock enables in the driver, this change no
    longer clears the Status and Control registers Clock Source Selection
    (FTM_SC[CLKS]). However, since we disable the selected clock anyway,
    and we explicitly select the clock source on reenabling a PWM channel
    this approach should not make a difference in practice.

    Signed-off-by: Stefan Agner
    Signed-off-by: Thierry Reding

    Stefan Agner
     

01 Dec, 2014

3 commits

20 Aug, 2014

2 commits

  • 42fa98a9c   pwm: fsl-ftm: Convert to direct regmap API usage ... Browse Code »

    The regmap core supports different endian modes for devices. This patch
    convert to direct regmap API usage, preparing to support big endianness
    for LS1 SoC.

    Using the regmap framework it will be easy to support devices that only
    differ in endianness with the same device driver.

    Signed-off-by: Xiubo Li
    Signed-off-by: Thierry Reding

    Xiubo Li
     
  • cd6d92d2a   pwm: fsl-ftm: Clean up the code ... Browse Code »

    This patch intends to prepare for converting to direct regmap API usage.

    Signed-off-by: Xiubo Li
    Signed-off-by: Thierry Reding

    Xiubo Li
     

23 May, 2014

1 commit

19 Mar, 2014

1 commit

  • b505183b5   pwm: Add Freescale FTM PWM driver support ... Browse Code »

    The FTM PWM device can be found on Vybrid VF610 Tower and
    Layerscape LS-1 SoCs.

    Signed-off-by: Xiubo Li
    Signed-off-by: Alison Wang
    Signed-off-by: Jingchang Lu
    Reviewed-by: Sascha Hauer
    Reviewed-by: Yuan Yao
    Signed-off-by: Thierry Reding

    Xiubo Li