30 Jun, 2016
1 commit
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OMAP GP timers can have different input clocks that allow different PWM
frequencies. However, there is no other way of setting the clock source but
through clocks or clock-names properties of the timer itself. This limits
PWM functionality to only the frequencies allowed by the particular clock
source. Allowing setting the clock source by PWM rather than by timer
allows different PWMs to have different ranges by not hard-wiring the clock
source to the timer.Signed-off-by: Ivaylo Dimitrov
Acked-by: Rob Herring
Acked-by: Thierry Reding
Acked-by: Pali Rohár
Signed-off-by: Tony Lindgren
17 May, 2016
1 commit
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Use pwm_get/set_xxx() helpers instead of directly accessing the pwm->xxx
field. Doing that will ease adaptation of the PWM framework to support
atomic update.Signed-off-by: Boris Brezillon
Signed-off-by: Thierry Reding
24 Mar, 2016
4 commits
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After going through the math and constraints checking to compute load
and match values, it is helpful to know what the resultant period and
duty cycle are.Signed-off-by: David Rivshin
Acked-by: Neil Armstrong
Signed-off-by: Thierry Reding -
When converting period and duty_cycle from nanoseconds to fclk cycles,
the error introduced by the integer division can be appreciable, especially
in the case of slow fclk or short period. Use DIV_ROUND_CLOSEST_ULL() so
that the error is kept to +/- 0.5 clock cycles.Fixes: 6604c6556db9 ("pwm: Add PWM driver for OMAP using dual-mode timers")
Signed-off-by: David Rivshin
Acked-by: Neil Armstrong
Signed-off-by: Thierry Reding -
Add sanity checking to ensure that we do not program load or match values
that are out of range if a user requests period or duty_cycle values which
are not achievable. The match value cannot be less than the load value (but
can be equal), and neither can be 0xffffffff. This means that there must be
at least one fclk cycle between load and match, and another between match
and overflow.Fixes: 6604c6556db9 ("pwm: Add PWM driver for OMAP using dual-mode timers")
Signed-off-by: David Rivshin
Acked-by: Neil Armstrong
[thierry.reding@gmail.com: minor coding style cleanups]
Signed-off-by: Thierry Reding -
Fix the calculation of load_value and match_value. Currently they
are slightly too low, which produces a noticeably wrong PWM rate with
sufficiently short periods (i.e. when 1/period approaches clk_rate/2).Example:
clk_rate=32768Hz, period=122070ns, duty_cycle=61035ns (8192Hz/50% PWM)
Correct values: load = 0xfffffffc, match = 0xfffffffd
Current values: load = 0xfffffffa, match = 0xfffffffc
effective PWM: period=183105ns, duty_cycle=91553ns (5461Hz/50% PWM)Fixes: 6604c6556db9 ("pwm: Add PWM driver for OMAP using dual-mode timers")
Signed-off-by: David Rivshin
Acked-by: Neil Armstrong
Tested-by: Adam Ford
Signed-off-by: Thierry Reding
04 Jan, 2016
1 commit
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"omap" is NULL so we can't dereference it.
Signed-off-by: Dan Carpenter
Signed-off-by: Thierry Reding
17 Dec, 2015
1 commit
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Adds support for using a OMAP dual-mode timer with PWM capability
as a Linux PWM device. The driver controls the timer by using the
dmtimer API.Add a platform_data structure for each pwm-omap-dmtimer nodes containing
the dmtimers functions in order to get driver not rely on platform
specific functions.Cc: Grant Erickson
Cc: NeilBrown
Cc: Joachim Eastwood
Suggested-by: Tony Lindgren
Signed-off-by: Neil Armstrong
Acked-by: Tony Lindgren
[thierry.reding@gmail.com: coding style bikeshed, fix timer leak]
Signed-off-by: Thierry Reding
