26 May, 2018
2 commits
-
** Not yet queued for inclusion in mainline **
In order to prevent aliasing attacks on the branch predictor,
invalidate the BTB on CPUs that are known to be affected when taking
a prefetch abort on a address that is outside of a user task limit.Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
Signed-off-by: Alex Shi -
** Not yet queued for inclusion in mainline **
In order to avoid aliasing attacks against the branch predictor,
some implementations require to invalidate the BTB when switching
from one user context to another.For this, we reuse the existing implementation for Cortex-A8, and
apply it to A9, A12 and A17.Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
Signed-off-by: Alex Shi
11 May, 2018
1 commit
-
Enable regulatory rules database config:
CONFIG_CFG80211_INTERNAL_REGDBSigned-off-by: Fugang Duan
Reviewed-by: Haibo Chen
(cherry picked from commit: 99a27c4880a091d74ab5e3fb112a2d778f7c26b0)
08 May, 2018
1 commit
-
commit b62dd733a100 ("MLK-18127 ARM: dts: imx7ulp-evk: few correction
for usdhc1") add property "no-1-8-v" for the usdhc1 which limit the
wifi. The sd slot on base board share this usdhc1, so the usdhc1
in imx7ulp-evk-sd1.dts also inherit this property.delete the "no-1-8-v" property, then the sd slot can support SD3.0
Signed-off-by: Haibo Chen
(cherry picked from commit 6cb30044642b43f9e55d63beca61bc1397d3d996)
07 May, 2018
1 commit
-
Enable the AHCI_IMX defaultly in imx_v7_defconfig
Signed-off-by: Richard Zhu
(cherry picked from commit a090146de2ef4be0ac9ccf2225a5bb4926a503dd)
03 May, 2018
1 commit
-
The MIPI DSI config the DPI as 480 * 854, so correct the touch
display-coords property, to aligned with MIPI DSI.Signed-off-by: Haibo Chen
(cherry picked from commit a00aa0ea7199fb04e425a49a4221d9202782eecf)
25 Apr, 2018
1 commit
-
Currently, WiFi only work on SDIO2.0 mode, so add property
"no-1-8-v", otherwise following warning log will be printsdhci-esdhc-imx 40380000.usdhc: could not get ultra high speed state, work on normal mode
The regulator reg_vsd_3v3 and reg_sd1_vmmc has the same
regulator name, so will trigger the following error log:VSD_3V3: Failed to create debugfs directory
So change the regulator name of reg_sd1_vmmc.
According to the spec suggestion, ibe need to be enabled
for usdhc clock pin, and clock is better to pull down.Signed-off-by: Haibo Chen
(cherry picked from commit b62dd733a100e35e93543642149bcf8b61e13242)
24 Apr, 2018
1 commit
-
fix audio bus mode hang issue on imx6sl. The root cause of
this issue is that busfreq mode passed to TEE side is wrong,
it will lead to ccm setting is wrong in TEE.Signed-off-by: Bai Ping
Tested-by: Anson huang
20 Apr, 2018
5 commits
-
Fixes: a6fd1613cca4 ("MLK-18036-2 Delete *optee.dts files")
Signed-off-by: Leonard Crestez
Reviewed-by: Clement Faure
(cherry picked from commit 4706425bb745850c8d28608ebcaffd239a945e63) -
A specific node for OCRAM mapping in optee as been added in
the device tree. These dedicated optee device trees can be
removed.Signed-off-by: Clement Faure
Acked-by: Peng Fan
(cherry picked from commit a6fd1613cca4a5008c347d4473b92b119385644c) -
This node will be used by the OCRAM driver in optee to:
* Get the OCRAM start address for power management in optee.
* Add an entry that will overwrite ocrams nodes and dynamically reduce
the OCRAM available for mmio-sram in Linux.That way we do not touch the legacy Linux boot and remove the dedicated
optee device tree.Signed-off-by: Clement Faure
Reviewed-by: Peng Fan
(cherry picked from commit e96a3bcd754dee0aef3519bc08979985493be52c) -
This change affects all i.MX 6 with PL310 L2 Cache controller.
When Linux runs in Non-secure World the PL310 has already
been initialized by the ARM secure World running OP-TEE os.
However, in order to have a proper Linux Initialization all the
L2 cache ways have been locked by the secure world.This patch unlock all the ways during pl310 initialization.
Signed-off-by: Cedric Neveux
(cherry picked from commit be7971b62e0c77cf70f828868a5d5a4184a926d2) -
7ULP uses the same mmdc profiling block as i.mx6q. Added the
"fsl,imx6q-mmdc" compatible string to enable the mmdc profiling
feature.Signed-off-by: Shenwei Wang
18 Apr, 2018
1 commit
-
Signed-off-by: Franck LENORMAND
(cherry picked from commit 0b122f882429a82274fc99439b5d73986b731672)
17 Apr, 2018
1 commit
-
On the i.MX7ULP EVK Rev.B baord, the backlight brigntness driver circuit
is updated. A RC filter is added on the MP3301's EN pin. So the PWM's frequency
should be change to 20KHZ. for EN pin, A DC voltage from 0.7V to 1.4V can control
the LED current from 0% to 100%. the backlight brightness level also need to be
updated.Signed-off-by: Bai Ping
Reviewed-by: Anson Huang
(cherry picked from commit 82555e15a5f958c09492d0103425dc30bc7cd927)
13 Apr, 2018
3 commits
-
The default display interface on i.MX7ULP EVK board is the HDMI
interface, and a hardware rework is required to support the MIPI
panel. To match the current board design, added the HDMI node in
the imx7ulp-evk.dts and created a new file named imx7ulp-evk-mipi.dts.Signed-off-by: Shenwei Wang
Reviewed-by: Andy Duan -
commit a56e6e190015 ("MLK-17961 dts: imx7ulp-evk: add non-removable
property for wifi sdio") add non-removable property, sd1 slot on
base board share the same usdhc with wifi, and the sd1 slot support
card detect, so for sd1 slot, need to remove the non-removable
property.Signed-off-by: Haibo Chen
Reviewed-by: Andy Duan
(cherry picked from commit 2a40d8123aff4b4fb7a5cbf286d0c308a42c2fc7) -
This patch fix resume failure in freeze suspend mode on i.mx7ULP
("echo freeze > /sys/power/state") while pressing onoff key or
enabling rtc alarm wakeup. In freeze mode, kernel can only be woken
up by drivers which register wakup source such as 'device_init_wakeup'
or 'irq_set_irq_wake', otherwise, kernel will wait for irq handler
freeze_wake(). Unfortunately, our NMI interrupt which used to wakeup
A7 by M4 is not a common device and request irq as 'IRQF_NO_SUSPEND'
which means feeze_wake() never get chance to run while wakeup by any
event from M4 such as RTC, ONOFF. In this case, use pm_system_wakeup()
instead in NMI interrupt handle to trigger freeze_wake() directly.Signed-off-by: Robin Gong
Reviewed-by: Anson Huang
12 Apr, 2018
14 commits
-
Add poweron key support on i.mx7ulp-evk board since M4 take
over snvs on B0 chip.Signed-off-by: Robin Gong
Reviewed-by: Anson Huang -
Add non-removable property for usdhc1 that is used as Murata
1PJ wifi sdio interface, which means wifi card always is present.Signed-off-by: Shenwei Wang
Signed-off-by: Fugang Duan
Tested-by: Fugang Duan -
commit 6167ec5c9145 upstream.
A new feature of SMCCC 1.1 is that it offers firmware-based CPU
workarounds. In particular, SMCCC_ARCH_WORKAROUND_1 provides
BP hardening for CVE-2017-5715.If the host has some mitigation for this issue, report that
we deal with it using SMCCC_ARCH_WORKAROUND_1, as we apply the
host workaround on every guest exit.Tested-by: Ard Biesheuvel
Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
no sve support in arch/arm64/include/asm/kvm_host.h
mv changes from virt/kvm/arm/psci.c to arch/arm/kvm/psci.c
using cpus_have_cap instead of cpus_have_const_cap -
commit a4097b351118 upstream.
We're about to need kvm_psci_version in HYP too. So let's turn it
into a static inline, and pass the kvm structure as a second
parameter (so that HYP can do a kern_hyp_va on it).Tested-by: Ard Biesheuvel
Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
mv changes from virt/kvm/arm/psci.c to arch/arm/kvm/psci.c -
commit 09e6be12effd upstream.
The new SMC Calling Convention (v1.1) allows for a reduced overhead
when calling into the firmware, and provides a new feature discovery
mechanism.Make it visible to KVM guests.
Tested-by: Ard Biesheuvel
Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
mv change from virt/kvm/arm/psci.c to arch/arm/kvm/psci.c -
commit 58e0b2239a4d upstream.
PSCI 1.0 can be trivially implemented by providing the FEATURES
call on top of PSCI 0.2 and returning 1.0 as the PSCI version.We happily ignore everything else, as they are either optional or
are clarifications that do not require any additional change.PSCI 1.0 is now the default until we decide to add a userspace
selection API.Reviewed-by: Christoffer Dall
Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
mv chagnes from virt/kvm/arm/psci.c to arch/arm/kvm/psci.c -
commit 84684fecd7ea upstream.
Instead of open coding the accesses to the various registers,
let's add explicit SMCCC accessors.Reviewed-by: Christoffer Dall
Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
mv change from virt/kvm/arm/psci.c to arch/arm/kvm/psci.c -
commit d0a144f12a7c upstream.
As we're about to trigger a PSCI version explosion, it doesn't
hurt to introduce a PSCI_VERSION helper that is going to be
used everywhere.Reviewed-by: Christoffer Dall
Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
mv change form virt/kvm/arm/psci.c to arch/arm/kvm/psci.c -
commit 1a2fb94e6a77 upstream.
As we're about to update the PSCI support, and because I'm lazy,
let's move the PSCI include file to include/kvm so that both
ARM architectures can find it.Acked-by: Christoffer Dall
Tested-by: Ard Biesheuvel
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
need kvm/arm_psci.h in files:
arch/arm64/kvm/handle_exit.c
arch/arm/kvm/psci.c and arch/arm/kvm/arm.c
no virt/kvm/arm/arm.c and virt/kvm/arm/psci.c -
commit 6840bdd73d07 upstream
Now that we have per-CPU vectors, let's plug then in the KVM/arm64 code.
Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
Signed-off-by: Alex ShiConflicts:
mv changes from virt/kvm/arm/arm.c to arch/arm/kvm/arm.c -
Confirm with IC, HS400 MAX clock Freq for Instance 0 is 198Mhz
and for Instance 1 is 192MHz, so set the usdhc parent clock at
396MHz, due to current APLL is config to 529.2MHz, use the formula
APLL_PFD clock = APLL * 18 / i, the nearest clock is 381.024MHz when
the i is 25, so the usdhc root clock is 190.512MHz.But eMMC HS400 can't pass stress test at 190.512MHz, will meet CRC
error sometimes, only when down to 176.4MHz can pass the stress test.This patch make the usdhc0 and usdhc1 root clock both source from
IMX7ULP_CLK_APLL_PFD1, and set this APLL_PFD1 clcok rate at 352.8MHz,
and set the USDHC0 root clock at 352.8MHz, and set the USDHC1 root
clock at 176.4MHz.Also remove the clk_prepare_enable() and clk_disable_unprepare() for
APLL_PFD2, bacause U-Boot already gate off APLL_PFD1, not need to do
this again.Acked-by: Dong Aisheng
Signed-off-by: Haibo Chen -
USDHC internal IC data handle bug already fixed on i.MX7ULP B0, so add
HS200 support first.To let HS200 work on i.MX7ULP REV A3 board, need to do the following
rework, otherwise, switch to HS200 will always meet error, caused by
the voltage change make eMMC work not stable, this rework fix the eMMC
I/O voltage to 1.8v, align with the MMC spec.
1,remove TF sd slot, replace eMMC chip
2,fix eMMC I/O voltage to 1.8v, remove R183, short TP3 and TP89
3,add R107, make eMMC boot workFor i.MX7ULP REV B1 board, do not need this rework, board already fix the
eMMC I/O voltage to 1.8vAcked-by: Dong Aisheng
Signed-off-by: Haibo Chen -
Add rpmsg input config enable for i.MX7ULP.
Reviewed-by: Elven Wang
Signed-off-by: Fugang Duan -
Enable rpmsg input device like sensor support for i.MX7ULP B0
EVK board.Reviewed-by: Elven Wang
Signed-off-by: Fugang Duan
21 Mar, 2018
8 commits
-
Add support for imx7ulp SoC.
Signed-off-by: Silvano di Ninno
-
- Update iomux header for i.MX7ULP B0 silicon.
- Keep the pin func name prefix name is "IMX7ULP_" that align with
upstreaming kernel.
- Align the pin func name with header file for all dts files.Signed-off-by: Fugang Duan
Acked-by: Shenwei Wang -
Fixes commit 91558864ab21 ("MLK-13344-05 ARM: imx: Add cpuidle support on imx6sll")
Signed-off-by: Leonard Crestez
Reviewed-by: Jacky Bai -
Fixes commit e9f330efbe16 ("MLK-13344-04 ARM: imx: Add busfreq support on imx6sll")
Signed-off-by: Leonard Crestez
Reviewed-by: Jacky Bai -
Add wireless HOSTAP config enable for i.MX7ULP Murata 1PJ (Qca9377-3).
Reviewed-by: Gao Pan
Signed-off-by: Fugang Duan -
Enable enet1 for epdc extra dts file since only enet2 has pin conflict
with epdc.Reviewed-by: Gao Pan
Signed-off-by: Fugang Duan -
Add interrupt property for rpmsg io node.
Reviewed-by: Robin Gong
Signed-off-by: Fugang Duan -
Since some drivers using rpmsg io as wakeup source enable the wakeup
in suspend stage, then it has to ensure pm rpmsg driver pm sleep is
late suspended and early resumed, otherwise M4 will wakeup A core
directly even if there has no wakeup signal.Reviewed-by: Robin Gong
Signed-off-by: Fugang Duan
