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include/configs/trats.h
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/* * Copyright (C) 2011 Samsung Electronics * Heungjun Kim <riverful.kim@samsung.com> * * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board. * |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef __CONFIG_TRATS_H #define __CONFIG_TRATS_H |
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#include <configs/exynos4-dt.h> #define CONFIG_SYS_PROMPT "Trats # " /* Monitor Command Prompt */ #define CONFIG_TRATS |
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#undef CONFIG_DEFAULT_DEVICE_TREE #define CONFIG_DEFAULT_DEVICE_TREE exynos4210-trats |
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#define CONFIG_TIZEN /* TIZEN lib */ |
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#define CONFIG_SYS_L2CACHE_OFF |
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#ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 #endif |
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/* TRATS has 4 banks of DRAM */ #define CONFIG_NR_DRAM_BANKS 4 |
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#define CONFIG_SYS_SDRAM_BASE 0x40000000 |
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#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE |
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#define CONFIG_SYS_TEXT_BASE 0x63300000 |
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#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ |
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/* memtest works on */ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) |
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#define CONFIG_SYS_TEXT_BASE 0x63300000 |
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#include <linux/sizes.h> |
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/* Size of malloc() pool */ |
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M)) |
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/* select serial console configuration */ |
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#define CONFIG_SERIAL2 |
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#define CONFIG_BAUDRATE 115200 |
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/* Console configuration */ #define CONFIG_SYS_CONSOLE_INFO_QUIET #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* MACH_TYPE_TRATS macro will be removed once added to mach-types */ #define MACH_TYPE_TRATS 3928 #define CONFIG_MACH_TYPE MACH_TYPE_TRATS |
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#define CONFIG_BOOTARGS "Please use defined boot" #define CONFIG_BOOTCOMMAND "run mmcboot" |
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#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ #define CONFIG_SYS_MONITOR_BASE 0x00000000 |
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#define CONFIG_BOOTBLOCK "10" #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" |
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#define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV #define CONFIG_ENV_SIZE 4096 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ #define CONFIG_ENV_OVERWRITE #define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
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/* Tizen - partitions definitions */ #define PARTS_CSA "csa-mmc" |
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#define PARTS_BOOT "boot" |
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#define PARTS_QBOOT "qboot" #define PARTS_CSC "csc" |
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#define PARTS_ROOT "platform" #define PARTS_DATA "data" |
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#define PARTS_UMS "ums" #define PARTS_DEFAULT \ "uuid_disk=${uuid_gpt_disk};" \ |
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"name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \ |
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"name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ |
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"name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ |
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"name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ |
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#define CONFIG_DFU_ALT \ |
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"u-boot raw 0x80 0x400;" \ |
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"uImage ext4 0 2;" \ |
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"modem.bin ext4 0 2;" \ |
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"exynos4210-trats.dtb ext4 0 2;" \ |
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""PARTS_CSA" part 0 1;" \ |
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""PARTS_BOOT" part 0 2;" \ |
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""PARTS_QBOOT" part 0 3;" \ ""PARTS_CSC" part 0 4;" \ |
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""PARTS_ROOT" part 0 5;" \ ""PARTS_DATA" part 0 6;" \ |
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""PARTS_UMS" part 0 7;" \ |
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"params.bin raw 0x38 0x8\0" |
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#define CONFIG_EXTRA_ENV_SETTINGS \ "bootk=" \ |
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"run loaduimage;" \ "if run loaddtb; then " \ "bootm 0x40007FC0 - ${fdtaddr};" \ "fi;" \ "bootm 0x40007FC0;\0" \ |
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"updatemmc=" \ "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \ "mmc boot 0 1 1 0\0" \ "updatebackup=" \ "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \ "mmc boot 0 1 1 0\0" \ "updatebootb=" \ "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ "lpj=lpj=3981312\0" \ "nfsboot=" \ |
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"setenv bootargs root=/dev/nfs rw " \ |
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"nfsroot=${nfsroot},nolock,tcp " \ "ip=${ipaddr}:${serverip}:${gatewayip}:" \ "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ "; run bootk\0" \ "ramfsboot=" \ |
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"setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \ |
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"${console} ${meminfo} " \ "initrd=0x43000000,8M ramdisk=8192\0" \ "mmcboot=" \ |
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"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ |
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"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ |
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"run bootk\0" \ |
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"bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \ |
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"boottrace=setenv opts initcall_debug; run bootcmd\0" \ "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ "verify=n\0" \ "rootfstype=ext4\0" \ "console=" CONFIG_DEFAULT_CONSOLE \ "meminfo=crashkernel=32M@0x50000000\0" \ "nfsroot=/nfsroot/arm\0" \ "bootblock=" CONFIG_BOOTBLOCK "\0" \ |
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"loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ |
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"loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \ |
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"${fdtfile}\0" \ |
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"mmcdev=0\0" \ "mmcbootpart=2\0" \ |
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"mmcrootpart=5\0" \ |
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"opts=always_resume=1\0" \ |
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"partitions=" PARTS_DEFAULT \ |
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"dfu_alt_info=" CONFIG_DFU_ALT \ "spladdr=0x40000100\0" \ "splsize=0x200\0" \ "splfile=falcon.bin\0" \ "spl_export=" \ "setexpr spl_imgsize ${splsize} + 8 ;" \ |
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"setenv spl_imgsize 0x${spl_imgsize};" \ |
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"setexpr spl_imgaddr ${spladdr} - 8 ;" \ "setexpr spl_addr_tmp ${spladdr} - 4 ;" \ "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \ "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \ "spl export atags 0x40007FC0;" \ "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \ "mw.l ${spl_addr_tmp} ${splsize};" \ "ext4write mmc ${mmcdev}:${mmcbootpart}" \ " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \ "setenv spl_imgsize;" \ "setenv spl_imgaddr;" \ |
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"setenv spl_addr_tmp;\0" \ "fdtaddr=40800000\0" \ |
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/* Falcon mode definitions */ #define CONFIG_CMD_SPL |
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#define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100 |
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/* GPT */ |
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#define CONFIG_RANDOM_UUID |
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/* I2C */ #include <asm/arch/gpio.h> |
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#define CONFIG_CMD_I2C |
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#define CONFIG_SYS_I2C |
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#define CONFIG_SYS_I2C_S3C24X0 #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0xFE #define CONFIG_MAX_I2C_NUM 8 |
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#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ #define CONFIG_SYS_I2C_SOFT_SPEED 50000 |
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#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F |
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#define CONFIG_SOFT_I2C_READ_REPEATED_START |
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#define CONFIG_SYS_I2C_INIT_BOARD |
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/* I2C FG */ |
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#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(2, y4, 1) #define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(2, y4, 0) |
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/* POWER */ |
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#define CONFIG_POWER #define CONFIG_POWER_I2C #define CONFIG_POWER_MAX8997 |
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#define CONFIG_POWER_FG #define CONFIG_POWER_FG_MAX17042 |
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#define CONFIG_POWER_MUIC #define CONFIG_POWER_MUIC_MAX8997 |
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#define CONFIG_POWER_BATTERY #define CONFIG_POWER_BATTERY_TRATS |
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/* Security subsystem - enable hw_rand() */ #define CONFIG_EXYNOS_ACE_SHA #define CONFIG_LIB_HW_RAND |
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/* Common misc for Samsung */ #define CONFIG_MISC_COMMON #define CONFIG_MISC_INIT_R |
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/* Download menu - Samsung common */ #define CONFIG_LCD_MENU #define CONFIG_LCD_MENU_BOARD /* Download menu - definitions for check keys */ #ifndef __ASSEMBLY__ #include <power/max8997_pmic.h> #define KEY_PWR_PMIC_NAME "MAX8997_PMIC" #define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1 #define KEY_PWR_STATUS_MASK (1 << 0) #define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1 #define KEY_PWR_INTERRUPT_MASK (1 << 0) #define KEY_VOL_UP_GPIO exynos4_gpio_get(2, x2, 0) #define KEY_VOL_DOWN_GPIO exynos4_gpio_get(2, x2, 1) #endif /* __ASSEMBLY__ */ /* LCD console */ #define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK |
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/* LCD */ #define CONFIG_EXYNOS_FB #define CONFIG_LCD |
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#define CONFIG_CMD_BMP |
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#define CONFIG_BMP_16BPP |
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#define CONFIG_FB_ADDR 0x52504000 #define CONFIG_S6E8AX0 #define CONFIG_EXYNOS_MIPI_DSIM |
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#define CONFIG_VIDEO_BMP_GZIP |
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#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) |
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#define LCD_XRES 720 #define LCD_YRES 1280 |
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#endif /* __CONFIG_H */ |