Eric Lee / smarc-uboot

46
Download as
Browse Code »

Commit fe60164792e56aba74a2c4b8170612806a50f552

Authored by Piotr Wilczek
Committed by Minkyu Kang
1 parent 3f41ffe4b5
Exists in v2017.01-smarct4x and in 48 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

board:trats: Enable device tree on Trats 

This patch enables to run Trats board on device tree.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

Showing 4 changed files with 185 additions and 357 deletions Side-by-side Diff

arch/arm/dts/Makefile
Diff comments   View file @ fe60164
1 1 dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
2   - exynos4210-universal_c210.dtb
  2 + exynos4210-universal_c210.dtb \
  3 + exynos4210-trats.dtb
3 4  
4 5 dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
5 6 exynos5250-snow.dtb \
arch/arm/dts/exynos4210-trats.dts
Diff comments   View file @ fe60164
  1 +/*
  2 + * Samsung's Exynos4210 based Trats board device tree source
  3 + *
  4 + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
  5 + * http://www.samsung.com
  6 + *
  7 + * SPDX-License-Identifier: GPL-2.0+
  8 + */
  9 +
  10 +/dts-v1/;
  11 +/include/ "exynos4.dtsi"
  12 +
  13 +/ {
  14 + model = "Samsung Trats based on Exynos4210";
  15 + compatible = "samsung,trats", "samsung,exynos4210";
  16 +
  17 + config {
  18 + samsung,dsim-device-name = "s6e8ax0";
  19 + };
  20 +
  21 + aliases {
  22 + i2c0 = "/i2c@13860000";
  23 + i2c1 = "/i2c@13870000";
  24 + i2c2 = "/i2c@13880000";
  25 + i2c3 = "/i2c@13890000";
  26 + i2c4 = "/i2c@138a0000";
  27 + i2c5 = "/i2c@138b0000";
  28 + i2c6 = "/i2c@138c0000";
  29 + i2c7 = "/i2c@138d0000";
  30 + serial0 = "/serial@13800000";
  31 + console = "/serial@13820000";
  32 + mmc0 = "sdhci@12510000";
  33 + mmc2 = "sdhci@12530000";
  34 + };
  35 +
  36 + fimd@11c00000 {
  37 + compatible = "samsung,exynos-fimd";
  38 + reg = <0x11c00000 0xa4>;
  39 +
  40 + samsung,vl-freq = <60>;
  41 + samsung,vl-col = <720>;
  42 + samsung,vl-row = <1280>;
  43 + samsung,vl-width = <720>;
  44 + samsung,vl-height = <1280>;
  45 +
  46 + samsung,vl-clkp = <0>;
  47 + samsung,vl-oep = <0>;
  48 + samsung,vl-hsp = <1>;
  49 + samsung,vl-vsp = <1>;
  50 + samsung,vl-dp = <1>;
  51 + samsung,vl-bpix = <4>;
  52 +
  53 + samsung,vl-hspw = <5>;
  54 + samsung,vl-hbpd = <10>;
  55 + samsung,vl-hfpd = <10>;
  56 + samsung,vl-vspw = <2>;
  57 + samsung,vl-vbpd = <1>;
  58 + samsung,vl-vfpd = <13>;
  59 + samsung,vl-cmd-allow-len = <0xf>;
  60 +
  61 + samsung,winid = <3>;
  62 + samsung,power-on-delay = <30>;
  63 + samsung,interface-mode = <1>;
  64 + samsung,mipi-enabled = <1>;
  65 + samsung,dp-enabled;
  66 + samsung,dual-lcd-enabled;
  67 +
  68 + samsung,logo-on = <1>;
  69 + samsung,resolution = <0>;
  70 + samsung,rgb-mode = <0>;
  71 + };
  72 +
  73 + mipidsi@11c80000 {
  74 + compatible = "samsung,exynos-mipi-dsi";
  75 + reg = <0x11c80000 0x5c>;
  76 +
  77 + samsung,dsim-config-e-interface = <1>;
  78 + samsung,dsim-config-e-virtual-ch = <0>;
  79 + samsung,dsim-config-e-pixel-format = <7>;
  80 + samsung,dsim-config-e-burst-mode = <1>;
  81 + samsung,dsim-config-e-no-data-lane = <3>;
  82 + samsung,dsim-config-e-byte-clk = <0>;
  83 + samsung,dsim-config-hfp = <1>;
  84 +
  85 + samsung,dsim-config-p = <3>;
  86 + samsung,dsim-config-m = <120>;
  87 + samsung,dsim-config-s = <1>;
  88 +
  89 + samsung,dsim-config-pll-stable-time = <500>;
  90 + samsung,dsim-config-esc-clk = <20000000>;
  91 + samsung,dsim-config-stop-holding-cnt = <0x7ff>;
  92 + samsung,dsim-config-bta-timeout = <0xff>;
  93 + samsung,dsim-config-rx-timeout = <0xffff>;
  94 +
  95 + samsung,dsim-device-id = <0xffffffff>;
  96 + samsung,dsim-device-bus-id = <0>;
  97 +
  98 + samsung,dsim-device-reverse-panel = <1>;
  99 + };
  100 +
  101 + sdhci@12510000 {
  102 + samsung,bus-width = <8>;
  103 + samsung,timing = <1 3 3>;
  104 + pwr-gpios = <&gpio 0x2008002 0>;
  105 + };
  106 +
  107 + sdhci@12520000 {
  108 + status = "disabled";
  109 + };
  110 +
  111 + sdhci@12530000 {
  112 + samsung,bus-width = <4>;
  113 + samsung,timing = <1 2 3>;
  114 + cd-gpios = <&gpio 0x20c6004 0>;
  115 + };
  116 +
  117 + sdhci@12540000 {
  118 + status = "disabled";
  119 + };
  120 +};
board/samsung/trats/trats.c
Diff comments   View file @ fe60164
... ... @@ -12,23 +12,20 @@
12 12 #include <asm/io.h>
13 13 #include <asm/arch/cpu.h>
14 14 #include <asm/arch/gpio.h>
15   -#include <asm/arch/mmc.h>
16 15 #include <asm/arch/pinmux.h>
17 16 #include <asm/arch/clock.h>
18   -#include <asm/arch/clk.h>
19 17 #include <asm/arch/mipi_dsim.h>
20 18 #include <asm/arch/watchdog.h>
21 19 #include <asm/arch/power.h>
22 20 #include <power/pmic.h>
23 21 #include <usb/s3c_udc.h>
24 22 #include <power/max8997_pmic.h>
25   -#include <libtizen.h>
26 23 #include <power/max8997_muic.h>
27 24 #include <power/battery.h>
28 25 #include <power/max17042_fg.h>
  26 +#include <libtizen.h>
29 27 #include <usb.h>
30 28 #include <usb_mass_storage.h>
31   -#include <samsung/misc.h>
32 29  
33 30 #include "setup.h"
34 31  
35 32  
... ... @@ -46,10 +43,8 @@
46 43 static void check_hw_revision(void);
47 44 struct s3c_plat_otg_data s5pc210_otg_data;
48 45  
49   -int board_init(void)
  46 +int exynos_init(void)
50 47 {
51   - gd->bd->bi_boot_params = CONFIG_SYS_SPL_ARGS_ADDR;
52   -
53 48 check_hw_revision();
54 49 printf("HW Revision:\t0x%x\n", board_rev);
55 50  
... ... @@ -281,7 +276,7 @@
281 276 return 0;
282 277 }
283 278  
284   -int power_init_board(void)
  279 +int exynos_power_init(void)
285 280 {
286 281 int chrg, ret;
287 282 struct power_battery *pb;
... ... @@ -350,28 +345,6 @@
350 345 return 0;
351 346 }
352 347  
353   -int dram_init(void)
354   -{
355   - gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
356   - get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
357   - get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
358   - get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
359   -
360   - return 0;
361   -}
362   -
363   -void dram_init_banksize(void)
364   -{
365   - gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
366   - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
367   - gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
368   - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
369   - gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
370   - gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
371   - gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
372   - gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
373   -}
374   -
375 348 static unsigned int get_hw_revision(void)
376 349 {
377 350 struct exynos4_gpio_part1 *gpio =
378 351  
... ... @@ -404,56 +377,7 @@
404 377 board_rev |= hwrev;
405 378 }
406 379  
407   -#ifdef CONFIG_DISPLAY_BOARDINFO
408   -int checkboard(void)
409   -{
410   - puts("Board:\tTRATS\n");
411   - return 0;
412   -}
413   -#endif
414 380  
415   -#ifdef CONFIG_GENERIC_MMC
416   -int board_mmc_init(bd_t *bis)
417   -{
418   - struct exynos4_gpio_part2 *gpio =
419   - (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
420   - int err;
421   -
422   - /* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
423   - s5p_gpio_direction_output(&gpio->k0, 2, 1);
424   - s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
425   -
426   - /*
427   - * MMC device init
428   - * mmc0 : eMMC (8-bit buswidth)
429   - * mmc2 : SD card (4-bit buswidth)
430   - */
431   - err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
432   - if (err)
433   - debug("SDMMC0 not configured\n");
434   - else
435   - err = s5p_mmc_init(0, 8);
436   -
437   - /* T-flash detect */
438   - s5p_gpio_cfg_pin(&gpio->x3, 4, 0xf);
439   - s5p_gpio_set_pull(&gpio->x3, 4, GPIO_PULL_UP);
440   -
441   - /*
442   - * Check the T-flash detect pin
443   - * GPX3[4] T-flash detect pin
444   - */
445   - if (!s5p_gpio_get_value(&gpio->x3, 4)) {
446   - err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
447   - if (err)
448   - debug("SDMMC2 not configured\n");
449   - else
450   - err = s5p_mmc_init(2, 4);
451   - }
452   -
453   - return err;
454   -}
455   -#endif
456   -
457 381 #ifdef CONFIG_USB_GADGET
458 382 static int s5pc210_phy_control(int on)
459 383 {
460 384  
461 385  
462 386  
463 387  
464 388  
... ... @@ -599,38 +523,22 @@
599 523 writel(0, (unsigned int)&pwr->arm_core1_configuration);
600 524 }
601 525  
602   -static void board_uart_init(void)
  526 +static void exynos_uart_init(void)
603 527 {
604   - struct exynos4_gpio_part1 *gpio1 =
605   - (struct exynos4_gpio_part1 *)samsung_get_base_gpio_part1();
606 528 struct exynos4_gpio_part2 *gpio2 =
607 529 (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
608   - int i;
609 530  
610   - /*
611   - * UART2 GPIOs
612   - * GPA1CON[0] = UART_2_RXD(2)
613   - * GPA1CON[1] = UART_2_TXD(2)
614   - * GPA1CON[2] = I2C_3_SDA (3)
615   - * GPA1CON[3] = I2C_3_SCL (3)
616   - */
617   -
618   - for (i = 0; i < 4; i++) {
619   - s5p_gpio_set_pull(&gpio1->a1, i, GPIO_PULL_NONE);
620   - s5p_gpio_cfg_pin(&gpio1->a1, i, GPIO_FUNC((i > 1) ? 0x3 : 0x2));
621   - }
622   -
623 531 /* UART_SEL GPY4[7] (part2) at EXYNOS4 */
624 532 s5p_gpio_set_pull(&gpio2->y4, 7, GPIO_PULL_UP);
625 533 s5p_gpio_direction_output(&gpio2->y4, 7, 1);
626 534 }
627 535  
628   -int board_early_init_f(void)
  536 +int exynos_early_init_f(void)
629 537 {
630 538 wdt_stop();
631 539 pmic_reset();
632 540 board_clock_init();
633   - board_uart_init();
  541 + exynos_uart_init();
634 542 board_power_init();
635 543  
636 544 return 0;
... ... @@ -648,7 +556,7 @@
648 556 s5p_gpio_direction_output(&gpio2->y4, 5, 1);
649 557 }
650 558  
651   -static int lcd_power(void)
  559 +int lcd_power(void)
652 560 {
653 561 int ret = 0;
654 562 struct pmic *p = pmic_get("MAX8997_PMIC");
... ... @@ -671,46 +579,7 @@
671 579 return 0;
672 580 }
673 581  
674   -static struct mipi_dsim_config dsim_config = {
675   - .e_interface = DSIM_VIDEO,
676   - .e_virtual_ch = DSIM_VIRTUAL_CH_0,
677   - .e_pixel_format = DSIM_24BPP_888,
678   - .e_burst_mode = DSIM_BURST_SYNC_EVENT,
679   - .e_no_data_lane = DSIM_DATA_LANE_4,
680   - .e_byte_clk = DSIM_PLL_OUT_DIV8,
681   - .hfp = 1,
682   -
683   - .p = 3,
684   - .m = 120,
685   - .s = 1,
686   -
687   - /* D-PHY PLL stable time spec :min = 200usec ~ max 400usec */
688   - .pll_stable_time = 500,
689   -
690   - /* escape clk : 10MHz */
691   - .esc_clk = 20 * 1000000,
692   -
693   - /* stop state holding counter after bta change count 0 ~ 0xfff */
694   - .stop_holding_cnt = 0x7ff,
695   - /* bta timeout 0 ~ 0xff */
696   - .bta_timeout = 0xff,
697   - /* lp rx timeout 0 ~ 0xffff */
698   - .rx_timeout = 0xffff,
699   -};
700   -
701   -static struct exynos_platform_mipi_dsim s6e8ax0_platform_data = {
702   - .lcd_panel_info = NULL,
703   - .dsim_config = &dsim_config,
704   -};
705   -
706   -static struct mipi_dsim_lcd_device mipi_lcd_device = {
707   - .name = "s6e8ax0",
708   - .id = -1,
709   - .bus_id = 0,
710   - .platform_data = (void *)&s6e8ax0_platform_data,
711   -};
712   -
713   -static int mipi_power(void)
  582 +int mipi_power(void)
714 583 {
715 584 int ret = 0;
716 585 struct pmic *p = pmic_get("MAX8997_PMIC");
717 586  
718 587  
719 588  
720 589  
721 590  
722 591  
... ... @@ -733,76 +602,14 @@
733 602 return 0;
734 603 }
735 604  
736   -vidinfo_t panel_info = {
737   - .vl_freq = 60,
738   - .vl_col = 720,
739   - .vl_row = 1280,
740   - .vl_width = 720,
741   - .vl_height = 1280,
742   - .vl_clkp = CONFIG_SYS_HIGH,
743   - .vl_hsp = CONFIG_SYS_LOW,
744   - .vl_vsp = CONFIG_SYS_LOW,
745   - .vl_dp = CONFIG_SYS_LOW,
746   - .vl_bpix = 4, /* Bits per pixel, 2^4 = 16 */
747   -
748   - /* s6e8ax0 Panel infomation */
749   - .vl_hspw = 5,
750   - .vl_hbpd = 10,
751   - .vl_hfpd = 10,
752   -
753   - .vl_vspw = 2,
754   - .vl_vbpd = 1,
755   - .vl_vfpd = 13,
756   - .vl_cmd_allow_len = 0xf,
757   -
758   - .win_id = 3,
759   - .dual_lcd_enabled = 0,
760   -
761   - .init_delay = 0,
762   - .power_on_delay = 0,
763   - .reset_delay = 0,
764   - .interface_mode = FIMD_RGB_INTERFACE,
765   - .mipi_enabled = 1,
766   -};
767   -
768   -void init_panel_info(vidinfo_t *vid)
  605 +void exynos_lcd_misc_init(vidinfo_t *vid)
769 606 {
770   - vid->logo_on = 1,
771   - vid->resolution = HD_RESOLUTION,
772   - vid->rgb_mode = MODE_RGB_P,
773   -
774 607 #ifdef CONFIG_TIZEN
775 608 get_tizen_logo_info(vid);
776 609 #endif
777   - mipi_lcd_device.reverse_panel = 1;
778   -
779   - strcpy(s6e8ax0_platform_data.lcd_panel_name, mipi_lcd_device.name);
780   - s6e8ax0_platform_data.lcd_power = lcd_power;
781   - s6e8ax0_platform_data.mipi_power = mipi_power;
782   - s6e8ax0_platform_data.phy_enable = set_mipi_phy_ctrl;
783   - s6e8ax0_platform_data.lcd_panel_info = (void *)vid;
784   - exynos_mipi_dsi_register_lcd_device(&mipi_lcd_device);
  610 +#ifdef CONFIG_S6E8AX0
785 611 s6e8ax0_init();
786   - exynos_set_dsim_platform_data(&s6e8ax0_platform_data);
787   -
788 612 setenv("lcdinfo", "lcd=s6e8ax0");
789   -}
790   -
791   -#ifdef CONFIG_MISC_INIT_R
792   -int misc_init_r(void)
793   -{
794   -#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
795   - set_board_info();
796 613 #endif
797   -#ifdef CONFIG_LCD_MENU
798   - keys_init();
799   - check_boot_mode();
800   -#endif
801   -#ifdef CONFIG_CMD_BMP
802   - if (panel_info.logo_on)
803   - draw_logo();
804   -#endif
805   - return 0;
806 614 }
807   -#endif
include/configs/trats.h
Diff comments   View file @ fe60164
... ... @@ -7,119 +7,80 @@
7 7 * SPDX-License-Identifier: GPL-2.0+
8 8 */
9 9  
10   -#ifndef __CONFIG_H
11   -#define __CONFIG_H
  10 +#ifndef __CONFIG_TRATS_H
  11 +#define __CONFIG_TRATS_H
12 12  
13   -/*
14   - * High Level Configuration Options
15   - * (easy to change)
16   - */
17   -#define CONFIG_SAMSUNG /* in a SAMSUNG core */
18   -#define CONFIG_S5P /* which is in a S5P Family */
19   -#define CONFIG_EXYNOS4 /* which is in a EXYNOS4XXX */
20   -#define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */
21   -#define CONFIG_TRATS /* working with TRATS */
22   -#define CONFIG_TIZEN /* TIZEN lib */
  13 +#include <configs/exynos4-dt.h>
23 14  
24   -#include <asm/arch/cpu.h> /* get chip and board defs */
  15 +#define CONFIG_SYS_PROMPT "Trats # " /* Monitor Command Prompt */
25 16  
26   -#define CONFIG_ARCH_CPU_INIT
27   -#define CONFIG_DISPLAY_CPUINFO
28   -#define CONFIG_DISPLAY_BOARDINFO
  17 +#define CONFIG_TRATS
29 18  
  19 +#undef CONFIG_DEFAULT_DEVICE_TREE
  20 +#define CONFIG_DEFAULT_DEVICE_TREE exynos4210-trats
  21 +
  22 +#define CONFIG_TIZEN /* TIZEN lib */
  23 +
30 24 #define CONFIG_SYS_L2CACHE_OFF
31 25 #ifndef CONFIG_SYS_L2CACHE_OFF
32 26 #define CONFIG_SYS_L2_PL310
33 27 #define CONFIG_SYS_PL310_BASE 0x10502000
34 28 #endif
35 29  
  30 +/* TRATS has 4 banks of DRAM */
  31 +#define CONFIG_NR_DRAM_BANKS 4
36 32 #define CONFIG_SYS_SDRAM_BASE 0x40000000
  33 +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
37 34 #define CONFIG_SYS_TEXT_BASE 0x63300000
  35 +#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
38 36  
39   -/* input clock of PLL: TRATS has 24MHz input clock at EXYNOS4210 */
40   -#define CONFIG_SYS_CLK_FREQ_C210 24000000
41   -#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210
  37 +/* memtest works on */
  38 +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
  39 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
  40 +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
42 41  
43   -#define CONFIG_SETUP_MEMORY_TAGS
44   -#define CONFIG_CMDLINE_TAG
45   -#define CONFIG_REVISION_TAG
46   -#define CONFIG_CMDLINE_EDITING
47   -#define CONFIG_SKIP_LOWLEVEL_INIT
48   -#define CONFIG_BOARD_EARLY_INIT_F
  42 +#define CONFIG_SYS_TEXT_BASE 0x63300000
49 43  
50   -/* MACH_TYPE_TRATS macro will be removed once added to mach-types */
51   -#define MACH_TYPE_TRATS 3928
52   -#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
53   -
54 44 #include <linux/sizes.h>
55 45 /* Size of malloc() pool */
56 46 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
57 47  
58 48 /* select serial console configuration */
59   -#define CONFIG_SERIAL2 /* use SERIAL 2 */
  49 +#define CONFIG_SERIAL2
60 50 #define CONFIG_BAUDRATE 115200
61 51  
62   -/* MMC */
63   -#define CONFIG_GENERIC_MMC
64   -#define CONFIG_MMC
65   -#define CONFIG_S5P_SDHCI
66   -#define CONFIG_SDHCI
67   -#define CONFIG_MMC_SDMA
  52 +/* Console configuration */
  53 +#define CONFIG_SYS_CONSOLE_INFO_QUIET
  54 +#define CONFIG_SYS_CONSOLE_IS_IN_ENV
68 55  
69   -/* PWM */
70   -#define CONFIG_PWM
  56 +/* MACH_TYPE_TRATS macro will be removed once added to mach-types */
  57 +#define MACH_TYPE_TRATS 3928
  58 +#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
71 59  
72   -/* It should define before config_cmd_default.h */
73   -#define CONFIG_SYS_NO_FLASH
  60 +#define CONFIG_BOOTARGS "Please use defined boot"
  61 +#define CONFIG_BOOTCOMMAND "run mmcboot"
  62 +#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
74 63  
75   -/* Command definition */
76   -#include <config_cmd_default.h>
  64 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
  65 + - GENERATED_GBL_DATA_SIZE)
77 66  
78   -#undef CONFIG_CMD_FPGA
79   -#undef CONFIG_CMD_MISC
80   -#undef CONFIG_CMD_NET
81   -#undef CONFIG_CMD_NFS
82   -#undef CONFIG_CMD_XIMG
83   -#undef CONFIG_CMD_CACHE
84   -#undef CONFIG_CMD_ONENAND
85   -#undef CONFIG_CMD_MTDPARTS
86   -#define CONFIG_CMD_MMC
87   -#define CONFIG_CMD_DFU
88   -#define CONFIG_CMD_GPT
89   -#define CONFIG_CMD_SETEXPR
  67 +#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
90 68  
91   -/* FAT */
92   -#define CONFIG_CMD_FAT
93   -#define CONFIG_FAT_WRITE
  69 +#define CONFIG_SYS_MONITOR_BASE 0x00000000
94 70  
95   -/* USB Composite download gadget - g_dnl */
96   -#define CONFIG_USBDOWNLOAD_GADGET
  71 +#define CONFIG_BOOTBLOCK "10"
  72 +#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
97 73  
98   -/* TIZEN THOR downloader support */
99   -#define CONFIG_CMD_THOR_DOWNLOAD
100   -#define CONFIG_THOR_FUNCTION
  74 +#define CONFIG_ENV_IS_IN_MMC
  75 +#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
  76 +#define CONFIG_ENV_SIZE 4096
  77 +#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
101 78  
102   -#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
103   -#define DFU_DEFAULT_POLL_TIMEOUT 300
104   -#define CONFIG_DFU_FUNCTION
105   -#define CONFIG_DFU_MMC
  79 +#define CONFIG_ENV_OVERWRITE
106 80  
107   -/* USB Samsung's IDs */
108   -#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
109   -#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
110   -#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
111   -#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
112   -#define CONFIG_G_DNL_MANUFACTURER "Samsung"
  81 +#define CONFIG_ENV_VARS_UBOOT_CONFIG
  82 +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
113 83  
114   -#define CONFIG_BOOTDELAY 1
115   -#define CONFIG_ZERO_BOOTDELAY_CHECK
116   -#define CONFIG_BOOTARGS "Please use defined boot"
117   -#define CONFIG_BOOTCOMMAND "run mmcboot"
118   -
119   -#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
120   -#define CONFIG_BOOTBLOCK "10"
121   -#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
122   -
123 84 /* Tizen - partitions definitions */
124 85 #define PARTS_CSA "csa-mmc"
125 86 #define PARTS_BOOTLOADER "u-boot"
... ... @@ -150,13 +111,6 @@
150 111 ""PARTS_UMS" part 0 7;" \
151 112 "params.bin mmc 0x38 0x8\0"
152 113  
153   -#define CONFIG_ENV_OVERWRITE
154   -#define CONFIG_SYS_CONSOLE_INFO_QUIET
155   -#define CONFIG_SYS_CONSOLE_IS_IN_ENV
156   -
157   -#define CONFIG_ENV_VARS_UBOOT_CONFIG
158   -#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
159   -
160 114 #define CONFIG_EXTRA_ENV_SETTINGS \
161 115 "bootk=" \
162 116 "run loaduimage;" \
163 117  
164 118  
165 119  
... ... @@ -226,59 +180,14 @@
226 180 "setenv spl_addr_tmp;\0" \
227 181 "fdtaddr=40800000\0" \
228 182  
229   -
230   -/* Miscellaneous configurable options */
231   -#define CONFIG_SYS_LONGHELP /* undef to save memory */
232   -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
233   -#define CONFIG_SYS_PROMPT "TRATS # "
234   -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
235   -#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
236   -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
237   -/* Boot Argument Buffer Size */
238   -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
239   -/* memtest works on */
240   -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
241   -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
242   -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
243   -
244   -/* TRATS has 4 banks of DRAM */
245   -#define CONFIG_NR_DRAM_BANKS 4
246   -#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
247   -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
248   -#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
249   -#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
250   -#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
251   -#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
252   -#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
253   -#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
254   -#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
255   -
256   -#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
257   -
258   -#define CONFIG_SYS_MONITOR_BASE 0x00000000
259   -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
260   -
261   -#define CONFIG_ENV_IS_IN_MMC
262   -#define CONFIG_SYS_MMC_ENV_DEV 0
263   -#define CONFIG_ENV_SIZE 4096
264   -#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
265   -
266   -#define CONFIG_DOS_PARTITION
267   -#define CONFIG_EFI_PARTITION
268   -
269   -/* EXT4 */
270   -#define CONFIG_CMD_EXT4
271   -#define CONFIG_CMD_EXT4_WRITE
272 183 /* Falcon mode definitions */
273 184 #define CONFIG_CMD_SPL
274   -#define CONFIG_SYS_SPL_ARGS_ADDR PHYS_SDRAM_1 + 0x100
  185 +#define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100
275 186  
276   -/* GPT */
277   -#define CONFIG_EFI_PARTITION
278   -#define CONFIG_PARTITION_UUIDS
  187 +/* I2C */
  188 +#include <asm/arch/gpio.h>
279 189  
280   -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
281   -#define CONFIG_SYS_CACHELINE_SIZE 32
  190 +#define CONFIG_CMD_I2C
282 191  
283 192 #define CONFIG_SYS_I2C
284 193 #define CONFIG_SYS_I2C_S3C24X0
285 194  
... ... @@ -291,12 +200,11 @@
291 200 #define CONFIG_SOFT_I2C_READ_REPEATED_START
292 201 #define CONFIG_SYS_I2C_INIT_BOARD
293 202  
294   -#include <asm/arch/gpio.h>
295   -
296 203 /* I2C FG */
297 204 #define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(2, y4, 1)
298 205 #define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(2, y4, 0)
299 206  
  207 +/* POWER */
300 208 #define CONFIG_POWER
301 209 #define CONFIG_POWER_I2C
302 210 #define CONFIG_POWER_MAX8997
... ... @@ -307,11 +215,6 @@
307 215 #define CONFIG_POWER_MUIC_MAX8997
308 216 #define CONFIG_POWER_BATTERY
309 217 #define CONFIG_POWER_BATTERY_TRATS
310   -#define CONFIG_USB_GADGET
311   -#define CONFIG_USB_GADGET_S3C_UDC_OTG
312   -#define CONFIG_USB_GADGET_DUALSPEED
313   -#define CONFIG_USB_GADGET_VBUS_DRAW 2
314   -#define CONFIG_USB_CABLE_CHECK
315 218  
316 219 /* Common misc for Samsung */
317 220 #define CONFIG_MISC_COMMON
... ... @@ -351,11 +254,8 @@
351 254 #define CONFIG_VIDEO_BMP_GZIP
352 255 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
353 256  
354   -#define CONFIG_CMD_USB_MASS_STORAGE
355   -#define CONFIG_USB_GADGET_MASS_STORAGE
356   -
357   -/* Pass open firmware flat tree */
358   -#define CONFIG_OF_LIBFDT 1
  257 +#define LCD_XRES 720
  258 +#define LCD_YRES 1280
359 259  
360 260 #endif /* __CONFIG_H */