CONFIG_ARM=y

  CONFIG_ARCH_ZYNQMP=y

  CONFIG_SYS_TEXT_BASE=0x8000000

  CONFIG_SYS_MALLOC_F_LEN=0x8000

  CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm018 dc4"

  CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4"

  CONFIG_DEBUG_UART=y

  CONFIG_DISTRO_DEFAULTS=y

  CONFIG_FIT=y
  CONFIG_FIT_VERBOSE=y

  CONFIG_SPL_LOAD_FIT=y

  # CONFIG_DISPLAY_CPUINFO is not set

  # CONFIG_DISPLAY_BOARDINFO is not set

  CONFIG_SPL=y

  CONFIG_SPL_OS_BOOT=y

  CONFIG_SPL_RAM_SUPPORT=y
  CONFIG_SPL_RAM_DEVICE=y

  CONFIG_SYS_PROMPT="ZynqMP> "

  CONFIG_CMD_MEMTEST=y

  CONFIG_CMD_CLK=y

  # CONFIG_CMD_FLASH is not set

  CONFIG_CMD_FPGA_LOADBP=y
  CONFIG_CMD_FPGA_LOADP=y

  CONFIG_CMD_I2C=y

  CONFIG_CMD_MMC=y

  CONFIG_CMD_TFTPPUT=y

  CONFIG_CMD_TIME=y
  CONFIG_CMD_TIMER=y

  CONFIG_CMD_EXT4_WRITE=y

  # CONFIG_SPL_ISO_PARTITION is not set

  CONFIG_SPL_OF_CONTROL=y

  CONFIG_OF_EMBED=y

  CONFIG_ENV_IS_IN_FAT=y

  CONFIG_NET_RANDOM_ETHADDR=y

  CONFIG_SPL_DM=y

  CONFIG_SPL_DM_SEQ_ALIAS=y

  CONFIG_FPGA_XILINX=y
  CONFIG_FPGA_ZYNQMPPL=y

  CONFIG_DM_GPIO=y

  CONFIG_DM_I2C=y

  CONFIG_SYS_I2C_CADENCE=y

  CONFIG_MISC=y

  CONFIG_DM_MMC=y

  CONFIG_MMC_SDHCI=y

  CONFIG_MMC_SDHCI_ZYNQ=y

  CONFIG_SPI_FLASH=y
  CONFIG_SPI_FLASH_BAR=y
  CONFIG_SPI_FLASH_MACRONIX=y
  CONFIG_SPI_FLASH_SPANSION=y
  CONFIG_SPI_FLASH_STMICRO=y
  CONFIG_SPI_FLASH_WINBOND=y

  # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set

  CONFIG_PHY_MARVELL=y
  CONFIG_PHY_NATSEMI=y
  CONFIG_PHY_REALTEK=y
  CONFIG_PHY_TI=y
  CONFIG_PHY_VITESSE=y

  CONFIG_DM_ETH=y

  CONFIG_PHY_GIGE=y

  CONFIG_ZYNQ_GEM=y

  CONFIG_DEBUG_UART_ZYNQ=y
  CONFIG_DEBUG_UART_BASE=0xff000000
  CONFIG_DEBUG_UART_CLOCK=100000000
  CONFIG_DEBUG_UART_ANNOUNCE=y

  CONFIG_ZYNQ_SERIAL=y