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include/mmc.h
18 KB
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/* |
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* Copyright 2008,2010 Freescale Semiconductor, Inc |
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* Andy Fleming * * Based (loosely) on the Linux code |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ #ifndef _MMC_H_ #define _MMC_H_ |
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#include <linux/list.h> |
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#include <linux/sizes.h> |
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#include <linux/compiler.h> |
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#include <part.h> |
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/* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */ #define SD_VERSION_SD (1U << 31) #define MMC_VERSION_MMC (1U << 30) #define MAKE_SDMMC_VERSION(a, b, c) \ ((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c)) #define MAKE_SD_VERSION(a, b, c) \ (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c)) #define MAKE_MMC_VERSION(a, b, c) \ (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c)) #define EXTRACT_SDMMC_MAJOR_VERSION(x) \ (((u32)(x) >> 16) & 0xff) #define EXTRACT_SDMMC_MINOR_VERSION(x) \ (((u32)(x) >> 8) & 0xff) #define EXTRACT_SDMMC_CHANGE_VERSION(x) \ ((u32)(x) & 0xff) #define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0) #define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0) #define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0) #define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0) #define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0) #define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0) #define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0) #define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0) #define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0) #define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0) #define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0) #define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0) #define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0) #define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1) #define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0) #define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0) |
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#define MMC_VERSION_5_1 MAKE_MMC_VERSION(5, 1, 0) |
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#define MMC_MODE_HS (1 << 0) #define MMC_MODE_HS_52MHz (1 << 1) #define MMC_MODE_4BIT (1 << 2) #define MMC_MODE_8BIT (1 << 3) #define MMC_MODE_SPI (1 << 4) |
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#define MMC_MODE_DDR_52MHz (1 << 5) |
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#define SD_DATA_4BIT 0x00040000 |
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#define IS_SD(x) ((x)->version & SD_VERSION_SD) |
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#define IS_MMC(x) ((x)->version & MMC_VERSION_MMC) |
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#define MMC_DATA_READ 1 #define MMC_DATA_WRITE 2 |
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#define MMC_CMD_GO_IDLE_STATE 0 #define MMC_CMD_SEND_OP_COND 1 #define MMC_CMD_ALL_SEND_CID 2 #define MMC_CMD_SET_RELATIVE_ADDR 3 #define MMC_CMD_SET_DSR 4 |
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#define MMC_CMD_SWITCH 6 |
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#define MMC_CMD_SELECT_CARD 7 |
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#define MMC_CMD_SEND_EXT_CSD 8 |
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#define MMC_CMD_SEND_CSD 9 #define MMC_CMD_SEND_CID 10 |
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#define MMC_CMD_STOP_TRANSMISSION 12 |
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#define MMC_CMD_SEND_STATUS 13 #define MMC_CMD_SET_BLOCKLEN 16 #define MMC_CMD_READ_SINGLE_BLOCK 17 #define MMC_CMD_READ_MULTIPLE_BLOCK 18 |
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#define MMC_CMD_SET_BLOCK_COUNT 23 |
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#define MMC_CMD_WRITE_SINGLE_BLOCK 24 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 |
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#define MMC_CMD_ERASE_GROUP_START 35 #define MMC_CMD_ERASE_GROUP_END 36 #define MMC_CMD_ERASE 38 |
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#define MMC_CMD_APP_CMD 55 |
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#define MMC_CMD_SPI_READ_OCR 58 #define MMC_CMD_SPI_CRC_ON_OFF 59 |
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#define MMC_CMD_RES_MAN 62 #define MMC_CMD62_ARG1 0xefac62ec #define MMC_CMD62_ARG2 0xcbaea7 |
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#define SD_CMD_SEND_RELATIVE_ADDR 3 |
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#define SD_CMD_SWITCH_FUNC 6 |
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#define SD_CMD_SEND_IF_COND 8 |
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#define SD_CMD_SWITCH_UHS18V 11 |
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#define SD_CMD_APP_SET_BUS_WIDTH 6 |
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#define SD_CMD_APP_SD_STATUS 13 |
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#define SD_CMD_ERASE_WR_BLK_START 32 #define SD_CMD_ERASE_WR_BLK_END 33 |
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#define SD_CMD_APP_SEND_OP_COND 41 |
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#define SD_CMD_APP_SEND_SCR 51 /* SCR definitions in different words */ #define SD_HIGHSPEED_BUSY 0x00020000 #define SD_HIGHSPEED_SUPPORTED 0x00020000 |
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#define OCR_BUSY 0x80000000 #define OCR_HCS 0x40000000 |
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#define OCR_VOLTAGE_MASK 0x007FFF80 #define OCR_ACCESS_MODE 0x60000000 |
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#define MMC_ERASE_ARG 0x00000000 #define MMC_SECURE_ERASE_ARG 0x80000000 #define MMC_TRIM_ARG 0x00000001 #define MMC_DISCARD_ARG 0x00000003 #define MMC_SECURE_TRIM1_ARG 0x80000001 #define MMC_SECURE_TRIM2_ARG 0x80008000 |
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#define MMC_STATUS_MASK (~0x0206BF7F) |
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#define MMC_STATUS_SWITCH_ERROR (1 << 7) |
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#define MMC_STATUS_RDY_FOR_DATA (1 << 8) #define MMC_STATUS_CURR_STATE (0xf << 9) |
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#define MMC_STATUS_ERROR (1 << 19) |
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#define MMC_STATE_PRG (7 << 9) |
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#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte addressed by index which are 1 in value field */ #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte addressed by index, which are 1 in value field */ #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */ #define SD_SWITCH_CHECK 0 #define SD_SWITCH_SWITCH 1 /* * EXT_CSD fields */ |
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#define EXT_CSD_ENH_START_ADDR 136 /* R/W */ #define EXT_CSD_ENH_SIZE_MULT 140 /* R/W */ |
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#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */ |
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#define EXT_CSD_PARTITION_SETTING 155 /* R/W */ |
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#define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */ |
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#define EXT_CSD_MAX_ENH_SIZE_MULT 157 /* R */ |
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#define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */ |
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#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */ |
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#define EXT_CSD_WR_REL_PARAM 166 /* R */ #define EXT_CSD_WR_REL_SET 167 /* R/W */ |
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#define EXT_CSD_RPMB_MULT 168 /* RO */ |
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#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ |
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#define EXT_CSD_BOOT_BUS_WIDTH 177 |
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#define EXT_CSD_PART_CONF 179 /* R/W */ #define EXT_CSD_BUS_WIDTH 183 /* R/W */ #define EXT_CSD_HS_TIMING 185 /* R/W */ #define EXT_CSD_REV 192 /* RO */ #define EXT_CSD_CARD_TYPE 196 /* RO */ #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ |
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#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */ |
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#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ |
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#define EXT_CSD_BOOT_MULT 226 /* RO */ |
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/* * EXT_CSD field definitions */ |
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#define EXT_CSD_CMD_SET_NORMAL (1 << 0) #define EXT_CSD_CMD_SET_SECURE (1 << 1) #define EXT_CSD_CMD_SET_CPSECURE (1 << 2) |
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#define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ |
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#define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2) #define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3) #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ | EXT_CSD_CARD_TYPE_DDR_1_2V) |
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#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ |
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#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ |
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#define EXT_CSD_BOOT_ACK_ENABLE (1 << 6) #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3) #define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0) #define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0) #define EXT_CSD_BOOT_ACK(x) (x << 6) #define EXT_CSD_BOOT_PART_NUM(x) (x << 3) #define EXT_CSD_PARTITION_ACCESS(x) (x << 0) |
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#define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3) #define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2) #define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x) |
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#define EXT_CSD_PARTITION_SETTING_COMPLETED (1 << 0) |
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#define EXT_CSD_ENH_USR (1 << 0) /* user data area is enhanced */ #define EXT_CSD_ENH_GP(x) (1 << ((x)+1)) /* GP part (x+1) is enhanced */ |
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#define EXT_CSD_HS_CTRL_REL (1 << 0) /* host controlled WR_REL_SET */ #define EXT_CSD_WR_DATA_REL_USR (1 << 0) /* user data area WR_REL */ #define EXT_CSD_WR_DATA_REL_GP(x) (1 << ((x)+1)) /* GP part (x+1) WR_REL */ |
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#define R1_ILLEGAL_COMMAND (1 << 22) #define R1_APP_CMD (1 << 5) |
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#define MMC_RSP_PRESENT (1 << 0) |
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#define MMC_RSP_136 (1 << 1) /* 136 bit response */ #define MMC_RSP_CRC (1 << 2) /* expect valid crc */ #define MMC_RSP_BUSY (1 << 3) /* card may send busy */ #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ |
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#define MMC_RSP_NONE (0) #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) |
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#define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ MMC_RSP_BUSY) |
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#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) #define MMC_RSP_R3 (MMC_RSP_PRESENT) #define MMC_RSP_R4 (MMC_RSP_PRESENT) #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) |
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#define MMCPART_NOAVAILABLE (0xff) #define PART_ACCESS_MASK (0x7) #define PART_SUPPORT (0x1) |
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#define ENHNCD_SUPPORT (0x2) |
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#define PART_ENH_ATTRIB (0x1f) |
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/* Maximum block size for MMC */ #define MMC_MAX_BLOCK_LEN 512 |
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/* The number of MMC physical partitions. These consist of: * boot partitions (2), general purpose partitions (4) in MMC v4.4. */ #define MMC_NUM_BOOT_PARTITION 2 |
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#define MMC_PART_RPMB 3 /* RPMB partition number */ |
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/* Driver model support */ /** * struct mmc_uclass_priv - Holds information about a device used by the uclass */ struct mmc_uclass_priv { struct mmc *mmc; }; /** * mmc_get_mmc_dev() - get the MMC struct pointer for a device * * Provided that the device is already probed and ready for use, this value * will be available. * * @dev: Device * @return associated mmc struct pointer if available, else NULL */ struct mmc *mmc_get_mmc_dev(struct udevice *dev); /* End of driver model support */ |
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struct mmc_cid { unsigned long psn; unsigned short oid; unsigned char mid; unsigned char prv; unsigned char mdt; char pnm[7]; }; |
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struct mmc_cmd { ushort cmdidx; uint resp_type; uint cmdarg; |
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uint response[4]; |
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}; struct mmc_data { union { char *dest; const char *src; /* src buffers don't get written to */ }; uint flags; uint blocks; uint blocksize; }; |
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/* forward decl. */ struct mmc; |
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#ifdef CONFIG_DM_MMC_OPS struct dm_mmc_ops { /** * send_cmd() - Send a command to the MMC device * * @dev: Device to receive the command * @cmd: Command to send * @data: Additional data to send/receive * @return 0 if OK, -ve on error */ int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data); /** * set_ios() - Set the I/O speed/width for an MMC device * * @dev: Device to update * @return 0 if OK, -ve on error */ int (*set_ios)(struct udevice *dev); /** * get_cd() - See whether a card is present * * @dev: Device to check * @return 0 if not present, 1 if present, -ve on error */ int (*get_cd)(struct udevice *dev); /** * get_wp() - See whether a card has write-protect enabled * * @dev: Device to check * @return 0 if write-enabled, 1 if write-protected, -ve on error */ int (*get_wp)(struct udevice *dev); }; #define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops) int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data); int dm_mmc_set_ios(struct udevice *dev); int dm_mmc_get_cd(struct udevice *dev); int dm_mmc_get_wp(struct udevice *dev); /* Transition functions for compatibility */ int mmc_set_ios(struct mmc *mmc); int mmc_getcd(struct mmc *mmc); int mmc_getwp(struct mmc *mmc); #else |
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struct mmc_ops { int (*send_cmd)(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data); void (*set_ios)(struct mmc *mmc); int (*init)(struct mmc *mmc); int (*getcd)(struct mmc *mmc); int (*getwp)(struct mmc *mmc); }; |
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#endif |
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struct mmc_config { const char *name; |
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#ifndef CONFIG_DM_MMC_OPS |
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const struct mmc_ops *ops; |
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#endif |
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uint host_caps; uint voltages; uint f_min; uint f_max; uint b_max; unsigned char part_type; }; |
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struct sd_ssr { unsigned int au; /* In sectors */ unsigned int erase_timeout; /* In milliseconds */ unsigned int erase_offset; /* In milliseconds */ }; |
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/* * With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device * with mmc_get_mmc_dev(). * * TODO struct mmc should be in mmc_private but it's hard to fix right now */ |
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struct mmc { |
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#ifndef CONFIG_BLK |
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struct list_head link; |
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#endif |
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const struct mmc_config *cfg; /* provided configuration */ |
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uint version; |
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void *priv; |
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uint has_init; |
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int high_capacity; uint bus_width; uint clock; uint card_caps; |
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uint ocr; |
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uint dsr; uint dsr_imp; |
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uint scr[2]; uint csd[4]; |
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uint cid[4]; |
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ushort rca; |
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u8 part_support; u8 part_attr; |
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u8 wr_rel_set; |
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char part_config; |
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uint tran_speed; uint read_bl_len; uint write_bl_len; |
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uint erase_grp_size; /* in 512-byte sectors */ |
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uint hc_wp_grp_size; /* in 512-byte sectors */ |
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struct sd_ssr ssr; /* SD status register */ |
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u64 capacity; |
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u64 capacity_user; u64 capacity_boot; u64 capacity_rpmb; u64 capacity_gp[4]; |
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u64 enh_user_start; u64 enh_user_size; |
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#ifndef CONFIG_BLK |
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struct blk_desc block_dev; |
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#endif |
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char op_cond_pending; /* 1 if we are waiting on an op_cond command */ char init_in_progress; /* 1 if we have done mmc_start_init() */ char preinit; /* start init as early as possible */ |
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int ddr_mode; |
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#ifdef CONFIG_DM_MMC struct udevice *dev; /* Device for this MMC controller */ #endif |
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}; |
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struct mmc_hwpart_conf { struct { uint enh_start; /* in 512-byte sectors */ uint enh_size; /* in 512-byte sectors, if 0 no enh area */ |
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unsigned wr_rel_change : 1; unsigned wr_rel_set : 1; |
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|
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} user; struct { uint size; /* in 512-byte sectors */ |
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|
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unsigned enhanced : 1; unsigned wr_rel_change : 1; unsigned wr_rel_set : 1; |
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|
450 451 452 453 454 455 456 457 |
} gp_part[4]; }; enum mmc_hwpart_conf_mode { MMC_HWPART_CONF_CHECK, MMC_HWPART_CONF_SET, MMC_HWPART_CONF_COMPLETE, }; |
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|
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struct mmc *mmc_create(const struct mmc_config *cfg, void *priv); |
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|
459 460 461 462 463 464 465 466 467 468 469 470 471 472 |
/** * mmc_bind() - Set up a new MMC device ready for probing * * A child block device is bound with the IF_TYPE_MMC interface type. This * allows the device to be used with CONFIG_BLK * * @dev: MMC device to set up * @mmc: MMC struct * @cfg: MMC configuration * @return 0 if OK, -ve on error */ int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg); |
93bfd6167
|
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void mmc_destroy(struct mmc *mmc); |
ad27dd5e1
|
474 475 476 477 478 479 480 481 |
/** * mmc_unbind() - Unbind a MMC device's child block device * * @dev: MMC device * @return 0 if OK, -ve on error */ int mmc_unbind(struct udevice *dev); |
272cc70b2
|
482 483 484 |
int mmc_initialize(bd_t *bis); int mmc_init(struct mmc *mmc); int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); |
4a6ee172c
|
485 |
void mmc_set_clock(struct mmc *mmc, uint clock); |
272cc70b2
|
486 |
struct mmc *find_mmc_device(int dev_num); |
89716964d
|
487 |
int mmc_set_dev(int dev_num); |
272cc70b2
|
488 |
void print_mmc_devices(char separator); |
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|
489 490 491 492 493 494 |
/** * get_mmc_num() - get the total MMC device number * * @return 0 if there is no MMC device, else the number of devices */ |
ea6ebe217
|
495 |
int get_mmc_num(void); |
ac9da0e08
|
496 497 |
int mmc_hwpart_config(struct mmc *mmc, const struct mmc_hwpart_conf *conf, enum mmc_hwpart_conf_mode mode); |
8ca51e51c
|
498 499 |
#ifndef CONFIG_DM_MMC_OPS |
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|
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int mmc_getcd(struct mmc *mmc); |
750121c35
|
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int board_mmc_getcd(struct mmc *mmc); |
d23d8d7e0
|
502 |
int mmc_getwp(struct mmc *mmc); |
750121c35
|
503 |
int board_mmc_getwp(struct mmc *mmc); |
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|
504 |
#endif |
ab71188ce
|
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int mmc_set_dsr(struct mmc *mmc, u16 val); |
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|
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/* Function to change the size of boot partition and rpmb partitions */ int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, unsigned long rpmbsize); |
792970b0a
|
509 510 |
/* Function to modify the PARTITION_CONFIG field of EXT_CSD */ int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access); |
5a99b9de1
|
511 512 |
/* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */ int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode); |
33ace362f
|
513 514 |
/* Function to modify the RST_n_FUNCTION field of EXT_CSD */ int mmc_set_rst_n_function(struct mmc *mmc, u8 enable); |
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|
515 516 517 518 519 520 521 |
/* Functions to read / write the RPMB partition */ int mmc_rpmb_set_key(struct mmc *mmc, void *key); int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *counter); int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk, unsigned short cnt, unsigned char *key); int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk, unsigned short cnt, unsigned char *key); |
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|
522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 |
/** * Start device initialization and return immediately; it does not block on * polling OCR (operation condition register) status. Then you should call * mmc_init, which would block on polling OCR status and complete the device * initializatin. * * @param mmc Pointer to a MMC device struct * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error. */ int mmc_start_init(struct mmc *mmc); /** * Set preinit flag of mmc device. * * This will cause the device to be pre-inited during mmc_initialize(), * which may save boot time if the device is not accessed until later. * Some eMMC devices take 200-300ms to init, but unfortunately they * must be sent a series of commands to even get them to start preparing * for operation. * * @param mmc Pointer to a MMC device struct * @param preinit preinit flag value */ void mmc_set_preinit(struct mmc *mmc, int preinit); |
8687d5c80
|
546 |
#ifdef CONFIG_MMC_SPI |
0b2da7e20
|
547 |
#define mmc_host_is_spi(mmc) ((mmc)->cfg->host_caps & MMC_MODE_SPI) |
8687d5c80
|
548 549 550 |
#else #define mmc_host_is_spi(mmc) 0 #endif |
d52ebf102
|
551 |
struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode); |
1592ef859
|
552 |
|
95de9ab20
|
553 |
void board_mmc_power_init(void); |
3c7ca9670
|
554 |
int board_mmc_init(bd_t *bis); |
750121c35
|
555 |
int cpu_mmc_init(bd_t *bis); |
aeb805558
|
556 |
int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr); |
aa844fe10
|
557 |
int mmc_get_env_dev(void); |
3c7ca9670
|
558 |
|
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|
559 560 561 562 563 564 565 566 |
struct pci_device_id; /** * pci_mmc_init() - set up PCI MMC devices * * This finds all the matching PCI IDs and sets them up as MMC devices. * * @name: Name to use for devices |
4abe8e40a
|
567 |
* @mmc_supported: PCI IDs to search for, terminated by {0, 0} |
91785f70b
|
568 |
*/ |
4abe8e40a
|
569 |
int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported); |
91785f70b
|
570 |
|
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|
571 572 573 574 |
/* Set block count limit because of 16 bit register limit on some hardware*/ #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535 #endif |
cb5ec33d9
|
575 576 577 578 579 580 581 |
/** * mmc_get_blk_desc() - Get the block descriptor for an MMC device * * @mmc: MMC device * @return block device if found, else NULL */ struct blk_desc *mmc_get_blk_desc(struct mmc *mmc); |
71f951180
|
582 |
#endif /* _MMC_H_ */ |