Eric Lee / smarc-uboot

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Commit 5a20397b007e9c1482997cf4418639e9ba3df5fe

Authored by Rob Herring
Committed by Pantelis Antoniou
1 parent bd47c13583
Exists in v2017.01-smarct4x and in 34 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

mmc: remove the MMC_MODE_HC flag 

High capacity support is not a host capability, but a device capability
that is queried via the OCR. The flag in the operating conditions
request argument can just be set unconditionally. This matches the Linux
implementation.

[panto] Hand merged and renumbering MMC_MODE_DDR_52MHz.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>

Showing 14 changed files with 12 additions and 22 deletions Side-by-side Diff

drivers/mmc/dw_mmc.c
Diff comments   View file @ 5a20397
... ... @@ -388,7 +388,7 @@
388 388 host->cfg.host_caps |= MMC_MODE_4BIT;
389 389 host->cfg.host_caps &= ~MMC_MODE_8BIT;
390 390 }
391   - host->cfg.host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_HC;
  391 + host->cfg.host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz;
392 392  
393 393 host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
394 394  
drivers/mmc/fsl_esdhc.c
Diff comments   View file @ 5a20397
... ... @@ -652,7 +652,7 @@
652 652 return -1;
653 653 }
654 654  
655   - cfg->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HC;
  655 + cfg->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
656 656 #ifdef CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
657 657 cfg->cfg.host_caps |= MMC_MODE_DDR_52MHz;
658 658 #endif
drivers/mmc/kona_sdhci.c
Diff comments   View file @ 5a20397
... ... @@ -121,7 +121,6 @@
121 121 host->name = "kona-sdhci";
122 122 host->ioaddr = reg_base;
123 123 host->quirks = quirks;
124   - host->host_caps = MMC_MODE_HC;
125 124  
126 125 if (init_kona_mmc_core(host)) {
127 126 free(host);
... ... @@ -363,15 +363,12 @@
363 363 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
364 364 cmd.resp_type = MMC_RSP_R3;
365 365 cmd.cmdarg = 0;
366   - if (use_arg && !mmc_host_is_spi(mmc)) {
367   - cmd.cmdarg =
  366 + if (use_arg && !mmc_host_is_spi(mmc))
  367 + cmd.cmdarg = OCR_HCS |
368 368 (mmc->cfg->voltages &
369 369 (mmc->ocr & OCR_VOLTAGE_MASK)) |
370 370 (mmc->ocr & OCR_ACCESS_MODE);
371 371  
372   - if (mmc->cfg->host_caps & MMC_MODE_HC)
373   - cmd.cmdarg |= OCR_HCS;
374   - }
375 372 err = mmc_send_cmd(mmc, &cmd, NULL);
376 373 if (err)
377 374 return err;
drivers/mmc/mvebu_mmc.c
Diff comments   View file @ 5a20397
... ... @@ -418,7 +418,7 @@
418 418 .f_min = MVEBU_MMC_BASE_FAST_CLOCK / MVEBU_MMC_BASE_DIV_MAX,
419 419 .f_max = MVEBU_MMC_CLOCKRATE_MAX,
420 420 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
421   - .host_caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HC |
  421 + .host_caps = MMC_MODE_4BIT | MMC_MODE_HS |
422 422 MMC_MODE_HS_52MHz,
423 423 .part_type = PART_TYPE_DOS,
424 424 .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
drivers/mmc/mxsmmc.c
Diff comments   View file @ 5a20397
... ... @@ -405,8 +405,7 @@
405 405 priv->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
406 406  
407 407 priv->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT |
408   - MMC_MODE_HS_52MHz | MMC_MODE_HS |
409   - MMC_MODE_HC;
  408 + MMC_MODE_HS_52MHz | MMC_MODE_HS;
410 409  
411 410 /*
412 411 * SSPCLK = 480 * 18 / 29 / 1 = 297.731 MHz
drivers/mmc/omap_hsmmc.c
Diff comments   View file @ 5a20397
... ... @@ -651,8 +651,7 @@
651 651 if (priv_data == NULL)
652 652 return -1;
653 653  
654   - host_caps_val = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS |
655   - MMC_MODE_HC;
  654 + host_caps_val = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS;
656 655  
657 656 switch (dev_index) {
658 657 case 0:
drivers/mmc/s3c_sdi.c
Diff comments   View file @ 5a20397
... ... @@ -298,7 +298,7 @@
298 298 cfg->name = "S3C MMC";
299 299 cfg->ops = &s3cmmc_ops;
300 300 cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
301   - cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_HC | MMC_MODE_HS;
  301 + cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_HS;
302 302 cfg->f_min = 400000;
303 303 cfg->f_max = get_PCLK() / 2;
304 304 cfg->b_max = 0x80;
drivers/mmc/s5p_sdhci.c
Diff comments   View file @ 5a20397
... ... @@ -76,7 +76,6 @@
76 76 host->set_control_reg = &s5p_sdhci_set_control_reg;
77 77 host->set_clock = set_mmc_clk;
78 78  
79   - host->host_caps = MMC_MODE_HC;
80 79 if (host->bus_width == 8)
81 80 host->host_caps |= MMC_MODE_8BIT;
82 81  
drivers/mmc/sh_mmcif.c
Diff comments   View file @ 5a20397
... ... @@ -577,7 +577,7 @@
577 577 .name = DRIVER_NAME,
578 578 .ops = &sh_mmcif_ops,
579 579 .host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT |
580   - MMC_MODE_8BIT | MMC_MODE_HC,
  580 + MMC_MODE_8BIT,
581 581 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
582 582 .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
583 583 };
drivers/mmc/sunxi_mmc.c
Diff comments   View file @ 5a20397
... ... @@ -449,7 +449,7 @@
449 449  
450 450 cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
451 451 cfg->host_caps = MMC_MODE_4BIT;
452   - cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC;
  452 + cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
453 453 cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
454 454  
455 455 cfg->f_min = 400000;
drivers/mmc/tegra_mmc.c
Diff comments   View file @ 5a20397
... ... @@ -559,7 +559,7 @@
559 559 host->cfg.host_caps |= MMC_MODE_8BIT;
560 560 if (host->width >= 4)
561 561 host->cfg.host_caps |= MMC_MODE_4BIT;
562   - host->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC;
  562 + host->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
563 563  
564 564 /*
565 565 * min freq is for card identification, and is the highest
drivers/mmc/zynq_sdhci.c
Diff comments   View file @ 5a20397
... ... @@ -29,8 +29,6 @@
29 29 SDHCI_QUIRK_BROKEN_R1B;
30 30 host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
31 31  
32   - host->host_caps = MMC_MODE_HC;
33   -
34 32 add_sdhci(host, 52000000, 52000000 >> 9);
35 33 return 0;
36 34 }
... ... @@ -55,8 +55,7 @@
55 55 #define MMC_MODE_4BIT (1 << 2)
56 56 #define MMC_MODE_8BIT (1 << 3)
57 57 #define MMC_MODE_SPI (1 << 4)
58   -#define MMC_MODE_HC (1 << 5)
59   -#define MMC_MODE_DDR_52MHz (1 << 6)
  58 +#define MMC_MODE_DDR_52MHz (1 << 5)
60 59  
61 60 #define SD_DATA_4BIT 0x00040000
62 61