stpmic1.c 16.2 KB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
 * Author: Christophe Kerello <christophe.kerello@st.com>
 */

#include <common.h>
#include <dm.h>
#include <errno.h>
#include <power/pmic.h>
#include <power/regulator.h>
#include <power/stpmic1.h>

struct stpmic1_range {
	int min_uv;
	int min_sel;
	int max_sel;
	int step;
};

struct stpmic1_output {
	const struct stpmic1_range *ranges;
	int nbranges;
};

#define STPMIC1_MODE(_id, _val, _name) { \
	.id = _id,			\
	.register_value = _val,		\
	.name = _name,			\
}

#define STPMIC1_RANGE(_min_uv, _min_sel, _max_sel, _step) { \
	.min_uv = _min_uv,		\
	.min_sel = _min_sel,		\
	.max_sel = _max_sel,		\
	.step = _step,			\
}

#define STPMIC1_OUTPUT(_ranges, _nbranges) { \
	.ranges = _ranges,		\
	.nbranges = _nbranges,		\
}

static int stpmic1_output_find_uv(int sel,
				  const struct stpmic1_output *output)
{
	const struct stpmic1_range *range;
	int i;

	for (i = 0, range = output->ranges;
	     i < output->nbranges; i++, range++) {
		if (sel >= range->min_sel && sel <= range->max_sel)
			return range->min_uv +
			       (sel - range->min_sel) * range->step;
	}

	return -EINVAL;
}

static int stpmic1_output_find_sel(int uv,
				   const struct stpmic1_output *output)
{
	const struct stpmic1_range *range;
	int i;

	for (i = 0, range = output->ranges;
	     i < output->nbranges; i++, range++) {
		if (uv == range->min_uv && !range->step)
			return range->min_sel;

		if (uv >= range->min_uv &&
		    uv <= range->min_uv +
			  (range->max_sel - range->min_sel) * range->step)
			return range->min_sel +
			       (uv - range->min_uv) / range->step;
	}

	return -EINVAL;
}

/*
 * BUCK regulators
 */

static const struct stpmic1_range buck1_ranges[] = {
	STPMIC1_RANGE(725000, 0, 4, 0),
	STPMIC1_RANGE(725000, 5, 36, 25000),
	STPMIC1_RANGE(1500000, 37, 63, 0),
};

static const struct stpmic1_range buck2_ranges[] = {
	STPMIC1_RANGE(1000000, 0, 17, 0),
	STPMIC1_RANGE(1050000, 18, 19, 0),
	STPMIC1_RANGE(1100000, 20, 21, 0),
	STPMIC1_RANGE(1150000, 22, 23, 0),
	STPMIC1_RANGE(1200000, 24, 25, 0),
	STPMIC1_RANGE(1250000, 26, 27, 0),
	STPMIC1_RANGE(1300000, 28, 29, 0),
	STPMIC1_RANGE(1350000, 30, 31, 0),
	STPMIC1_RANGE(1400000, 32, 33, 0),
	STPMIC1_RANGE(1450000, 34, 35, 0),
	STPMIC1_RANGE(1500000, 36, 63, 0),
};

static const struct stpmic1_range buck3_ranges[] = {
	STPMIC1_RANGE(1000000, 0, 19, 0),
	STPMIC1_RANGE(1100000, 20, 23, 0),
	STPMIC1_RANGE(1200000, 24, 27, 0),
	STPMIC1_RANGE(1300000, 28, 31, 0),
	STPMIC1_RANGE(1400000, 32, 35, 0),
	STPMIC1_RANGE(1500000, 36, 55, 100000),
	STPMIC1_RANGE(3400000, 56, 63, 0),
};

static const struct stpmic1_range buck4_ranges[] = {
	STPMIC1_RANGE(600000, 0, 27, 25000),
	STPMIC1_RANGE(1300000, 28, 29, 0),
	STPMIC1_RANGE(1350000, 30, 31, 0),
	STPMIC1_RANGE(1400000, 32, 33, 0),
	STPMIC1_RANGE(1450000, 34, 35, 0),
	STPMIC1_RANGE(1500000, 36, 60, 100000),
	STPMIC1_RANGE(3900000, 61, 63, 0),
};

/* BUCK: 1,2,3,4 - voltage ranges */
static const struct stpmic1_output buck_voltage_range[] = {
	STPMIC1_OUTPUT(buck1_ranges, ARRAY_SIZE(buck1_ranges)),
	STPMIC1_OUTPUT(buck2_ranges, ARRAY_SIZE(buck2_ranges)),
	STPMIC1_OUTPUT(buck3_ranges, ARRAY_SIZE(buck3_ranges)),
	STPMIC1_OUTPUT(buck4_ranges, ARRAY_SIZE(buck4_ranges)),
};

/* BUCK modes */
static const struct dm_regulator_mode buck_modes[] = {
	STPMIC1_MODE(STPMIC1_BUCK_MODE_HP, STPMIC1_BUCK_MODE_HP, "HP"),
	STPMIC1_MODE(STPMIC1_BUCK_MODE_LP, STPMIC1_BUCK_MODE_LP, "LP"),
};

static int stpmic1_buck_get_uv(struct udevice *dev, int buck)
{
	int sel;

	sel = pmic_reg_read(dev, STPMIC1_BUCKX_CTRL_REG(buck));
	if (sel < 0)
		return sel;

	sel &= STPMIC1_BUCK_OUTPUT_MASK;
	sel >>= STPMIC1_BUCK_OUTPUT_SHIFT;

	return stpmic1_output_find_uv(sel, &buck_voltage_range[buck]);
}

static int stpmic1_buck_get_value(struct udevice *dev)
{
	return stpmic1_buck_get_uv(dev->parent, dev->driver_data - 1);
}

static int stpmic1_buck_set_value(struct udevice *dev, int uv)
{
	int sel, buck = dev->driver_data - 1;

	sel = stpmic1_output_find_sel(uv, &buck_voltage_range[buck]);
	if (sel < 0)
		return sel;

	return pmic_clrsetbits(dev->parent,
			       STPMIC1_BUCKX_CTRL_REG(buck),
			       STPMIC1_BUCK_OUTPUT_MASK,
			       sel << STPMIC1_BUCK_OUTPUT_SHIFT);
}

static int stpmic1_buck_get_enable(struct udevice *dev)
{
	int ret;

	ret = pmic_reg_read(dev->parent,
			    STPMIC1_BUCKX_CTRL_REG(dev->driver_data - 1));
	if (ret < 0)
		return false;

	return ret & STPMIC1_BUCK_EN ? true : false;
}

static int stpmic1_buck_set_enable(struct udevice *dev, bool enable)
{
	struct dm_regulator_uclass_platdata *uc_pdata;
	int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS :
			     STPMIC1_DEFAULT_STOP_DELAY_MS;
	int ret, uv;

	/* if regulator is already in the wanted state, nothing to do */
	if (stpmic1_buck_get_enable(dev) == enable)
		return 0;

	if (enable) {
		uc_pdata = dev_get_uclass_platdata(dev);
		uv = stpmic1_buck_get_value(dev);
		if (uv < uc_pdata->min_uV || uv > uc_pdata->max_uV)
			stpmic1_buck_set_value(dev, uc_pdata->min_uV);
	}

	ret = pmic_clrsetbits(dev->parent,
			      STPMIC1_BUCKX_CTRL_REG(dev->driver_data - 1),
			      STPMIC1_BUCK_EN, enable ? STPMIC1_BUCK_EN : 0);
	mdelay(delay);

	return ret;
}

static int stpmic1_buck_get_mode(struct udevice *dev)
{
	int ret;

	ret = pmic_reg_read(dev->parent,
			    STPMIC1_BUCKX_CTRL_REG(dev->driver_data - 1));
	if (ret < 0)
		return ret;

	return ret & STPMIC1_BUCK_MODE ? STPMIC1_BUCK_MODE_LP :
					 STPMIC1_BUCK_MODE_HP;
}

static int stpmic1_buck_set_mode(struct udevice *dev, int mode)
{
	return pmic_clrsetbits(dev->parent,
			       STPMIC1_BUCKX_CTRL_REG(dev->driver_data - 1),
			       STPMIC1_BUCK_MODE,
			       mode ? STPMIC1_BUCK_MODE : 0);
}

static int stpmic1_buck_probe(struct udevice *dev)
{
	struct dm_regulator_uclass_platdata *uc_pdata;

	if (!dev->driver_data || dev->driver_data > STPMIC1_MAX_BUCK)
		return -EINVAL;

	uc_pdata = dev_get_uclass_platdata(dev);

	uc_pdata->type = REGULATOR_TYPE_BUCK;
	uc_pdata->mode = (struct dm_regulator_mode *)buck_modes;
	uc_pdata->mode_count = ARRAY_SIZE(buck_modes);

	return 0;
}

static const struct dm_regulator_ops stpmic1_buck_ops = {
	.get_value  = stpmic1_buck_get_value,
	.set_value  = stpmic1_buck_set_value,
	.get_enable = stpmic1_buck_get_enable,
	.set_enable = stpmic1_buck_set_enable,
	.get_mode   = stpmic1_buck_get_mode,
	.set_mode   = stpmic1_buck_set_mode,
};

U_BOOT_DRIVER(stpmic1_buck) = {
	.name = "stpmic1_buck",
	.id = UCLASS_REGULATOR,
	.ops = &stpmic1_buck_ops,
	.probe = stpmic1_buck_probe,
};

/*
 * LDO regulators
 */

static const struct stpmic1_range ldo12_ranges[] = {
	STPMIC1_RANGE(1700000, 0, 7, 0),
	STPMIC1_RANGE(1700000, 8, 24, 100000),
	STPMIC1_RANGE(3300000, 25, 31, 0),
};

static const struct stpmic1_range ldo3_ranges[] = {
	STPMIC1_RANGE(1700000, 0, 7, 0),
	STPMIC1_RANGE(1700000, 8, 24, 100000),
	STPMIC1_RANGE(3300000, 25, 30, 0),
	/* Sel 31 is special case when LDO3 is in mode sync_source (BUCK2/2) */
};

static const struct stpmic1_range ldo5_ranges[] = {
	STPMIC1_RANGE(1700000, 0, 7, 0),
	STPMIC1_RANGE(1700000, 8, 30, 100000),
	STPMIC1_RANGE(3900000, 31, 31, 0),
};

static const struct stpmic1_range ldo6_ranges[] = {
	STPMIC1_RANGE(900000, 0, 24, 100000),
	STPMIC1_RANGE(3300000, 25, 31, 0),
};

/* LDO: 1,2,3,4,5,6 - voltage ranges */
static const struct stpmic1_output ldo_voltage_range[] = {
	STPMIC1_OUTPUT(ldo12_ranges, ARRAY_SIZE(ldo12_ranges)),
	STPMIC1_OUTPUT(ldo12_ranges, ARRAY_SIZE(ldo12_ranges)),
	STPMIC1_OUTPUT(ldo3_ranges, ARRAY_SIZE(ldo3_ranges)),
	STPMIC1_OUTPUT(NULL, 0),
	STPMIC1_OUTPUT(ldo5_ranges, ARRAY_SIZE(ldo5_ranges)),
	STPMIC1_OUTPUT(ldo6_ranges, ARRAY_SIZE(ldo6_ranges)),
};

/* LDO modes */
static const struct dm_regulator_mode ldo_modes[] = {
	STPMIC1_MODE(STPMIC1_LDO_MODE_NORMAL,
		     STPMIC1_LDO_MODE_NORMAL, "NORMAL"),
	STPMIC1_MODE(STPMIC1_LDO_MODE_BYPASS,
		     STPMIC1_LDO_MODE_BYPASS, "BYPASS"),
	STPMIC1_MODE(STPMIC1_LDO_MODE_SINK_SOURCE,
		     STPMIC1_LDO_MODE_SINK_SOURCE, "SINK SOURCE"),
};

static int stpmic1_ldo_get_value(struct udevice *dev)
{
	int sel, ldo = dev->driver_data - 1;

	sel = pmic_reg_read(dev->parent, STPMIC1_LDOX_CTRL_REG(ldo));
	if (sel < 0)
		return sel;

	/* ldo4 => 3,3V */
	if (ldo == STPMIC1_LDO4)
		return STPMIC1_LDO4_UV;

	sel &= STPMIC1_LDO12356_OUTPUT_MASK;
	sel >>= STPMIC1_LDO12356_OUTPUT_SHIFT;

	/* ldo3, sel = 31 => BUCK2/2 */
	if (ldo == STPMIC1_LDO3 && sel == STPMIC1_LDO3_DDR_SEL)
		return stpmic1_buck_get_uv(dev->parent, STPMIC1_BUCK2) / 2;

	return stpmic1_output_find_uv(sel, &ldo_voltage_range[ldo]);
}

static int stpmic1_ldo_set_value(struct udevice *dev, int uv)
{
	int sel, ldo = dev->driver_data - 1;

	/* ldo4 => not possible */
	if (ldo == STPMIC1_LDO4)
		return -EINVAL;

	sel = stpmic1_output_find_sel(uv, &ldo_voltage_range[ldo]);
	if (sel < 0)
		return sel;

	return pmic_clrsetbits(dev->parent,
			       STPMIC1_LDOX_CTRL_REG(ldo),
			       STPMIC1_LDO12356_OUTPUT_MASK,
			       sel << STPMIC1_LDO12356_OUTPUT_SHIFT);
}

static int stpmic1_ldo_get_enable(struct udevice *dev)
{
	int ret;

	ret = pmic_reg_read(dev->parent,
			    STPMIC1_LDOX_CTRL_REG(dev->driver_data - 1));
	if (ret < 0)
		return false;

	return ret & STPMIC1_LDO_EN ? true : false;
}

static int stpmic1_ldo_set_enable(struct udevice *dev, bool enable)
{
	struct dm_regulator_uclass_platdata *uc_pdata;
	int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS :
			     STPMIC1_DEFAULT_STOP_DELAY_MS;
	int ret, uv;

	/* if regulator is already in the wanted state, nothing to do */
	if (stpmic1_ldo_get_enable(dev) == enable)
		return 0;

	if (enable) {
		uc_pdata = dev_get_uclass_platdata(dev);
		uv = stpmic1_ldo_get_value(dev);
		if (uv < uc_pdata->min_uV || uv > uc_pdata->max_uV)
			stpmic1_ldo_set_value(dev, uc_pdata->min_uV);
	}

	ret = pmic_clrsetbits(dev->parent,
			      STPMIC1_LDOX_CTRL_REG(dev->driver_data - 1),
			      STPMIC1_LDO_EN, enable ? STPMIC1_LDO_EN : 0);
	mdelay(delay);

	return ret;
}

static int stpmic1_ldo_get_mode(struct udevice *dev)
{
	int ret, ldo = dev->driver_data - 1;

	if (ldo != STPMIC1_LDO3)
		return -EINVAL;

	ret = pmic_reg_read(dev->parent, STPMIC1_LDOX_CTRL_REG(ldo));
	if (ret < 0)
		return ret;

	if (ret & STPMIC1_LDO3_MODE)
		return STPMIC1_LDO_MODE_BYPASS;

	ret &= STPMIC1_LDO12356_OUTPUT_MASK;
	ret >>= STPMIC1_LDO12356_OUTPUT_SHIFT;

	return ret == STPMIC1_LDO3_DDR_SEL ? STPMIC1_LDO_MODE_SINK_SOURCE :
					     STPMIC1_LDO_MODE_NORMAL;
}

static int stpmic1_ldo_set_mode(struct udevice *dev, int mode)
{
	int ret, ldo = dev->driver_data - 1;

	if (ldo != STPMIC1_LDO3)
		return -EINVAL;

	ret = pmic_reg_read(dev->parent, STPMIC1_LDOX_CTRL_REG(ldo));
	if (ret < 0)
		return ret;

	switch (mode) {
	case STPMIC1_LDO_MODE_SINK_SOURCE:
		ret &= ~STPMIC1_LDO12356_OUTPUT_MASK;
		ret |= STPMIC1_LDO3_DDR_SEL << STPMIC1_LDO12356_OUTPUT_SHIFT;
	case STPMIC1_LDO_MODE_NORMAL:
		ret &= ~STPMIC1_LDO3_MODE;
		break;
	case STPMIC1_LDO_MODE_BYPASS:
		ret |= STPMIC1_LDO3_MODE;
		break;
	}

	return pmic_reg_write(dev->parent, STPMIC1_LDOX_CTRL_REG(ldo), ret);
}

static int stpmic1_ldo_probe(struct udevice *dev)
{
	struct dm_regulator_uclass_platdata *uc_pdata;

	if (!dev->driver_data || dev->driver_data > STPMIC1_MAX_LDO)
		return -EINVAL;

	uc_pdata = dev_get_uclass_platdata(dev);

	uc_pdata->type = REGULATOR_TYPE_LDO;
	if (dev->driver_data - 1 == STPMIC1_LDO3) {
		uc_pdata->mode = (struct dm_regulator_mode *)ldo_modes;
		uc_pdata->mode_count = ARRAY_SIZE(ldo_modes);
	} else {
		uc_pdata->mode_count = 0;
	}

	return 0;
}

static const struct dm_regulator_ops stpmic1_ldo_ops = {
	.get_value  = stpmic1_ldo_get_value,
	.set_value  = stpmic1_ldo_set_value,
	.get_enable = stpmic1_ldo_get_enable,
	.set_enable = stpmic1_ldo_set_enable,
	.get_mode   = stpmic1_ldo_get_mode,
	.set_mode   = stpmic1_ldo_set_mode,
};

U_BOOT_DRIVER(stpmic1_ldo) = {
	.name = "stpmic1_ldo",
	.id = UCLASS_REGULATOR,
	.ops = &stpmic1_ldo_ops,
	.probe = stpmic1_ldo_probe,
};

/*
 * VREF DDR regulator
 */

static int stpmic1_vref_ddr_get_value(struct udevice *dev)
{
	/* BUCK2/2 */
	return stpmic1_buck_get_uv(dev->parent, STPMIC1_BUCK2) / 2;
}

static int stpmic1_vref_ddr_get_enable(struct udevice *dev)
{
	int ret;

	ret = pmic_reg_read(dev->parent, STPMIC1_VREF_CTRL_REG);
	if (ret < 0)
		return false;

	return ret & STPMIC1_VREF_EN ? true : false;
}

static int stpmic1_vref_ddr_set_enable(struct udevice *dev, bool enable)
{
	int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS :
			     STPMIC1_DEFAULT_STOP_DELAY_MS;
	int ret;

	/* if regulator is already in the wanted state, nothing to do */
	if (stpmic1_vref_ddr_get_enable(dev) == enable)
		return 0;

	ret = pmic_clrsetbits(dev->parent, STPMIC1_VREF_CTRL_REG,
			      STPMIC1_VREF_EN, enable ? STPMIC1_VREF_EN : 0);
	mdelay(delay);

	return ret;
}

static int stpmic1_vref_ddr_probe(struct udevice *dev)
{
	struct dm_regulator_uclass_platdata *uc_pdata;

	uc_pdata = dev_get_uclass_platdata(dev);

	uc_pdata->type = REGULATOR_TYPE_FIXED;
	uc_pdata->mode_count = 0;

	return 0;
}

static const struct dm_regulator_ops stpmic1_vref_ddr_ops = {
	.get_value  = stpmic1_vref_ddr_get_value,
	.get_enable = stpmic1_vref_ddr_get_enable,
	.set_enable = stpmic1_vref_ddr_set_enable,
};

U_BOOT_DRIVER(stpmic1_vref_ddr) = {
	.name = "stpmic1_vref_ddr",
	.id = UCLASS_REGULATOR,
	.ops = &stpmic1_vref_ddr_ops,
	.probe = stpmic1_vref_ddr_probe,
};

/*
 * BOOST regulator
 */

static int stpmic1_boost_get_enable(struct udevice *dev)
{
	int ret;

	ret = pmic_reg_read(dev->parent, STPMIC1_USB_CTRL_REG);
	if (ret < 0)
		return false;

	return ret & STPMIC1_USB_BOOST_EN ? true : false;
}

static int stpmic1_boost_set_enable(struct udevice *dev, bool enable)
{
	int ret;

	ret = pmic_reg_read(dev->parent, STPMIC1_USB_CTRL_REG);
	if (ret < 0)
		return ret;

	if (!enable && ret & STPMIC1_USB_PWR_SW_EN)
		return -EINVAL;

	/* if regulator is already in the wanted state, nothing to do */
	if (!!(ret & STPMIC1_USB_BOOST_EN) == enable)
		return 0;

	ret = pmic_clrsetbits(dev->parent, STPMIC1_USB_CTRL_REG,
			      STPMIC1_USB_BOOST_EN,
			      enable ? STPMIC1_USB_BOOST_EN : 0);
	if (enable)
		mdelay(STPMIC1_USB_BOOST_START_UP_DELAY_MS);

	return ret;
}

static int stpmic1_boost_probe(struct udevice *dev)
{
	struct dm_regulator_uclass_platdata *uc_pdata;

	uc_pdata = dev_get_uclass_platdata(dev);

	uc_pdata->type = REGULATOR_TYPE_FIXED;
	uc_pdata->mode_count = 0;

	return 0;
}

static const struct dm_regulator_ops stpmic1_boost_ops = {
	.get_enable = stpmic1_boost_get_enable,
	.set_enable = stpmic1_boost_set_enable,
};

U_BOOT_DRIVER(stpmic1_boost) = {
	.name = "stpmic1_boost",
	.id = UCLASS_REGULATOR,
	.ops = &stpmic1_boost_ops,
	.probe = stpmic1_boost_probe,
};

/*
 * USB power switch
 */

static int stpmic1_pwr_sw_get_enable(struct udevice *dev)
{
	uint mask = 1 << dev->driver_data;
	int ret;

	ret = pmic_reg_read(dev->parent, STPMIC1_USB_CTRL_REG);
	if (ret < 0)
		return false;

	return ret & mask ? true : false;
}

static int stpmic1_pwr_sw_set_enable(struct udevice *dev, bool enable)
{
	uint mask = 1 << dev->driver_data;
	int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS :
			     STPMIC1_DEFAULT_STOP_DELAY_MS;
	int ret;

	ret = pmic_reg_read(dev->parent, STPMIC1_USB_CTRL_REG);
	if (ret < 0)
		return ret;

	/* if regulator is already in the wanted state, nothing to do */
	if (!!(ret & mask) == enable)
		return 0;

	/* Boost management */
	if (enable && !(ret & STPMIC1_USB_BOOST_EN)) {
		pmic_clrsetbits(dev->parent, STPMIC1_USB_CTRL_REG,
				STPMIC1_USB_BOOST_EN, STPMIC1_USB_BOOST_EN);
		mdelay(STPMIC1_USB_BOOST_START_UP_DELAY_MS);
	} else if (!enable && ret & STPMIC1_USB_BOOST_EN &&
		   (ret & STPMIC1_USB_PWR_SW_EN) != STPMIC1_USB_PWR_SW_EN) {
		pmic_clrsetbits(dev->parent, STPMIC1_USB_CTRL_REG,
				STPMIC1_USB_BOOST_EN, 0);
	}

	ret = pmic_clrsetbits(dev->parent, STPMIC1_USB_CTRL_REG,
			      mask, enable ? mask : 0);
	mdelay(delay);

	return ret;
}

static int stpmic1_pwr_sw_probe(struct udevice *dev)
{
	struct dm_regulator_uclass_platdata *uc_pdata;

	if (!dev->driver_data || dev->driver_data > STPMIC1_MAX_PWR_SW)
		return -EINVAL;

	uc_pdata = dev_get_uclass_platdata(dev);

	uc_pdata->type = REGULATOR_TYPE_FIXED;
	uc_pdata->mode_count = 0;

	return 0;
}

static const struct dm_regulator_ops stpmic1_pwr_sw_ops = {
	.get_enable = stpmic1_pwr_sw_get_enable,
	.set_enable = stpmic1_pwr_sw_set_enable,
};

U_BOOT_DRIVER(stpmic1_pwr_sw) = {
	.name = "stpmic1_pwr_sw",
	.id = UCLASS_REGULATOR,
	.ops = &stpmic1_pwr_sw_ops,
	.probe = stpmic1_pwr_sw_probe,
};