stpmic1.h
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/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
/*
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
#ifndef __PMIC_STPMIC1_H_
#define __PMIC_STPMIC1_H_
#define STPMIC1_MAIN_CONTROL_REG 0x10
#define STPMIC1_MASK_RESET_BUCK 0x18
#define STPMIC1_MASK_RESET_LDOS 0x1a
#define STPMIC1_BUCKX_CTRL_REG(buck) (0x20 + (buck))
#define STPMIC1_VREF_CTRL_REG 0x24
#define STPMIC1_LDOX_CTRL_REG(ldo) (0x25 + (ldo))
#define STPMIC1_USB_CTRL_REG 0x40
#define STPMIC1_NVM_USER_STATUS_REG 0xb8
#define STPMIC1_NVM_USER_CONTROL_REG 0xb9
/* Main PMIC Control Register (MAIN_CONTROL_REG) */
#define STPMIC1_CTRL_SWITCH_OFF BIT(0)
#define STPMIC1_CTRL_RESTART BIT(1)
#define STPMIC1_MASK_RESET_BUCK3 BIT(2)
#define STPMIC1_MASK_RESET_BUCK_DBG GENMASK(3, 0)
#define STPMIC1_MASK_RESET_LDOS_DBG 0x6F
#define STPMIC1_BUCK_EN BIT(0)
#define STPMIC1_BUCK_MODE BIT(1)
#define STPMIC1_BUCK_OUTPUT_MASK GENMASK(7, 2)
#define STPMIC1_BUCK_OUTPUT_SHIFT 2
#define STPMIC1_BUCK2_1200000V (24 << STPMIC1_BUCK_OUTPUT_SHIFT)
#define STPMIC1_BUCK2_1350000V (30 << STPMIC1_BUCK_OUTPUT_SHIFT)
#define STPMIC1_BUCK3_1800000V (39 << STPMIC1_BUCK_OUTPUT_SHIFT)
#define STPMIC1_VREF_EN BIT(0)
#define STPMIC1_LDO_EN BIT(0)
#define STPMIC1_LDO12356_OUTPUT_MASK GENMASK(6, 2)
#define STPMIC1_LDO12356_OUTPUT_SHIFT 2
#define STPMIC1_LDO3_MODE BIT(7)
#define STPMIC1_LDO3_DDR_SEL 31
#define STPMIC1_LDO3_1800000 (9 << STPMIC1_LDO12356_OUTPUT_SHIFT)
#define STPMIC1_LDO4_UV 3300000
#define STPMIC1_USB_BOOST_EN BIT(0)
#define STPMIC1_USB_PWR_SW_EN GENMASK(2, 1)
#define STPMIC1_NVM_USER_CONTROL_PROGRAM BIT(0)
#define STPMIC1_NVM_USER_CONTROL_READ BIT(1)
#define STPMIC1_NVM_USER_STATUS_BUSY BIT(0)
#define STPMIC1_NVM_USER_STATUS_ERROR BIT(1)
#define STPMIC1_DEFAULT_START_UP_DELAY_MS 1
#define STPMIC1_DEFAULT_STOP_DELAY_MS 5
#define STPMIC1_USB_BOOST_START_UP_DELAY_MS 10
enum {
STPMIC1_BUCK1,
STPMIC1_BUCK2,
STPMIC1_BUCK3,
STPMIC1_BUCK4,
STPMIC1_MAX_BUCK,
};
enum {
STPMIC1_BUCK_MODE_HP,
STPMIC1_BUCK_MODE_LP,
};
enum {
STPMIC1_LDO1,
STPMIC1_LDO2,
STPMIC1_LDO3,
STPMIC1_LDO4,
STPMIC1_LDO5,
STPMIC1_LDO6,
STPMIC1_MAX_LDO,
};
enum {
STPMIC1_LDO_MODE_NORMAL,
STPMIC1_LDO_MODE_BYPASS,
STPMIC1_LDO_MODE_SINK_SOURCE,
};
enum {
STPMIC1_PWR_SW1,
STPMIC1_PWR_SW2,
STPMIC1_MAX_PWR_SW,
};
#endif