smarcfimx6.h
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/*
* Copyright (C) 2012-2015 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX6Q SabreSD board.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __SMARCFIMX6_CONFIG_H
#define __SMARCFIMX6_CONFIG_H
#include <asm/arch/imx-regs.h>
#include <asm/imx-common/gpio.h>
#ifdef CONFIG_SPL
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
#include "imx6_spl.h"
#endif
#define CONFIG_MACH_TYPE_SMARCFIMX6 3990
#define CONFIG_MACH_TYPE MACH_TYPE_SMARCFIMX6
#if defined(CONFIG_SER0)
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONSOLE_DEV "ttymxc0"
#endif
#if defined(CONFIG_SER1)
#define CONFIG_MXC_UART_BASE UART2_BASE
#define CONFIG_CONSOLE_DEV "ttymxc1"
#endif
#if defined(CONFIG_SER2)
#define CONFIG_MXC_UART_BASE UART4_BASE
#define CONFIG_CONSOLE_DEV "ttymxc3"
#endif
#if defined(CONFIG_SER3)
#define CONFIG_MXC_UART_BASE UART5_BASE
#define CONFIG_CONSOLE_DEV "ttymxc4"
#endif
#define CONFIG_MMCROOT "/dev/mmcblk2p2" /* SDHC3 */
#if defined(CONFIG_MX6QP)
#define CONFIG_DEFAULT_FDT_FILE "imx6qp-smarcfimx6.dtb"
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
#elif defined(CONFIG_MX6Q)
#define CONFIG_DEFAULT_FDT_FILE "imx6q-smarcfimx6.dtb"
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
#elif defined(CONFIG_MX6DL)
#define CONFIG_DEFAULT_FDT_FILE "imx6dl-smarcfimx6.dtb"
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
#elif defined(CONFIG_MX6SOLO)
#define CONFIG_DEFAULT_FDT_FILE "imx6dl-smarcfimx6.dtb"
#define PHYS_SDRAM_SIZE (512u * 1024 * 1024)
#endif
#include "smarcfimx6_common.h"
#define CONFIG_SYS_FSL_USDHC_NUM 3
#define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC3 */
#define CONFIG_SYS_MMC_ENV_PART 0 /* user partition */
#ifdef CONFIG_SYS_USE_SPINOR
#define CONFIG_SF_DEFAULT_CS 0
#endif
/*
* imx6 q/dl/solo pcie would be failed to work properly in kernel, if
* the pcie module is iniialized/enumerated both in uboot and linux
* kernel.
* rootcause:imx6 q/dl/solo pcie don't have the reset mechanism.
* it is only be RESET by the POR. So, the pcie module only be
* initialized/enumerated once in one POR.
* Set to use pcie in kernel defaultly, mask the pcie config here.
* Remove the mask freely, if the uboot pcie functions, rather than
* the kernel's, are required.
*/
/* #define CONFIG_CMD_PCI */
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
#endif
/* PWM Configs */
#define CONFIG_PWM_IMX
#define CONFIG_IMX6_PWM_PER_CLK 66000000
/* USB Configs */
#define CONFIG_CMD_USB
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_USB_KEYBOARD
#ifdef CONFIG_USB_KEYBOARD
#define CONFIG_SYS_USB_EVENT_POLL
#endif /* CONFIG_USB_KEYBOARD */
/* Client */
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_VBUS_DRAW 2
#define CONFIG_CI_UDC
#define CONFIG_USBD_HS
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_CMD_USB_MASS_STORAGE
#define CONFIG_USB_GADGET_MASS_STORAGE
#define CONFIG_USBDOWNLOAD_GADGET
#define CONFIG_G_DNL_VENDOR_NUM 0x18d1
#define CONFIG_G_DNL_PRODUCT_NUM 0x0d02
#define CONFIG_G_DNL_MANUFACTURER "FSL"
/* USB DFU */
#define CONFIG_CMD_DFU
#define CONFIG_DFU_FUNCTION
#define CONFIG_DFU_MMC
#endif
/*#define CONFIG_SPLASH_SCREEN*/
/*#define CONFIG_MXC_EPDC*/
/*
* SPLASH SCREEN Configs
*/
#if defined(CONFIG_SPLASH_SCREEN) && defined(CONFIG_MXC_EPDC)
/*
* Framebuffer and LCD
*/
#define CONFIG_CMD_BMP
#define CONFIG_LCD
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#undef LCD_TEST_PATTERN
/* #define CONFIG_SPLASH_IS_IN_MMC 1 */
#define LCD_BPP LCD_MONOCHROME
/* #define CONFIG_SPLASH_SCREEN_ALIGN 1 */
#define CONFIG_WAVEFORM_BUF_SIZE 0x200000
#endif /* CONFIG_SPLASH_SCREEN && CONFIG_MXC_EPDC */
#endif /* __SMARCFIMX6_CONFIG_H */